IRFL110, SiHFL110 Power MOSFET

Static Characteristics

Dynamic Characteristics

Drain-Source Body Diode Characteristics

Notes: a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width ≤ 300 µs; duty cycle ≤ 2%.

Graphical Characteristics

The datasheet includes several characteristic curves illustrating the performance of the IRFL110/SiHFL110 MOSFET:

• Figure 1 & 2 (Typical Output Characteristics): These plots show Drain Current (ID) versus Drain-Source Voltage (VDS) for different Gate-Source Voltages (VGS) at case temperatures of 25°C and 150°C, respectively. They demonstrate the device's behavior in saturation and linear regions.
• Figure 3 (Typical Transfer Characteristics): This graph plots Drain Current (ID) against Gate-Source Voltage (VGS) at a constant Drain-Source Voltage (VDS) of 50V, illustrating the threshold voltage and transconductance.
• Figure 4 (Normalized On-Resistance vs. Temperature): This plot shows how the normalized on-resistance (RDS(on)) changes with Junction Temperature (TJ) for a specific drain current (ID = 5.6A) and gate-source voltage (VGS = 10V).
• Figure 5 (Typical Capacitance vs. Drain-to-Source Voltage): Displays input capacitance (Ciss), output capacitance (Coss), and reverse transfer capacitance (Crss) as a function of Drain-Source Voltage (VDS).
• Figure 6 (Typical Gate Charge vs. Gate-to-Source Voltage): Illustrates Total Gate Charge (Qg), Gate-Source Charge (Qgs), and Gate-Drain Charge (Qgd) versus Gate-Source Voltage (VGS) for a specific operating condition (ID = 5.6A, VDS = 80V).
• Figure 7 (Typical Source-Drain Diode Forward Voltage): Plots the Source-Drain Diode Forward Voltage (VSD) against Reverse Drain Current (ISD).
• Figure 8 (Maximum Safe Operating Area): Defines the operating limits for Drain Current (ID) versus Drain-Source Voltage (VDS) under continuous and pulsed conditions, considering temperature limitations.
• Figure 9 (Maximum Drain Current vs. Case Temperature): Shows the maximum continuous drain current capability as a function of Case Temperature (Tc).
• Figure 10a & 10b (Switching Time Test Circuit & Waveforms): These illustrate the test circuit and corresponding voltage/current waveforms used to measure switching characteristics like turn-on delay (td(on)), rise time (tr), turn-off delay (td(off)), and fall time (tf).
• Figure 11 (Maximum Effective Transient Thermal Impedance): This plot shows the transient thermal impedance from junction to case as a function of rectangular pulse duration, useful for thermal management.
• Figure 12a, 12b & 12c (Unclamped Inductive Test Circuit, Waveforms, and Avalanche Energy): These figures describe the test setup and results for measuring the device's ability to withstand unclamped inductive loads, showing maximum avalanche energy (EAS) versus drain current for different starting junction temperatures.
• Figure 13a & 13b (Basic Gate Charge Waveform & Test Circuit): Depicts the fundamental gate charge waveform and the circuit used for its measurement.
• Figure 14 (Peak Diode Recovery dV/dt Test Circuit): Shows the test circuit and waveforms for evaluating the peak diode recovery dV/dt characteristic, crucial for switching performance.