Vishay IRF540 Power MOSFET
Brand: Vishay
Model: IRF540
Product Type: Power MOSFET (N-Channel)
Manufacturer: Vishay Siliconix
Description
The Vishay IRF540 is a third-generation N-Channel Power MOSFET designed for commercial-industrial applications. It offers a combination of fast switching speeds, a ruggedized device design, low on-resistance, and cost-effectiveness. The TO-220AB package is suitable for power dissipation levels up to approximately 50 W, featuring low thermal resistance and package cost.
Features
- Dynamic dV/dt rating
- Repetitive avalanche rated
- 175 °C operating temperature
- Fast switching
- Ease of paralleling
- Simple drive requirements
- Material categorization: for definitions of compliance please see www.vishay.com/doc?99912
Note: Datasheet provides information about parts that are RoHS-compliant and/or non RoHS-compliant. Parts with lead [Pb] terminations are not RoHS-compliant. Please see datasheet tables for details.
Product Summary
| Parameter | Value |
|---|---|
| VDS (V) | 100 |
| RDS(on) (Ω) | 0.077 (VGS = 10 V) |
| Qg max. (nC) | 72 |
| Qgs (nC) | 11 |
| Qgd (nC) | 32 |
| Configuration | Single |
Ordering Information
| Package | Lead [Pb]-free | Lead [Pb]-free and halogen-free |
|---|---|---|
| TO-220AB | IRF540PbF | IRF540PbF-BE3 |
Absolute Maximum Ratings
(Tc = 25 °C, unless otherwise noted)
| Parameter | Symbol | Limit | Unit |
|---|---|---|---|
| Drain-source voltage | VDS | 100 | V |
| Gate-source voltage | VGS | ± 20 | V |
| Continuous drain current | ID | 28 (TC = 25 °C, VGS at 10 V) 20 (TC = 100 °C, VGS at 10 V) | A |
| Pulsed drain current a | IDM | 110 | A |
| Linear derating factor | 1.0 | W/°C | |
| Single pulse avalanche energy b | EAS | 230 | mJ |
| Repetitive avalanche current a | IAR | 28 | A |
| Repetitive avalanche energy a | EAR | 15 | mJ |
| Maximum power dissipation | PD | 150 (TC = 25 °C) | W |
| Peak diode recovery dV/dt c | dV/dt | 5.5 | V/ns |
| Operating junction and storage temperature range | TJ, Tstg | -55 to +175 | °C |
| Soldering recommendations (peak temperature) d | 300 (For 10 s) | °C | |
| Mounting torque | 1.1 (6-32 or M3 screw) | N·m |
Notes:
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11)
b. VDD = 25 V, starting TJ = 25 °C, L = 440 µH, Rg = 25 Ω, IAS = 28 A (see fig. 12)
c. ISD ≤ 28 A, dI/dt ≤ 170 A/µs, VDD ≤ VDS, TJ ≤ 175 °C
d. 1.6 mm from case
Thermal Resistance Ratings
| Parameter | Symbol | Typ. | Max. | Unit |
|---|---|---|---|---|
| Maximum junction-to-ambient | RthJA | - | 62 | °C/W |
| Case-to-sink, flat, greased surface | RthCS | 0.50 | - | °C/W |
| Maximum junction-to-case (drain) | RthJC | - | 1.0 | °C/W |
Electrical Characteristics
Static
| Parameter | Symbol | Test Conditions | Min. | Typ. | Max. | Unit |
|---|---|---|---|---|---|---|
| Drain-source breakdown voltage | VDS | VGS = 0 V, ID = 250 μA | 100 | - | - | V |
| VDS temperature coefficient | ΔVDS/TJ | Reference to 25 °C, ID = 1 mA | - | 0.13 | - | V/°C |
| Gate-source threshold voltage | VGS(th) | VDS = VGS, ID = 250 μA | 2.0 | - | 4.0 | V |
| Gate-source leakage | IGSS | VGS = ± 20 V | - | - | ± 100 | nA |
| Zero gate voltage drain current | IDSS | VDS = 100 V, VGS = 0 V | - | - | 25 | μA |
| VDS = 80 V, VGS = 0 V, TJ = 150 °C | - | - | 250 | μA | ||
| Drain-source on-state resistance | RDS(on) | VGS = 10 V, ID = 17 A b | - | - | 0.077 | Ω |
| Forward transconductance | gfs | VDS = 50 V, ID = 17 A b | - | 8.7 | - | S |
Dynamic
| Parameter | Symbol | Test Conditions | Typ. | Max. | Unit | |
|---|---|---|---|---|---|---|
| Input capacitance | Ciss | VGS = 0 V, VDS = 25 V, f = 1.0 MHz | 1700 | - | - | pF |
| Output capacitance | Coss | 560 | - | - | pF | |
| Reverse transfer capacitance | Crss | 120 | - | - | pF | |
| Total gate charge | Qg | VGS = 10 V, ID = 17 A, VDS = 80 V, see fig. 6 and 13 b | - | 72 | nC | |
| Gate-source charge | Qgs | - | 11 | nC | ||
| Gate-drain charge | Qgd | - | 32 | nC | ||
| Turn-on delay time | td(on) | VDD = 50 V, ID = 17 A, Rg = 9.1 Ω, RD = 2.9 Ω, see fig. 10 b | - | 11 | ns | |
| Rise time | tr | - | 44 | ns | ||
| Turn-off delay time | td(off) | - | 53 | ns | ||
| Fall time | tf | - | 43 | ns | ||
| Gate input resistance | Rg | f = 1 MHz, open drain | 0.5 | - | 3.6 | Ω |
| Internal drain inductance | LD | Between lead, 6 mm (0.25") from package and center of die contact | - | 4.5 | nH | |
| Internal source inductance | LS | - | 7.5 | nH |
Drain-Source Body Diode Characteristics
| Parameter | Symbol | Test Conditions | Typ. | Max. | Unit | |
|---|---|---|---|---|---|---|
| Continuous source-drain diode current | IS | MOSFET symbol showing the integral reverse p - n junction diode | - | 28 | A | |
| Pulsed diode forward current a | ISM | - | 110 | A | ||
| Body diode voltage | VSD | TJ = 25 °C, IS = 28 A, VGS = 0 V b | - | 2.5 | V | |
| Body diode reverse recovery time | trr | TJ = 25 °C, IF = 17 A, dI/dt = 100 A/µs b | - | 180 | 360 | ns |
| Body diode reverse recovery charge | Qrr | - | 1.3 | 2.8 | µC | |
| Forward turn-on time | ton | Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) |
Typical Characteristics
Figure 1: Typical Output Characteristics
This graph shows the relationship between Drain Current (ID) and Drain-to-Source Voltage (VDS) for various Gate-to-Source Voltages (VGS) at a case temperature (TC) of 25 °C. The pulse width is 20 µs.
Figure 2: Typical Output Characteristics
This graph shows the relationship between Drain Current (ID) and Drain-to-Source Voltage (VDS) for various Gate-to-Source Voltages (VGS) at a case temperature (TC) of 175 °C. The pulse width is 20 µs.
Figure 3: Typical Transfer Characteristics
This graph illustrates the relationship between Drain Current (ID) and Gate-to-Source Voltage (VGS) at a case temperature (TC) of 175 °C, with a pulse width of 20 µs. Different VDS levels (e.g., 50 V) are shown.
Figure 4: Normalized On-Resistance vs. Temperature
This plot displays the Normalized Drain-to-Source On-Resistance (RDS(on)) as a function of Junction Temperature (TJ), with a constant drain current (ID) of 17 A and gate-source voltage (VGS) of 10 V.
Figure 5: Typical Capacitance vs. Drain-to-Source Voltage
This graph shows the input capacitance (Ciss), output capacitance (Coss), and reverse transfer capacitance (Crss) as a function of Drain-to-Source Voltage (VDS). The measurements are taken at VGS = 0 V and a frequency of 1 MHz.
Figure 6: Typical Gate Charge vs. Gate-to-Source Voltage
This plot illustrates the Total Gate Charge (QG) as a function of Gate-to-Source Voltage (VGS). The test conditions include ID = 17 A and VDS = 80 V, with specific test circuit references.
Figure 7: Typical Source-Drain Diode Forward Voltage
This graph shows the Source-to-Drain Diode Forward Voltage (VSD) versus Reverse Drain Current (ISD) at VGS = 0 V, with curves for 25 °C and 150 °C.
Figure 8: Maximum Safe Operating Area
This graph defines the Maximum Safe Operating Area (SOA) for the MOSFET, showing the relationship between Drain Current (ID) and Drain-to-Source Voltage (VDS) under various pulse durations (e.g., 10 µs, 100 µs, 1 ms, 10 ms) and case temperatures (25 °C, 175 °C). Operation is limited by RDS(on) at higher currents.
Figure 9: Maximum Drain Current vs. Case Temperature
This plot shows the Maximum Drain Current (ID) as a function of Case Temperature (TC), indicating the derating of current capability with increasing temperature.
Figure 10a & 10b: Switching Time Test Circuit and Waveforms
Figure 10a shows the test circuit used to measure switching times, including the DUT (Device Under Test), gate drive, and load resistor. Figure 10b illustrates the corresponding voltage and current waveforms (VGS, ID, td(on), tr, td(off), tf) during switching.
Figure 11: Maximum Effective Transient Thermal Impedance, Junction-to-Case
This graph presents the Maximum Effective Transient Thermal Impedance (ZthJC) as a function of Rectangular Pulse Duration (t1), for various duty factors and single pulse conditions. Notes indicate Duty Factor D = t1/t2 and Peak Tj = PDM x ZthJC + TC.
Figure 12a, 12b & 12c: Unclamped Inductive Test Circuit, Waveforms, and Maximum Avalanche Energy
Figure 12a depicts the Unclamped Inductive Test Circuit used for avalanche energy testing. Figure 12b shows the associated voltage and current waveforms. Figure 12c plots the Maximum Avalanche Energy (EAS) versus Starting Junction Temperature (TJ) for different drain currents (ID) and a constant VDD of 25 V.
Figure 13a & 13b: Basic Gate Charge Waveform and Test Circuit
Figure 13a illustrates the basic gate charge waveform, showing the relationship between gate voltage (VG) and charge (QG, QGS, QGD). Figure 13b shows the test circuit for measuring gate charge characteristics, including current sampling resistors.
Figure 14: Peak Diode Recovery dv/dt Test Circuit
This diagram shows the test circuit designed to measure the peak diode recovery dv/dt. It includes circuit layout considerations such as low stray inductance and a ground plane. It also details test conditions for driver gate drive, diode reverse current, VDS waveform, and inductor current, with notes on VGS for logic level devices.
Package Information
| Dim. | Millimeters (Min.) | Millimeters (Max.) | Inches (Min.) | Inches (Max.) |
|---|---|---|---|---|
| A | 4.24 | 4.65 | 0.167 | 0.183 |
| b | 0.69 | 1.02 | 0.027 | 0.040 |
| b(1) | 1.14 | 1.78 | 0.045 | 0.070 |
| c | 0.36 | 0.61 | 0.014 | 0.024 |
| D | 14.33 | 15.85 | 0.564 | 0.624 |
| E | 9.96 | 10.52 | 0.392 | 0.414 |
| e | 2.41 | 2.67 | 0.095 | 0.105 |
| e(1) | 4.88 | 5.28 | 0.192 | 0.208 |
| F | 1.14 | 1.40 | 0.045 | 0.055 |
| H(1) | 6.10 | 6.71 | 0.240 | 0.264 |
| J(1) | 2.41 | 2.92 | 0.095 | 0.115 |
| L | 13.36 | 14.40 | 0.526 | 0.567 |
| L(1) | 3.33 | 4.04 | 0.131 | 0.159 |
| Ø P | 3.53 | 3.94 | 0.139 | 0.155 |
| Q | 2.54 | 3.00 | 0.100 | 0.118 |
Note: M* = 0.052 inches to 0.064 inches (dimension including protrusion), heatsink hole for HVM
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IRF540 Power MOSFET | Vishay
