Intel Manuals & User Guides

intel Creating Heterogeneous Memory Systems in FPGA SDK for OpenCL Custom Platforms Instructions

July 30, 2023

Creating Heterogeneous Memory Systems in FPGA SDK for OpenCL Custom Platforms Instructions Creating Heterogeneous Memory Systems in Intel® FPGA SDK for OpenCL Custom Platforms The implementation of heterogeneous memory in…

intel GX Device Errata and Design Recommendations User Guide

July 22, 2023

intel GX Device Errata and Design Recommendations About this Document This document provides information about known device issues affecting Intel® Arria® 10 GX/GT devices. It also offers design recommendations you should…

25G Ethernet Intel FPGA IP User Guide

July 22, 2023

25G Ethernet Intel® FPGA IP Release Notes User Guide 25G Ethernet Intel FPGA IP Release Notes (Intel Agilex Devices) Intel® FPGA IP versions match the Intel Quartus® Prime Design Suite…

F-Tile PMA-FEC Direct PHY Multirate Intel FPGA IP User Guide

July 22, 2023

F-Tile PMA-FEC Direct PHY Multirate Intel FPGA IP Product Information The F-Tile PMA/FEC Direct PHY Multirate Intel FPGA IP is a versatile IP (Intellectual Property) designed for Intel FPGA (Field-Programmable…

eSRAM Intel FPGA IP User Guide

July 22, 2023

eSRAM Intel FPGA IP Product Information The product is the Intel FPGA IP, which is compatible with the  Intel Quartus Prime Design Suite software. The IP has different  versions that…

Mailbox Client Intel FPGA IP User Guide

July 21, 2023

Mailbox Client Intel® FPGA IP Release Notes   Mailbox Client Intel® FPGA IP Release Notes Intel® Prime Design Suite software versions until v19.1. Starting in Intel Quartus Prime Design Suite…

JESD204C Intel FPGA IP and ADI AD9081 MxFE ADC Interoperability Report User Guide

July 21, 2023

JESD204C Intel FPGA IP and ADI AD9081 MxFE ADC Interoperability Report Product Information The product referred to in the user manual is the JESD204C Intel FPGA IP. It is a…

intel Agilex F-Series FPGA Development Board User Guide

July 21, 2023

AN 987: Static Update Partial Reconfiguration Tutorial Static Update Partial Reconfiguration Tutorial for Intel® ™ Agilex F-Series FPGA Development Board This application note demonstrates static update partial reconfiguration (SUPR) on…

intel RN-1138 Nios II Embedded Design Suite User Guide

July 21, 2023

intel RN-1138 Nios II Embedded Design Suite About this Document This document provides information about the following in context to the Intel® Quartus® Prime software version: Nios® II Embedded Design…

intel RN-01080-22.1 Quartus Prime Standard Edition Software User Guide

July 21, 2023

intel RN-01080-22.1 Quartus Prime Standard Edition Software Product Information The product is the Intel Quartus Prime Standard Edition Software, specifically Version 22.1. It includes functional and security updates, bug fixes,…

Intel Quartus Prime Pro Edition User Guide: Third-party Simulation

User Guide

Comprehensive guide to simulating Intel FPGA designs using third-party EDA tools like Questa, ModelSim, VCS, Active-HDL, and Xcelium with Intel Quartus Prime Pro Edition software. Covers setup, workflows, and best…

Intel WiFi Adapter Information Guide: Specifications, Compatibility, and Regulatory Compliance

Product Overview

This guide provides comprehensive information on Intel WiFi adapters, including supported models, technical specifications, wireless standards compliance, regulatory details, and safety guidelines. Essential reading for understanding Intel's wireless networking solutions.

Intel FPGA SDK for OpenCL Cyclone V SoC Development Kit Reference Platform Porting Guide

Guide

This guide details the hardware and software design of the Intel Cyclone V SoC Development Kit Reference Platform for use with the Intel Software Development Kit (SDK) for OpenCL. It…

Intel MCS® 51 Microcontroller Family User's Manual

User's Manual

Comprehensive user's manual detailing the architecture, instruction set, and hardware features of the Intel MCS® 51 microcontroller family, essential for developers and engineers.

Intel740™ Graphics Accelerator Design Guide

Design Guide

Comprehensive hardware design guide for the Intel740™ Graphics Accelerator, detailing ATX add-in card and motherboard implementations, layout, routing, and technical specifications for PC graphics hardware development.

インテル® イーサネットアダプターとデバイス ユーザーガイド

User Guide

インテル® イーサネットアダプターおよびデバイスのインストール、設定、およびトラブルシューティングに関する包括的なユーザーガイド。様々なモデル、オペレーティングシステム、およびデータセンターブリッジング（DCB）、iSCSI、FCoE、SR-IOVなどの高度なネットワーク機能について解説しています。

Arria 10 FPGA: Workaround for Cascaded and Non-Dedicated Clock Path PLL Jitter

Workaround Guideline

Guidelines for applying clock uncertainty to compensate for jitter in Arria 10 FPGA cascaded PLL and non-dedicated clock paths. Covers identifying PLLs, reporting clock transfers, and setting clock uncertainty constraints…

Intel® Pentium® 4 Processor and 845G/845GL/845GV Chipset Platform Design Guide Update

Design Guide Update

This document provides updates to the specifications and information for the Intel® Pentium® 4 Processor in 478-pin Package and Intel® 845G/845GL/845GV Chipset Platform. It details revisions to general design considerations,…

Intel Arria 10 FPGA IP External Memory Interfaces Design Example User Guide

User Guide

User guide detailing the generation, configuration, synthesis, simulation, and debugging of external memory interfaces (EMIF) for Intel Arria 10 FPGAs. Covers various memory protocols and design example workflows.

Intel Yocto Project BSP for Elkhart Lake Processors: Get Started Guide

Get Started Guide

This guide provides instructions for building a Yocto Project*-based Board Support Package (BSP) for Intel Atom® x6000E, Pentium®, and Celeron® N/J series processors (Elkhart Lake). It covers host system setup,…

Intel® Quartus® Prime Standard Edition 用户指南：部分重配置

user guide

本用户指南详细介绍了 Intel® Quartus® Prime Standard Edition 软件中的部分重配置 (PR) 功能，包括设计规划、模式、流程、实现细节以及已知限制。

Intel® 80331 I/O Processor Developer's Manual

Developer's Manual

Comprehensive developer's manual for the Intel® 80331 I/O Processor, detailing its architecture, features, programming interface, and operational specifications for system designers and engineers.