DIODES INCORPORATED
DMP6111SSS
60V P-CHANNEL ENHANCEMENT MODE MOSFET
Product Summary
| BVDSS | RDS(ON) Max | ID Max (TA = +25°C) |
|---|---|---|
| -60V | 115mΩ @ VGS = -10V 145mΩ @ VGS = -4.5V |
-3.2A -2.5A |
Features and Benefits
- 100% Unclamped Inductive Switch (UIS) Test in Production
- Low On-Resistance
- Low Gate Threshold Voltage
- Low Input Capacitance
- Fast Switching Speed
- Low Input/Output Leakage
- Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)
- Halogen and Antimony Free. "Green" Device (Note 3)
- Qualified to JEDEC standards (as references in AEC-Q) for High Reliability.
For more information on product definitions, visit: https://www.diodes.com/quality/product-definitions/
An automotive-compliant part is available under a separate datasheet (DMP6111SSSQ).
Description and Applications
This MOSFET is designed to minimize the on-state resistance (RDS(ON)) yet maintain superior switching performance, making it ideal for high-efficiency power-management applications.
Applications:
- Backlighting
- Power-management functions
- DC-DC converters
Mechanical Data
- Package: SO-8
- Package Material: Molded Plastic, "Green" Molding Compound.
- UL Flammability Classification Rating: 94V-0
- Moisture Sensitivity: Level 1 per J-STD-020
- Terminals Connections: See Diagram below.
- Terminals Finish: Matte Tin Annealed over Copper Lead Frame. Solderable per MIL-STD-202, Method 208 e3.
- Weight: 0.072 grams (Approximate)
Pin Configuration (SO-8 Package)
Diagram Description: The SO-8 package is an 8-lead surface-mount package. The diagram shows the top view with pins numbered 1 through 8. The internal connections are indicated by labels S (Source), D (Drain), and G (Gate). Specifically, pins 1, 3, and 7 are connected to the Source terminal. Pins 2, 4, 6, and 8 are connected to the Drain terminal. Pin 5 is connected to the Gate terminal.
Equivalent Circuit
Diagram Description: A standard schematic symbol for a P-Channel enhancement-mode MOSFET, showing the Gate (G), Drain (D), and Source (S) terminals. The arrow on the source terminal points outwards.
Package Outline Dimensions
Diagram Description: Shows the physical dimensions of the SO-8 package. A table lists the dimensions (A, A1, b, c, D, E, E1, E0, e, h, L, Q) with their minimum, maximum, and typical values in millimeters.
| Dim | SO-8 Min | SO-8 Max | SO-8 Typ |
|---|---|---|---|
| A | 1.40 | 1.50 | 1.45 |
| A1 | 0.10 | 0.20 | 0.15 |
| b | 0.30 | 0.50 | 0.40 |
| c | 0.15 | 0.25 | 0.20 |
| D | 4.85 | 4.95 | 4.90 |
| E | 5.90 | 6.10 | 6.00 |
| E1 | 3.80 | 3.90 | 3.85 |
| E0 | 3.85 | 3.95 | 3.90 |
| e | - | - | 1.27 |
| h | - | - | 0.35 |
| L | 0.62 | 0.82 | 0.72 |
| Q | 0.60 | 0.70 | 0.65 |
| All Dimensions in mm | |||
Suggested Pad Layout
Diagram Description: Illustrates the recommended PCB pad layout for the SO-8 package. A table provides dimensions (C, X, X1, Y, Y1) in millimeters for the pads.
| Dimensions | Value (in mm) |
|---|---|
| C | 1.27 |
| X | 0.802 |
| X1 | 4.612 |
| Y | 1.505 |
| Y1 | 6.50 |
Ordering Information
| Orderable Part Number | Package | Qty. | Carrier |
|---|---|---|---|
| DMP6111SSS-13 | SO-8 | 2,500 | Tape & Reel |
Marking Information
The product marking includes: Manufacturer's Marking (D), Product Type Marking Code (P6111SS), and Date Code Marking (YYWW, where YY is the Year Code and WW is the Week Code).
Notes
- 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant.
- 2. See https://www.diodes.com/quality/lead-free/ for more information about Diodes Incorporated's definitions of Halogen- and Antimony-free, "Green" and Lead-free.
- 3. Halogen- and Antimony-free "Green" products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds.
- 4. For packaging details, go to our website at https://www.diodes.com/design/support/packaging/diodes-packaging/.
Maximum Ratings
| Characteristic | Symbol | Value | Unit | Test Condition |
|---|---|---|---|---|
| Drain-Source Voltage | VDSS | -60 | V | |
| Gate-Source Voltage | VGSS | ±20 | V | |
| Drain Current (Note 5) | ID | -3.2 | A | TA = +25°C |
| -2.5 | A | TA = +70°C | ||
| Maximum Body Diode Forward Current (Note 5) | Is | -3.2 | A | |
| Pulsed Drain Current (10µs Pulse, Duty Cycle = 1%) | IDM | -23 | A | |
| Avalanche Current, L = 0.1mH | IAS | -21 | A | |
| Avalanche Energy, L = 0.1mH | EAS | 22 | mJ |
Thermal Characteristics
| Characteristic | Symbol | Value | Unit | Test Condition |
|---|---|---|---|---|
| Total Power Dissipation (Note 6) | PD | 1.7 | W | Steady State |
| Thermal Resistance, Junction to Ambient (Note 6) | ROJA | 72 | °C/W | Steady State |
| Total Power Dissipation (Note 5) | PD | 2.2 | W | Steady State |
| Thermal Resistance, Junction to Ambient (Note 5) | ROJA | 57 | °C/W | Steady State |
| Thermal Resistance, Junction to Case (Note 5) | ReJC | 7.3 | °C/W | Steady State |
| Operating and Storage Temperature Range | TJ, TSTG | -55 to +150 | °C |
Electrical Characteristics
OFF CHARACTERISTICS (Note 7)
| Characteristic | Symbol | Min | Typ | Max | Unit | Test Condition |
|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | BVDSS | -60 | - | - | V | VGS = 0, ID = -250μA |
| Zero Gate Voltage Drain Current | IDSS | - | -1 | μA | VDS = -60V, VGS = 0 | |
| Gate-Source Leakage | IGSS | - | ±100 | nA | VGS = ±20V, VDS = 0 |
ON CHARACTERISTICS (Note 7)
| Characteristic | Symbol | Min | Typ | Max | Unit | Test Condition |
|---|---|---|---|---|---|---|
| Gate Threshold Voltage | VGS(TH) | -1 | - | -3 | V | VDS = VGS, ID = -250μA |
| Static Drain-Source On-Resistance | RDS(ON) | 77 | 115 | mΩ | VGS = -10V, ID = -3A | |
| 102 | 145 | mΩ | VGS = -4.5V, ID = -3A | |||
| Diode Forward Voltage | VSD | -0.8 | - | -1.2 | V | VGS = 0, IS = -1A |
DYNAMIC CHARACTERISTICS (Note 8)
| Characteristic | Symbol | Min | Typ | Max | Unit | Test Condition |
|---|---|---|---|---|---|---|
| Input Capacitance | Ciss | - | 1286 | - | pF | VDS = -30V, VGS = 0, f = 1.0MHz |
| Output Capacitance | Coss | - | 56 | - | pF | VDS = -30V, VGS = 0, f = 1.0MHz |
| Reverse Transfer Capacitance | Crss | - | 43 | - | pF | VDS = -30V, VGS = 0, f = 1.0MHz |
| Gate Resistance | Rg | - | 5.8 | - | Ω | VDS = 0, VGS = 0, f = 1.0MHz |
| Total Gate Charge (VGS = -4.5V) | Qg | - | 11 | - | nC | VDS = -30V, ID = -3A |
| Total Gate Charge (VGS = -10V) | Qg | - | 23 | - | nC | VDS = -30V, ID = -3A |
| Gate-Source Charge | Qgs | - | 3.7 | - | nC | VDS = -30V, ID = -3A |
| Gate-Drain Charge | Qgd | - | 4.1 | - | nC | VDS = -30V, ID = -3A |
| Turn-On Delay Time | tD(ON) | - | 5.3 | - | ns | VGS = -10V, VDS = -30V, RGEN = 6Ω |
| Turn-On Rise Time | tR | - | 19.3 | - | ns | VGS = -10V, VDS = -30V, RGEN = 6Ω |
| Turn-Off Delay Time | tD(OFF) | - | 43 | - | ns | VGS = -10V, VDS = -30V, RGEN = 6Ω |
| Turn-Off Fall Time | tF | - | 21 | - | ns | VGS = -10V, VDS = -30V, RGEN = 6Ω |
| Reverse-Recovery Time | tRR | - | 21 | - | ns | IS = -3A, di/dt = -100A/μs |
| Reverse-Recovery Charge | QRR | - | 17 | - | nC | IS = -3A, di/dt = -100A/μs |
Notes: 5. Device mounted on FR-4 substrate PC board, 2oz copper, with 1inch square copper plate. 6. Device mounted on FR-4 substrate PC board, 2oz copper, with minimum recommended pad layout. 7. Short duration pulse test used to minimize self-heating effect. 8. Guaranteed by design. Not subject to product testing.
Graphical Data Descriptions
Figure 1: Typical Output Characteristic
This graph plots Drain Current (ID) in Amperes against Drain-Source Voltage (VDS) in Volts. Multiple curves are shown, each representing a different Gate-Source Voltage (VGS) from 3.0V to 10.0V. The curves illustrate how the MOSFET behaves in the saturation and linear regions.
Figure 2: Typical Transfer Characteristic
This graph plots Drain Current (ID) in Amperes against Gate-Source Voltage (VGS) in Volts, with the Drain-Source Voltage (VDS) fixed at 5V. Several curves are presented for different Junction Temperatures (TJ), ranging from -55°C to 150°C, showing how temperature affects the MOSFET's switching behavior.
Figure 3: Typical On-Resistance vs. Drain Current and Gate Voltage
This graph displays the Drain-Source On-Resistance (RDS(ON)) in Ohms on the y-axis versus Drain Current (ID) in Amperes on the x-axis. Two distinct curves are shown, corresponding to Gate-Source Voltages (VGS) of 4.5V and 10V, illustrating the impact of VGS on RDS(ON).
Figure 4: Typical Transfer Characteristic
This graph plots Drain-Source On-Resistance (RDS(ON)) in Ohms against Gate-Source Voltage (VGS) in Volts. A single curve is shown for a fixed Drain Current (ID = 3A), indicating how VGS influences RDS(ON).
Figure 5: Typical On-Resistance vs. Drain Current and Junction Temperature
This graph plots Drain-Source On-Resistance (RDS(ON)) in Ohms against Drain Current (ID) in Amperes. Multiple curves are shown for various Junction Temperatures (TJ), from -55°C to 150°C, at a constant Gate-Source Voltage (VGS = 10V).
Figure 6: On-Resistance Variation with Junction Temperature
This graph shows the normalized Drain-Source On-Resistance (RDS(ON)) on the y-axis versus Junction Temperature (TJ) in degrees Celsius on the x-axis. Two curves are presented for different Gate-Source Voltages (VGS = 10V and VGS = 4.5V) at a constant Drain Current (ID = 3A).
Figure 7: On-Resistance Variation with Junction Temperature
This graph plots Drain-Source On-Resistance (RDS(ON)) in Ohms against Junction Temperature (TJ) in degrees Celsius. Two curves are shown for specific Gate-Source Voltages (VGS = 4.5V and VGS = 10V) at a constant Drain Current (ID = 3A).
Figure 8: Gate Threshold Variation vs. Junction Temperature
This graph displays the Gate Threshold Voltage (VGS(TH)) in Volts on the y-axis versus Junction Temperature (TJ) in degrees Celsius on the x-axis. Two curves are shown for different Drain Currents (ID = 1mA and ID = 250μA).
Figure 9: Diode Forward Voltage vs. Current
This graph plots the Source-Drain Voltage (VSD) in Volts against the Source Current (IS) in Amperes. It characterizes the forward voltage drop of the intrinsic body diode of the MOSFET.
Figure 10: Typical Junction Capacitance
This graph shows various junction capacitances (Ciss, Coss, Crss) in picofarads (pF) on the y-axis plotted against Drain-Source Voltage (VDS) in Volts on the x-axis, measured at a frequency of 1MHz.
Figure 11: Gate Charge
This graph plots Gate Charge (Qg) in nanocoulombs (nC) on the y-axis against Gate-Source Voltage (VGS) in Volts on the x-axis. This measurement is taken under specific conditions (VDS = -30V, ID = -3A).
Figure 12: SOA, Safe Operation Area
This graph plots Drain Current (ID) in Amperes on the y-axis against Drain-Source Voltage (VDS) in Volts on the x-axis. It shows the safe operating limits of the MOSFET under various pulse durations (PW) and duty cycles (D), including DC operation.
Figure 13: Transient Thermal Resistance
This graph plots Transient Thermal Resistance (r(t)) on the y-axis against Pulse Duration Time (t1) in seconds on the x-axis. Multiple curves represent different duty cycles (D), illustrating how the device dissipates heat over time.
Important Notice
DIODES INCORPORATED (Diodes) and its subsidiaries make no warranty of any kind, express or implied, with regards to any information contained in this document, including, but not limited to, the implied warranties of merchantability, fitness for a particular purpose or non-infringement of third party intellectual property rights. The information contained herein is for informational purposes only and is provided to illustrate the operation of Diodes' products and application examples. Diodes assumes no liability arising out of the application or use of this document or any product described herein. This document is intended for skilled and technically trained engineering customers and users. Customers and users are responsible for selecting appropriate Diodes products, evaluating their suitability, ensuring compliance with applicable legal and regulatory requirements, and designing with appropriate safeguards to minimize risks. Diodes assumes no liability for application-related information, support, or assistance. Products described may be covered by patents; no license is conveyed. Diodes' products are provided subject to Standard Terms and Conditions of Sale. Diodes' products and technology may not be used in systems prohibited by applicable laws and regulations. While efforts have been made to ensure accuracy, this document may contain technical inaccuracies or errors. Diodes reserves the right to make changes without further notice. This document is written in English; only the English version is the final and determinative format. Unauthorized copying, modification, distribution, transmission, display, or use of this document is prohibited. Diodes assumes no responsibility for losses incurred from such unauthorized use. The Diodes logo is a registered trademark of Diodes Incorporated. All other trademarks are the property of their respective owners.
