Microchip PolarFire FPGA and PolarFire SoC FPGA PCI Express User Guide

This document provides a comprehensive guide to the PCI Express (PCIe) subsystem integrated within Microchip's PolarFire® FPGAs and PolarFire SoC FPGAs. These devices leverage advanced 28 nm non-volatile process technology to deliver low-power, high-performance solutions.

The guide details the architecture and functionality of the embedded PCIe subsystem (PCIESS), which supports scalable, high-bandwidth serial interconnect technology. It covers essential aspects for developers and engineers working with these FPGA families.

Key Topics Covered:

Functional descriptions of the PCIe subsystem, including physical, data-link, transaction, and AXI layers.
Implementation details using Libero SoC configurators for transceiver, PLL, and PCIe blocks.
Configuration options for PCIe endpoints and root ports, including lane settings, identification, and power management.
Simulation methodologies (BFM and RTL) for validating PCIe designs.
Performance metrics for PCIe AXI master and slave interfaces.
Board design recommendations for optimal signal integrity and connectivity.
References to related Microchip documentation and external standards.

This user guide is an essential resource for understanding and effectively utilizing the PCI Express capabilities within the PolarFire and PolarFire SoC FPGA families.

For further details, refer to the Microchip Technology website.

	PolarFire FPGA and PolarFire SoC FPGA Power-Up and Resets User Guide This user guide details the power-up and reset procedures for Microchip's PolarFire FPGA and PolarFire SoC FPGA families. It covers essential steps like Power-On, Device Boot, Design and Memory Initialization, and various reset schemes, providing a comprehensive understanding of device initialization and operation.
	Libero SoC Tcl Command Reference Guide Comprehensive guide to Tcl commands for the Microchip Libero System-on-Chip (SoC) design suite, covering device families, scripting, and various command categories for efficient FPGA and SoC FPGA design.
	Libero SoC Design Flow User Guide Comprehensive guide to Microchip's Libero SoC design suite, covering FPGA design flow, tools, constraints management, implementation, and debugging for devices like PolarFire, PolarFire SoC, SmartFusion 2, IGLOO 2, and RTG4.
	PolarFire FPGA and PolarFire SoC FPGA Power-Up and Resets User Guide This user guide details the power-up and reset procedures for Microchip's PolarFire FPGA and PolarFire SoC FPGA devices. It covers essential steps like Power-On, Device Boot, Design and Memory Initialization, and various reset schemes, providing a comprehensive understanding of device startup and configuration.
	Microchip SmartDebug User Guide: Debugging FPGA Designs A comprehensive user guide for Microchip's SmartDebug tool, detailing its features for debugging FPGA arrays and SerDes. Learn about integrated and standalone modes, device support, and troubleshooting.
	Libero SoC v2025.1 Release Notes - Microchip Technology Detailed release notes for Microchip's Libero SoC Design Suite v2025.1, covering new features, enhancements, resolved issues, and known limitations for FPGA and SoC device design.
	Microchip SmartPower User Guide for Libero SoC v2025.1 This user guide provides a comprehensive overview of Microchip's SmartPower tool, a power-analysis solution for visualizing and optimizing power consumption in Microchip SoC FPGAs. Learn how to analyze power by component, voltage rail, and clock domain, and utilize features like custom modes and scenario profiles for detailed power evaluation.
	PDC Commands Reference Guide for PolarFire and PolarFire SoC FPGAs This guide provides a comprehensive reference for PDC (Physical Design Constraints) commands used in the Libero SoC Design Suite for PolarFire and PolarFire SoC FPGAs. It details syntax, arguments, and examples for various commands related to I/O configuration, floorplanning, and post-layout editing, enabling users to effectively manage FPGA design constraints.

Key Topics Covered:

References

Related Documents