AN13951
Inganta Amfanin Wuta na i.MX 8ULP
Rev. 0 - 30 Mayu 2023
Bayanin aikace-aikace
AN13951 Inganta Amfanin Wuta don i.MX 8ULP
Bayanin Takardu
Bayani | Abun ciki |
Mahimman kalmomi | AN13951, i.MX 8ULP, Gine-ginen Wuta, Amfani da wutar lantarki, Inganta software |
Abtract | Wannan bayanin kula na aikace-aikacen yana bayyana yadda ake haɓaka yawan ƙarfin matakin tsarin a yawancin al'amuran al'ada tare da haɗin yanki daban-daban. |
Gabatarwa
Iyalin i.MX 8ULP na masu sarrafawa suna fasalta NXP ci gaba da aiwatar da kayan kwalliyar Arm Cortex-A35 tare da Arm Cortex-M33. Wannan haɗin gine-ginen yana bawa na'urar damar gudanar da tsarin aiki masu wadata, irin su Linux, akan Cortex-A35 core da RTOS, irin su FreeRTOS, akan Cortex-M33 core. Hakanan ya haɗa da Fusion DSP don ƙaramar sauti mai ƙarfi da HiFi4 DSP don haɓakar sauti da aikace-aikacen koyon injin. Yana ƙulla ƙaramar ƙarfi da ƙarancin ƙarfin amfani da samfuran da samfuran.
I.MX 8ULP yana da ƙayyadaddun tsari da ci gaba don rufe lokuta daban-daban na amfani, wanda ke raba SoC zuwa yankuna uku tare da iko mai zaman kansa da sadaukarwa da sarrafa agogo. Wannan yana ba da sassauci ga masu amfani don aiwatar da lokuta daban-daban na amfani ta hanyar haɗa yankuna daban-daban. Wannan bayanin kula na aikace-aikacen yana da niyyar bayyana yadda ake haɓaka ƙarfin matakin-tsari a cikin yanayin yanayi da yawa tare da haɗin yanki daban-daban.
Lura: Wannan bayanin kula na aikace-aikacen yana amfani da Linux da lambar SDK na BSP azaman nassoshi da examples.
Ƙarsheview
I.MX 8ULP SoC yana da yankuna daban-daban guda uku: mai sarrafa aikace-aikacen (AP), bidiyo mai jiwuwa mara ƙarfi (LPAV), da yanki na ainihi (RT). An raba wutar lantarki da agogon waɗannan wuraren, kuma masana'antar bas na kowane yanki an haɗa su sosai don ingantaccen sadarwa.
Ana amfani da yankin aikace-aikacen (APD) don ƙididdige ayyuka mai girma ta amfani da dual A35 cores da I/O mai sauri kamar USB/Ethernet/eMMC. Yankin LPAV (LPAVD) don aikace-aikacen multimedia ne wanda ya haɗa da sauti, bidiyo, zane-zane, da nunin nuni waɗanda ke buƙatar babban aiki da babban ƙwaƙwalwar DDR. Yankin na ainihi (RTD) ya haɗa da ƙananan M33 core, ƙaramin Fusion DSP don sarrafa sauti / murya, uPower don jimlar ikon ikon SoC, da Sentinel don sarrafa tsaro.
Hoto 1. i.MX8ULP yanki
2.1 Gine-ginen wutar lantarki
Yankuna daban-daban suna da wutar lantarki daban-daban (ranar wutar lantarki). Hoto 2 yana nuna tsarin wutar lantarki na i.MX 8ULP. Akwai maɓallan wutar lantarki 18 x (PS) don ƙirar IP na ciki na SoC. Ana iya kunna/kashe waɗannan samfuran ta software, ta hanyar uPower FW API, don madaidaicin ikon sarrafa wuta.
uPower babban mai sarrafa wutar lantarki ne a i.MX 8ULP. Firmware da ke aiki akan uPower yana ba da fasali masu zuwa:
- Mai sarrafa canjin yanayin wutar lantarki.
- Mitar wutar lantarki don auna yawan amfani da yankin ikon na'ura.
- Firikwensin zafin jiki don auna zafin na'urar.
- Rukunin saƙo don sadarwa tare da na'urori masu sarrafawa akan guntu.
- I2C don sadarwa tare da PMIC.
Ana yin shigar/fita yanayin ƙananan ƙarfi ta hanyar kiran API uPower FW a cikin software na APD ko RTD. Don saita PMIC kamar saiti, fitowar wutar lantarki voltage, iyakance, da sauransu dole ne a yi ta kiran uPower FW I2C ko PMIC APIs.
Hoto 2. Gine-ginen wutar lantarki
2.2 Yanayin wutar lantarki
Tebur 1 yana nuna samuwan CA35 da CM33 haɗin hanyoyin wutar lantarki. SoC baya goyan bayan wasu haɗin gwiwar. Don ƙarin cikakkun bayanai kan kowane yanayin wutar lantarki, koma zuwa babin "Gudanar da Wutar Lantarki" a cikin i.MX 8ULP Reference Manual (takardar i.MX8ULPRM).
Table 1. i.MX8ULP yanayin wutar lantarki
CA35 | Saukewa: CM33 | ||||
Mai aiki | Barci | Barci mai zurfi | Downarfi ƙasa | Zurfin iko ƙasa | |
Mai aiki | YES Yanayin #1 | YES Yanayin #3 | YES Yanayin #3 | A'A | A'A |
Bangaren aiki* | EE | EE | EE | A'A | A'A |
Barci | EE | EE | EE | A'A | A'A |
Barci mai zurfi* | EE | EE | EE | A'A | A'A |
Downarfi ƙasa | EE Halin #2/4 |
EE Halin #2 |
EE Halin #2 |
EE Halin #2 |
EE |
Zurfin iko ƙasa | EE | EE | EE | EE |
* Linux baya goyan bayan barci mai zurfi ko yanayin aiki na A35.
Tebur 2 taswirar kayan aikin wutar lantarki na Linux zuwa yanayin wutar lantarki na 8ULP.
Tebur 2. Linux BSP yana goyan bayan yanayin wutar lantarki
Linux iko | Yanayin wutar lantarki 8ULP |
Gudu | Mai aiki |
CPU aiki | Barci |
Tsaya tukuna | N/A |
Dakatar da | Downarfi ƙasa |
A kashe wuta | Zurfin iko ƙasa |
Dangane da yanayi daban-daban na amfani da yanayi, mai amfani zai iya zaɓar ɗaya ko biyu ko duka yankuna uku a cikin manyan lokuta. Ana iya sanya waɗannan lamurra/ yanayin amfani zuwa cikin rukunai huɗu masu zuwa:
- Duk yankuna suna aiki - kamar agogo mai wayo yana aiki.
- Yankin RTD yana amfani da shi kawai - kamar cibiyar firikwensin da gano kalmar farkawa cikin ƙaramin ƙarfi.
- APD mai aiki tare da LPAV - kamar kewayawa taswira da rubutun E-Reader.
- RTD yana aiki tare da LPAV - kamar nuni mai ƙarancin ƙarfi da sarrafa sauti na Hi-Fi.
Waɗannan yanayi huɗu an yi musu alama a ciki Tebur 1. Surori masu zuwa suna bayyana yadda ake haɓaka amfani da wutar lantarki don yanayin yanayi na 2, 3, da 4. Inganta ƙarfin aiki na duk yankuna na iya yin amfani da nasihu daga wasu yanayi.
2.3 Hanyoyin tuƙi
SoC na iya tallafawa nau'ikan tuki daban-daban: kan tuƙi (OD), drive ɗin mara kyau (ND), da kuma ƙarƙashin tuƙi (UD), wanda ke nufin SoC na iya gudana ƙarƙashin nau'ikan core daban-daban.tages tare da madaidaicin bas da mitar IP. Masu amfani za su iya zaɓar yanayin tuƙi da ya dace don abubuwan amfani da su da buƙatun wutar lantarki.
Tsohuwar BSP ta ɗaga SoC ta hanyar sanya APD/LPAV cikin yanayin OD da RTD cikin yanayin ND. Masu amfani za su iya saita U-Boot kuma su loda takamaiman bishiyar kernel na'urar files don yanayin ND. Yankin RTD yana goyan bayan UD kawai.
Tebur 3 ya lissafa wasu maɓalli na maɓalli na IP a ƙarƙashin yanayi daban-daban.
Tebur 3. Maɓalli na IP a ƙarƙashin yanayi daban-daban
Sunan agogo | Fiye da Tuƙi (1.1V) Mitar (MHz) | Matsakaicin Direbobi (1.0V) Mitar (MHz) |
CM33_BUSCLK | 108 | 65 |
DSP_CORECLK | 200 | 150 |
FlexSPI0/1 | 400 | 150 |
NIC_AP_CLK | 460 | 241 |
NIC_PER_CLK | 244 | 148 |
USDHC0 | 397 | 200 |
uSDHC1 (PTE/F) | 200 | 100 |
USDHC2 (PTF) | 200 | 100 |
HIFI4_CLK | 594 | 263 |
NIC_LPAV_AXI_CLK | 316.8 | 200 |
NIC_LPAV_AHB_CLK | 158.4 | 100 |
DDR_CLK | 266 | 200 |
DDR_PHY | 528 | 400 |
GPU3D/2D | 316.8 | 200 |
DCNano | 105 | 75 |
Don ƙarin agogo, koma zuwa mitoci na agogo a cikin i.MX 8ULP Application Processor—Kayayyakin Masana'antu (takardar IMX8ULPIEC).
Yankin RTD kawai
Yi la'akari SDK Power_mode_switch demo a matsayin exampda i.MX 8ULP SDK software saki.
A cikin wannan yanayin, yankunan AP da LPAV suna cikin iko ƙasa ko yanayin ƙasa mai zurfi, kuma M33 core ko sake saiti na iya tashe su. Yankin RTD na iya ko dai yana cikin aiki, barci, barci mai zurfi, ko Yanayin saukar da wuta bisa ga yawan amfani da wutar lantarki da buƙatun lokacin tashi.
Hoto 3 kuma Hoto 4 nuna yawan wutar lantarki da lokacin tashi don kowane yanayi mara ƙarfi.
Hoto 3. Yin amfani da wutar lantarki a hanyoyi daban-daban na wutar lantarki
Hoto 4. Lokacin tashin tsarin a cikin nau'ikan wutar lantarki daban-daban
3.1 Zaɓi yanayin ƙananan ƙarfin dama
Dole ne mai amfani ya zaɓi ɗayan dama ko fiye da hanyoyin adana wutar lantarki bisa ga buƙatu. Dole ne a yi la'akari da abubuwan da ke ƙasa:
- Yi la'akari da amfani da wutar lantarki na SoC, PD <300 µW, barci mai zurfi <1mW, barci <50mW
- Yi la'akari da lokacin farkawa daga yanayin ƙarancin ƙarfi, PD> 400 µs, barci mai zurfi> 60 µs, barci> 10 µs
- Yi la'akari da IPs da aka yi amfani da su a cikin mafi ƙasƙanci yanayin wutar lantarki, ta hanyar magana Tebur 4.
Don misaliampda:
1. Idan LPI2C[3] dole ne ya kasance mai aiki ko Async aiki, amma ba CG/PG ba, yi amfani da yanayin barci.
2. Idan ana buƙatar FlexSPI don yin aiki, yanayin wutar lantarki mafi ƙasƙanci shine barci ba tare da tsarin tsarin / agogon bas ba.
Tebur 4. Bayanin yanayin wutar lantarki (yankin na ainihi)
Modules | Hanyoyin wutar lantarki | Mai aiki | Barci | Barci mai zurfi | Downarfi ƙasa | Zurfin iko kasa |
Wutar yankin wutar lantarki | Core wadata = ON, Bias = AFBB da DVS, Tsarin / Bus clocks = ON, I / O wadata = ON | Babban wadata = ON, Bias = AFBB ko ARBB, Voltage = ƙayyadaddun, Tsarin tsarin / agogon bas = ON (na zaɓi), I / O wadata = ON | Ƙaddamarwa mai mahimmanci = ON, Bias = RBB Voltage/ Bias = prog, System/Agogon Bus = KASHE, I/ 0 wadata = ON | Babban wadata = ON (Mem kawai), Bias = RBB, Voltage/ Bias = prog, Tsarin / agogon bas = KASHE, I/ 0 wadata = ON (na zaɓi) | Babban wadata = KASHE, Bias = RBB, Voltage/ Bias = prog, Tsarin / agogon bas = KASHE, I/ 0 wadata = ON (na zaɓi) | |
CCGO | RTD | Aiki | Aiki | Aiki (Ilimited) | PG | PG |
PLLO | PLL LDO | Aiki | Aiki | CG | PG | PG |
PLL1 (Audio) | PLL LDO | Aiki | Aiki | CG | PG | PG |
LPO (1 MHz) | RTD | Aiki | Aiki | Aiki | PG | PG |
SYSOSC | RTD | Aiki | Aiki | Aiki | PG | PG |
Don ƙarin cikakkun bayanai, koma zuwa "Bayanan bayanan Yanayin Wuta (yankin na ainihi)" babi a cikin i.MX 8ULP Processor Reference Manual (takardar i.MX8ULPRM).
Yi la'akari da yanayin amfani da ƙaramar murya mai ƙarfi azaman tsohonample. Mafi ƙarancin yanayin wutar lantarki wanda mai amfani zai iya zaɓar shine barci mai zurfi. IP mic-phone (MICFIL) na iya aiki a ƙarƙashin barci mai zurfi tare da agogon FRO a kunne, wanda ba zai iya aiki a ƙarƙashin yanayin saukar da wuta ba.
3.2 Yi amfani da agogo masu dacewa
Yankin RTD yana da tushen agogo da yawa, kamar yadda aka nuna a hoto na 5: SYSOSC, FRO, LPO, PLL0 (system PLL (SPLL)), da PLL1 (audio PLL (APLL)). A halin yanzu, yankin RTD kuma yana iya amfani da agogon yankin VBAT RTC32K/1K.
Hoto 5. Tsarin agogo na RTD CGC0
- Tushen agogon SYSOSC ya fito ne daga kristal na kan jirgi na waje, na al'ada 24 MHz. Madogarar PLL0/1 da CM33 core/bus na iya amfani da tushen agogon SYSOSC.
- FRO shine oscillator mai gudana kyauta tare da mai gyara, wanda zai iya fitar da agogon 192 MHz da 24 MHz. Ana iya amfani da FRO24 don tushen PLL0/1, kuma FRO192 za a iya amfani da shi don CM33 core/bus clocks.
- An daidaita LPO a 1 MHz, amfani da na'urorin IP waɗanda dole ne suyi aiki a cikin ƙananan yanayi kamar EWM da LPTMR.
- PLL0 yana gudana a 480 MHz kuma PLL1 shine 528 MHz. PLL0 shine tsarin PLL, wanda CM33 core/bus da FlexSPI ke amfani dashi. Ana amfani da PLL1 ta tsarin sauti kamar SAI/MICFIL/MQS. Dukansu suna iya samar da mitar agogo mafi girma don CM33 core/bas.
Tun da CM33 core/bus clock za a iya samo shi daga FRO ko SYSOSC, yana da kyau a guji amfani da PLL0/1 idan ba a buƙatar mitoci mafi girma. Kashe PLLs na iya adana ƙarfi sosai.
Idan ana amfani da PLLs don CM33 a cikin yanayin aiki, dole ne a kashe su da hannu kafin shigar da yanayin ƙarancin ƙarfi (barci/ barci mai zurfi/ saukar da wuta) don adana wuta. Wannan yana buƙatar matakai da yawa:
- Kunna FRO ko SYSOSC tare da * saitunan bit DSEN a cikin rajistar SCR bisa ga amfani da Fusion DSP a cikin yanayin ƙarancin ƙarfi.
- Jira ingancin agogo ta hanyar duba bit ɗin VLD da aka saita a cikin rajistar SCR.
- Kashe nau'ikan IP masu amfani da PLLs, ko canza agogo zuwa FRO ko SYSOSC.
- Canja agogon CM33 zuwa FRO ko SYSOSC tare da saitunan DIV na tsakiya/bas/jinkirin agogo a cikin CGC0.CM33CLK.
- Jira micro seconds da yawa. Don jira karyayyen agogo, duba bit CM33LOCKED.
- Kashe PLL0/1 ta share SCR PLEN bit.
3.3 Kashe wuta da ƙofar agogo mara amfani da yanayin IP da ɓangaren SRAM
Don yankin RTD, ana iya kunna/kashe wuta da yawa (koma zuwa Sashe na 7):
- PS0: CM33 core, peripherals, da EdgeLock enclave
- PS1: Fusion DSP core
- PS14: Fusion AON
- PS15: eFuse
A cikin SDK, mai amfani zai iya kiran UPOWER_PowerOffSwitches(upower_ps_mask_t mask) da UPOWER_PowerOn Switches(upower_ps_mask_t mask) don kashewa da kunna kayan aikin kamar yadda ake buƙata. Tebur 7 yana nuna ƙimar sigogin abin rufe fuska.
Don abubuwan haɗin CM33 (IP module) waɗanda ba a amfani da su, bar shi azaman musaki matsayi (ƙimar sake saiti), ko kashe shi ta share bit ɗin da aka kunna, kamar LPI2C MCR master bit. Tabbatar cewa an share bit ɗin kula da ƙofar agogon PCC, misaliample, PCC1.PCC_LPI2C0[CGC] bit. A cikin yankin RTD, duk agogon IP na iya zama gated ko kunna shi ta hanyar tsarin agogo na PCC.
Rarraba ƙwaƙwalwar ajiya kuma abin la'akari ne don adana wuta idan ba a yi amfani da waɗannan abubuwan tunawa ba. A cikin SDK, mai amfani zai iya kiran UPOWER_PowerOffMemPart (uint32_t mask0, uint32_t mask1) da UPOWER_PowerOnMemPart (uint32_t mask0, uint32_t mask1) don kashewa da kuma kan sassan ƙwaƙwalwar ajiya kamar yadda ake buƙata. Tebur 8 yana nuna ƙimar sigogin mask0/1.
3.4 Shigar da yanayin ƙarancin ƙarfi
Kafin shigar da yanayin ƙarancin ƙarfi (barci / zurfin bacci / ƙarfin wuta), dole ne a aiwatar da matakai da yawa don tabbatar da ƙarancin wutar lantarki a waɗannan hanyoyin:
- Saitunan PAD na gabaɗaya a cikin tsarin SIM
Akwai nau'ikan I/O PADs guda biyu a cikin SoC: FSGPIO (PTA/B/E/F) da HSGPIO (PTC/D). Don ajiye wuta a ƙarƙashin yanayin ƙarancin ƙarfi, mai amfani ya kamata:
- Kashe aikin diyya na HSGPIO ta share COMPE bit a cikin rajistar PTC/D_COMPCELL.
- Iyakance kewayon aiki na I/O don FSGPIO, wanda ke aiki tsakanin 1.8 V ta saita PTx_OPERATION_RANGE bit a ciki
DGO_GP10/11 na RTD_SEC_SIM da DGO_GP4/5 na APD_SIM. A kan EVK, PTB yana aiki don 1.8 V. Mai amfani yakamata ya iyakance kewayon aikin PTB zuwa 1.8 V ta saita RTD_SEC_SIM[DGO_GP11] = 0x1. - Kashe fil ɗin I/O ta hanyar saita PAD mux zuwa aikin hi-Z na analog Ban da fil waɗanda GPIO ke amfani da su ta farkawa ko aikin module a cikin ƙananan ƙarancin iko, duk sauran fitilun PTA/B/C yakamata a saita su zuwa Analog high-Z aiki don ajiye wuta. Share ƙwanƙolin ɓangarorin a cikin rajistar IOMUX0.PCR0_PTA/B/Cx zai iya cimma wannan. A cikin SDK, mai amfani zai iya sanya 0 kai tsaye zuwa abubuwan tsararru na ƙasa:
PTA: IOMUXC0-> PCR0_IOMUXCARRAY0[x] PTB: IOMUXC0-> PCR0_IOMUXCARRAY1[x] PTC: IOMUXC0-> PCR0_IOMUXCARRAY2[x] Don misaliample, IOMUXC0-> PCR0_IOMUXCARRY0[1] = 0 na iya kashe PTA1.
Lura: Tunda dole ne a saita PMIC ta I2C (PTB10/11) yayin canjin yanayin wutar lantarki, ba za ku iya kashe waɗannan fil ɗin ba.
Don kiyaye fil ɗin I/O don aiki azaman tushen farkawa, yakamata a yi saitunan da ke ƙasa don yanayin wutar lantarki daban-daban:
- Yanayin saukar da wuta:
1. Kunna fitin bit a cikin rijistar WUU0 PE1/PE2.
2. Sanya fil mux a cikin IOMUXC0-> PCR0_IOMUXCARRYx zuwa aikin WUU0_Pxx. Don cikakkun bayanai, koma zuwa teburin I / Osignal da aka haɗe a cikin i.MX 8ULP Processor Reference Manual (takardar i.MX8ULPRM).
- Yanayin barci / zurfin bacci: Saita rajistar mai sarrafa katse na ƙungiyar GPIO (GPIOx-> ICR) daidai. - Nuna PLLs - Canja ainihin agogon bas zuwa FRO ko LPO.
- Saita PMIC don daidaita wutar lantarki voltage don ƙananan iko halaye
i.MX 8ULP yana goyan bayan daidaitawa na VDD_DIG0/1/2 dogo mai ƙarfi voltage ko kai tsaye kashe wasu hanyoyin dogo (kawai goyan bayan kashe LSW1 VDD_PTC a cikin EVK na yanzu da SDK ƙarƙashin yanayin saukar wuta) yayin canjin yanayin wutar lantarki. Rage voltage a cikin ƙananan hanyoyi na iya rage yawan amfani da wutar lantarki a hanya mai mahimmanci.
Kashe wasu layin dogo na iya yanke wutar kai tsaye don ajiye wuta. Tebur na 5 yana nuna madaidaicin voltagta VDD_DIG0/1 karkashin yanayi daban-daban na wutar lantarki (VDD_DIG2 an ɗaure shi da DIG1 akan allon EVK. Ana iya daidaita shi tare da VDD_DIG1).
Tebur 5. Wutar lantarki voltage karkashin yanayi daban-daban na wutar lantarki
Tashar wutar lantarki Mai aiki Barci Barci mai zurfi Downarfi ƙasa VDD_DIGO 1.05 V 1.05 V 0.73 V 0.65 V VDD_DIG1 1.05 V 1.05 V 0.73 V 0.73 V Don saukar da voltage na wutar lantarki, mai amfani ya kamata ya gaya wa uPower yadda ake saita PMIC yayin canjin wutar lantarki ta ƙara abubuwa na tsarin ps_rtd_pmic_reg_data_cfgs_t cikin pwr_sys_cfg-> ps_rtd_ pmic_reg_data_cfg [] tsararru. Ɗauki PCA9460 PMIC akan EVK azaman tsohonample kasa:
1. Shigar da yanayin saukar da wuta:
a. Rage ƙasa BUCK2 (VDD_DIG0) zuwa 0.65 V.
b. Kashe LSW1 don PTC I/O wutar lantarki.
2. Fita Yanayin saukarwa:
a. Tada BUCK2 (VDD_DIG0) zuwa 1.0 V.
b. Kunna LSW1 don samar da wutar lantarki na PTC I/O.
A cikin tsarin, memba na power_mode yana bayyana maƙasudin ikon ikon wannan saitin PMIC, don misaliample, PD_RTD_PWR_MODE, wanda ke nufin ana amfani da wannan saitin lokacin da aka canza yanayin wutar lantarki zuwa ƙasa. i2c_addr shine adireshin rajista a cikin PMIC, kuma i2c_data shine ƙimar rijistar da dole ne a saita ta.
Don ƙarin bayani kan adireshin rajista da ragowa, koma zuwa PCA9460, Gudanar da Wuta IC don i.MX 8ULP Data Sheet (takardun bayanai) Saukewa: PCA9460DS). - Saita uPower don sauya wuta, juzu'in juzu'i na ƙwaƙwalwar ajiya, da tsarin PAD:
Don waɗannan sifofi biyu don canjin yanayin wutar lantarki, koma zuwa lpm.c a cikin power_mode_switch demo.
Mai amfani na iya kiyaye waɗannan saitunan ba tare da taɓa su ba sai dai idan an buƙaci ƙarin saituna kamar, kunnawa/kashewa, wasu nau'ikan IP, da tsararrun ƙwaƙwalwar ajiya. Masu amfani za su iya kunna/kashe masu kashe wuta ta hanyar saita swt_board[0]: SWT_BOARD(kunna/kashe ragowa, masks). Ana iya samun ma'anar bits a ciki Tebur 7. Za'a iya kunnawa/kashe tsarin ƙwaƙwalwar ajiya ta hanyar saita swt_mem[0]: SWT_MEM(SRAM Ctrl array bits, SRAM peripheral bits, masks). Ana iya samun ma'anar bits a ciki Tebur 8.
Don ƙarin cikakkun bayanai kan saitunan canjin yanayin wutar lantarki na uPower, koma zuwa Jagorar Mai amfani da Firmware uPower (takardu). UPOWERFWUG). - Kira uPower don canjin wutar lantarki. Ɗauki yanayin shigar da wutar lantarki azaman example, koma zuwa aikin LPM_SystemPowerDown(void) a cikin SDK power_mode_switch demo.
Bayan tsarin ya farka daga yanayin rashin ƙarfi, mai amfani dole ne ya dawo da duk saitunan rajista kafin shiga. Domin misaliample, a cikin saitunan IOMUXC, mai amfani zai iya amfani da madaidaicin tsararru don adana ƙimar duk PCR0 kuma ya dawo dasu.
Yankin APD yana aiki tare da LPAV
Ɗauki NXP Linux saki a matsayin examptsarin aiki don yankin APD.
4.1 Sanya RTD cikin barci
Tsayawa yankin RTD a yanayin Barci na iya ajiyewa kusan 20mW ~ 40mW idan aka kwatanta da yanayin aiki. Hakanan, tabbatar da cewa an kashe fil ɗin GPIO da ba a yi amfani da su ba.
4.2 Kashe IP da fil ɗin da ba a yi amfani da su ba a cikin Linux DTS (bishiyar na'ura)
Kashe kumburin na'urar zai iya guje wa kunna wannan na'urar ko kashe agogonta. Domin misaliample, don kashe GPU3D a cikin tushen itacen na'ura (DTS):
Don hana PS7 kunna wuta, kashe GPU3D. Idan DCNano, MIPI DSI/CSI, da GPU2D duk ba su da ƙarfi, to PLL4 ba ta kunna.
Don guje wa kunna I/O PAD don waɗannan fil, kashe fil ɗin da ba a yi amfani da su ba a cikin nodes na pinctrl.
4.3 Yi amfani da DVFS
i.MX 8ULP Linux yana goyan bayan voltage da fasalulluka na mitar, wanda aka fi sani da DVFS akan sauran dandamali na i.MX. Voltage/mitoci ba a aiwatar da fasalulluka masu ƙarfi a cikin software. Dole ne mai amfani ya canza ta amfani da Linux kernel sysfs. Don amfani da VFS, loda imx8ulp-evk-nd.dtb azaman tsohuwar na'urar itace don tayar da tsarin. Sannan shigar da yanayin ƙananan bas ta:Kernel yana yin canje-canje masu zuwa:
- Rage mitar ainihin DDR daga 528 MHz zuwa 96 MHz.
- Rage agogon APD NIC zuwa 192 MHz ta amfani da FRO azaman tushen agogo maimakon PLL.
- Rage agogon LPAV AXI zuwa 192 MHz ta amfani da FRO azaman tushen agogo maimakon PLL.
- Rage agogon A35 cpu zuwa 500 MHz.
- Rage saukar da tashar wutar lantarki ta BUCK3 (VDD_DIG1/2) voltage zuwa 1.0 V daga 1.1 V.
Fita kuma komawa zuwa babban yanayin motar bas:4.4 Yi amfani da yanayin tuƙi mara ƙima (VDD_DIG1/2 1.0 V)
i.MX 8ULP SoC yana gudana a cikin yanayin overdrive ta tsohuwar U-Boot da saitunan kernel. Idan babban aiki ba shine mabuɗin mahimmanci ba, mai amfani zai iya gudanar da SoC a cikin yanayin tuƙi mai ƙima akan taya don adana wuta. Yanayi a tsaye; mai amfani ba zai iya canza juzu'i a hankali batage ko mita bayan taya up.
U-BootGina U-Boot tare da daidaitawar imx8ulp_evk_nd_defconfig. Yana yin canje-canje masu zuwa:
- Rage saukar da tashar wutar lantarki ta VDD_DIG1/2 (BUCK3) zuwa 1.0V yayin da ake tadawa.
- Sanya agogon DDR zuwa 266 MHz maimakon 528 MHz.
- Rage agogon LPAV/APD NIC zuwa 192 MHz.
- Rage babban agogon A35 zuwa 750 MHz.
Kwaya: loda imx8ulp-evk-nd.dtb akan taya. Yana rage agogon GPU2D/3D zuwa 200 MHz, HiFi4 DSP core
agogo zuwa 260 MHz, uSDHC0 zuwa 194 MHz, da uSDHC1/2 zuwa 97 MHz.
Yankin RTD yana aiki tare da LPAV
Ɗauki akwati "akan nuni koyaushe" azaman tsohonample, akwai tare da wannan bayanin kula. A wannan yanayin, RTD yana samun dama ga mai sarrafa nuni na DCNano don nuna abun ciki a cikin PSRAM. Don cikakkun bayanai, duba lambar da ke haɗe zuwa wannan bayanin aikace-aikacen.
5.1 Kunna yankin LPAV
Bayan an dakatar da Linux, yankin AP da LPAV suna shiga yanayin saukar da wuta. RTD dole ne ya fara mallakar yankin LPAV daga APD da farko:
- SIM_RTD_SEC.SYSCTRL0[LPAV_MASTER_CTRL] = 0 // saita RTD ta zama babban yanki na yankin LPAV
- SIM_RTC_SEC.LPAV_MASTER_ALLOC_CTRL = 0 // ya ware LPAV master IP zuwa RTD
- SIM_RTC_SEC.LPAV_SLAVE_ALLOC_CTRL = 0 // yana ba da IP bawan LPAV zuwa RTD
Sannan, ci gaba da ainihin ikon VDD_DIG2 (BUCK3) na yankin LPAV zuwa 1.05 V ko 1.1 V don tabbatar da duk IPs a cikin LPAV suna aiki yadda yakamata ta uPower upwr_vtm_pmic_config() API.
A ƙarshe, cire yankin LPAV daga Yanayin saukarwa zuwa yanayin aiki:A cikin yanayin nuni koyaushe, mai amfani dole ne ya kunna abubuwan da ke biyowa don samun duka bututun nuni yana aiki:
- MIPI-DSI sauya wuta
- Bangaren ƙwaƙwalwar ajiya don mai sarrafa nuni na DCNano
- MIPI-DSI
- FlexSPI FIFO masu buffer
5.3 Sanya agogo
Yankin LPAV yana da PLL ɗaya kawai don tushen agogo. Don haka dole ne mai amfani ya kunna shi da PFD don fitar da IPs.
Kunna PLL4 tare da PFD da PFDDIV
Zaɓi PLL4 PFD0DIV1 azaman tushen agogo don DCNano kuma kunna agogonsa a cikin PCC:
Bayan an kunna wutar lantarki kuma agogon suna shirye, mai amfani zai iya amfani da direbobin SDK don samun dama da sarrafa IPs yankin LPAV.
Tebu na 6 ya lissafa ƙarin takardu da albarkatu waɗanda za a iya magana da su don ƙarin bayani. Wasu daga cikin takaddun da aka jera a ƙasa na iya samuwa kawai a ƙarƙashin yarjejeniyar rashin bayyanawa (NDA). Don neman samun dama ga waɗannan takaddun, tuntuɓi injiniyan aikace-aikacen filin gida (FAE) ko wakilin tallace-tallace.
Tebur 6. Abubuwan da ke da alaƙa / albarkatu
Takardu | Hanyar haɗi/yadda ake shiga |
PCA9460, Gudanar da Wuta IC don i.MX 8ULP Data Sheet (takardar PCA9460DS) | Saukewa: PCA9460DS |
uPower Firmware Jagoran Mai Amfani (takardun UPOWERFWUG) | UPOWERFWUG |
i.MX 8ULP Processor Reference Manual (takardar i.MX8 ULPRM) Tuntuɓi NXP injiniyan aikace-aikacen filin gida (Frepresentative. | Tuntuɓi injiniyan aikace-aikacen filin gida na NXP (FAE) ko wakilin tallace-tallace. |
i.MX 8ULP Aikace-aikace Processor-Kayan Masana'antu (takardar IMX8ULPIEC) | Tuntuɓi injiniyan aikace-aikacen filin gida na NXP (FAE) ko wakilin tallace-tallace. |
MCUXpresso SDK Builder | https://mcuxpresso.nxp.com/en/welcome |
Karin bayani
Tebur 7 yana nuna suna, lambar ma'ana, da bit ga kowane maɓallan wuta.
Tebur 7. Wutar Wuta
Aiki | Maɓallin wutar lantarki mai ma'ana | Bit |
Saukewa: CM33 | PSO | 0 |
Fusion | PS1 | 1 |
A35[0]. | PS2 | 2 |
A35[1]. | PS3 | 3 |
Mercury L2 Cache [1] | PS4 | 4 |
Mai sauri NIC / Mercury | PS5 | 5 |
APD Periph | PS6 | 6 |
GPU3D | PS7 | 7 |
HiFi4 | PS8 | 8 |
DDR Controller | PS9 | 9 |
PXP, EPDC | PS13 | 10 |
MIPI-DSI | PS14 | 11 |
MIPI CSI | PS15 | 12 |
NIC AV / Periph | PS16 | 13 |
Fusion AO | PS17 | 14 |
FUSE | PS18 | 15 |
uPower | PS19 | 16 |
Tebur 8 yana nuna bit da sunan kowane mai sarrafa ɓangaren ƙwaƙwalwar ajiya.
Table 8. Ƙwaƙwalwar ƙwaƙwalwa ctrls
SRAM CTRL ARRAY_O (APD/LPAV) MaskO |
SRAM CTRL ARRAY_1 (RTD) Abin rufe fuska1 |
||
Bit | Ana sarrafa abubuwan tunawa | Bit | Ana sarrafa abubuwan tunawa |
0 | CA35 Core 0 L1 cache | 0 | Kasper RAM |
1 | CA35 Core 1 L1 cache | 1 | DMAO RAM |
2 | Farashin L2 | 2 | Farashin RAM |
3 | Farashin L2 | 3 | FIexSPIO FIFO, Buffer |
4 | L2 Cache wanda aka azabtar/tag | 4 | FlexSPI1 FIFO, Buffer |
5 | CAAM Amintaccen RAM | 5 | Saukewa: CM33 |
6 | DMA1 RAM | 6 | PowerQuad RAM |
7 | FlexSPI2 FIFO, Buffer | 7 | RAM ETF |
8 | SRAMO | 8 | Sentinel PKC, Data RAM1, Inst RAMO/1 |
9 | AD ROM | 9 | Sentinel ROM |
10 | USBO TX / RX RAM | 10 | uPower IRAM/DRAM |
11 | uSDHCO FIFO RAM | 11 | uPower ROM |
12 | USDHC1 FIFO RAM | 12 | Saukewa: CM33 |
13 | uSDHC2 FIFO da USB1 TX/RX RAM | 13 | Farashin SSRAM 0 |
14 | GIC RAM | 14 | Farashin SSRAM 1 |
15 | ENET TX FIXO | 15 | Farashin SSRAM 2,3,4 |
16 | Ajiye (Brainshift) | 16 | Farashin SSRAM 5 |
17 | DCNano Tile2Linear da Gyara RGB | 17 | Farashin SSRAM 6 |
18 | DCNano Cursor da FIFO | 18 | SSRAM Partition 7_a (128kB) |
19 | EDC LUT | 19 | Bangaren SSRAM 7_b (64kB) |
20 | EDC FIFO | 20 | Bangaren SSRAM 7_c (64kB) |
21 | DMA2 RAM | 21 | Bayanin Sentinel RAM0, Inst RAM2 |
22 | GPU2D RAM Group 1 | 22 | Ajiye |
23 | GPU2D RAM Group 2 | 23 | |
24 | GPU3D RAM Group 1 | 24 | |
25 | GPU3D RAM Group 2 | 25 | |
26 | HIFI4 Caches, IRAM, DRAM | 26 | |
27 | ISI Buffers | 27 | |
28 | MIPI-CSI FIFO | 28 | |
29 | MIPI-DSI FIFO | 29 | |
30 | PXP Caches, Buffers | 30 | |
31 | SRAM1 | 31 |
Lura game da lambar tushe a cikin takaddar
Examplambar da aka nuna a cikin wannan takaddar tana da haƙƙin mallaka mai zuwa da lasisin BSD-3-Clause:
Haƙƙin mallaka YYYY NXP Sake rarrabawa da amfani a cikin tushe da nau'ikan binariyoyi, tare da ko ba tare da gyare-gyare ba, an halatta su muddin an cika waɗannan sharuɗɗa:
- Sake rarraba lambar tushe dole ne a riƙe sanarwar haƙƙin mallaka na sama, wannan jeri na sharuɗɗan da rashin yarda mai zuwa.
- Sake rarrabawa a cikin nau'i na binary dole ne a sake fitar da sanarwar haƙƙin mallaka na sama, wannan jeri na sharuɗɗan da ƙetare mai zuwa a cikin takaddun da/ko wasu kayan dole ne a ba su tare da rarrabawa.
- Ba za a iya amfani da sunan mai haƙƙin mallaka ko sunayen waɗanda suka ba da gudummawar don amincewa ko haɓaka samfuran da aka samo daga wannan software ba tare da takamaiman izini kafin rubutaccen izini ba.
WANAN SOFTWARE ANA BAYAR DA MASU HAKKIN KYAUTA DA MASU BUDURWA “KAMAR YADDA AKE” DA DUK WANI GARANTIN BAYANI KO MAI GIRMA, HADA, AMMA BAI IYA IYAKA GA GARANTIN SAMUN KASANCEWA DA KWANCIYAR ARZIKI. BABU WANI FARKO MAI KYAUTA KO MASU BUDURWA BA ZA SU IYA LALHAKI GA DUK WANI SHARRI GASKIYA, GASKIYA, GASKIYA, MUSAMMAN, MISALI, KO SABODA HAKA (HAMI DA, AMMA BAI IYA IYAKA GA, SAMUN SAMUN SAUKI BA; KO RIBAR; KO KASANCEWAR KASUWANCI) DUK DA KUMA AKAN KOWANE KA'IDAR LAHADI, KO A KAN HANJILA, MATSALAR LAFIYA, KO AZABA (HAMI DA sakaci KO SAURAN) TASHIN KOWANE HANYA NA AMFANI DA HANYAR AMFANI DA HANYAR AMFANI DA HANYAR AMFANI DA HANYAR HANYA.
Tarihin bita
Tebur 9 yana taƙaita canje-canjen da aka yi ga wannan takaddar tun farkon fitowar.
Tebur 9. Tarihin bita
Lambar sake dubawa | Kwanan wata | Canje-canje masu mahimmanci |
0 | 30 ga Mayu 2023 | Sakin farko |
Bayanin doka
10.1 Ma'anoni
Daftarin aiki - Matsayin daftarin aiki akan takarda yana nuna cewa abun cikin har yanzu yana ƙarƙashin sake na cikiview kuma ƙarƙashin yarda na yau da kullun, wanda zai iya haifar da gyare-gyare ko ƙari. Semiconductor NXP ba ya ba da kowane wakilci ko garanti dangane da daidaito ko cikar bayanin da aka haɗa a cikin daftarin aiki kuma ba zai da wani alhaki ga sakamakon amfani da irin waɗannan bayanan.
10.2 Kwatancen
Garanti mai iyaka da abin alhaki - An yi imanin cewa bayanan da ke cikin wannan takarda cikakke ne kuma abin dogaro ne. Koyaya, Semiconductor NXP ba ya ba da kowane wakilci ko garanti, bayyana ko fayyace, dangane da daidaito ko cikar irin wannan bayanin kuma ba zai da alhakin sakamakon amfani da irin wannan bayanin. Semiconductor NXP ba sa ɗaukar alhakin abun ciki a cikin wannan takaddar idan tushen bayani ya samar da shi a wajen NXP Semiconductor.
Babu wani hali da NXP Semiconductors za su zama abin dogaro ga kowane kaikaice, na kwatsam, ladabtarwa, na musamman ko lahani (ciki har da - ba tare da iyakance asarar riba ba, asarar ajiyar kuɗi, katsewar kasuwanci, farashi mai alaƙa da cirewa ko maye gurbin kowane samfur ko cajin sake yin aiki) ko ko ba irin wannan lalacewar ta dogara ne akan azabtarwa (ciki har da sakaci), garanti, keta kwangila ko kowace ka'idar doka ba.
Ko da duk wani lahani da abokin ciniki zai iya haifar da kowane dalili, NXP Semiconductor' tara da kuma tara alhaki ga abokin ciniki don samfuran da aka bayyana anan za a iyakance su daidai da sharuɗɗan da sharuɗɗan siyar da kasuwanci na NXP Semiconductor.
Haƙƙin yin canje-canje - Semiconductors NXP suna da haƙƙin yin canje-canje ga bayanan da aka buga a cikin wannan takaddar, gami da ba tare da ƙayyadaddun ƙayyadaddun ƙayyadaddun bayanai da kwatancen samfur ba, a kowane lokaci kuma ba tare da sanarwa ba. Wannan takaddar ta maye gurbin duk bayanan da aka kawo kafin buga wannan.
Dace da amfani Ba a tsara samfuran Semiconductor na NXP, izini ko garantin dacewa don dacewa da amfani a cikin tallafin rayuwa, tsarin rayuwa mai mahimmanci ko aminci-m tsarin ko kayan aiki, ko a aikace-aikacen da gazawa ko rashin aiki na samfurin Semiconductor NXP zai iya haifar da kyakkyawan sakamako. rauni na mutum, mutuwa ko mummunar dukiya ko lalacewar muhalli. Semiconductor NXP da masu ba da kayan sa ba su yarda da wani alhaki don haɗawa da/ko amfani da samfuran Semiconductor NXP a cikin irin waɗannan kayan aiki ko aikace-aikace don haka irin wannan haɗawa da/ko amfani yana cikin haɗarin abokin ciniki.
Aikace-aikace - Aikace-aikacen da aka siffanta a nan don kowane ɗayan waɗannan samfuran don dalilai ne kawai. Semiconductor NXP baya yin wakilci ko garanti cewa waɗannan aikace-aikacen zasu dace da ƙayyadadden amfani ba tare da ƙarin gwaji ko gyara ba.
Abokan ciniki suna da alhakin ƙira da aiki na aikace-aikacensu da samfuransu ta amfani da samfuran Semiconductor NXP, kuma Semiconductor NXP ba su yarda da wani alhaki ga kowane taimako tare da aikace-aikace ko ƙirar samfurin abokin ciniki. Haƙƙin abokin ciniki ne kaɗai don tantance ko samfurin Semiconductor NXP ya dace kuma ya dace da aikace-aikacen abokin ciniki da samfuran da aka tsara, haka kuma don aikace-aikacen da aka tsara da amfani da abokin ciniki na ɓangare na uku. Abokan ciniki yakamata su samar da ƙira da suka dace da kariyar aiki don rage haɗarin da ke tattare da aikace-aikacen su da samfuran su.
Semiconductor NXP ba ya karɓar duk wani abin alhaki da ke da alaƙa da kowane tsoho, lalacewa, farashi ko matsala wanda ya dogara da kowane rauni ko tsoho a aikace-aikacen abokin ciniki ko samfuran, ko aikace-aikacen ko amfani da abokin ciniki (s) na ɓangare na uku. Abokin ciniki yana da alhakin yin duk gwajin da ake buƙata don aikace-aikacen abokin ciniki da samfuran ta amfani da samfuran Semiconductor NXP don guje wa tsoho na aikace-aikacen da samfuran ko na aikace-aikacen ko amfani da abokin ciniki (s) na ɓangare na uku. NXP ba ta karɓar kowane alhaki ta wannan fuskar.
Sharuɗɗa da sharuɗɗan siyarwar kasuwanci - Ana siyar da samfuran Semiconductor NXP bisa ga ƙa'idodi da sharuɗɗan siyarwar kasuwanci, kamar yadda aka buga a http://www.nxp.com/profile/ sharuɗɗan, sai dai in akasin haka an yarda a cikin ingantacciyar yarjejeniya ta mutum ɗaya. Idan aka kulla yarjejeniya ta mutum ɗaya kawai sharuɗɗa da sharuɗɗan yarjejeniyar za su yi aiki. NXP Semiconductor ta haka ne a bayyane abubuwa don amfani da sharuɗɗa da sharuɗɗan abokin ciniki game da siyan samfuran Semiconductor NXP ta abokin ciniki.
Ikon fitarwa - Wannan daftarin aiki da kuma abu(s) da aka kwatanta a nan na iya kasancewa ƙarƙashin ƙa'idodin sarrafa fitarwa. Fitarwa na iya buƙatar izini kafin izini daga manyan hukumomi.
Dace don amfani a cikin samfuran da ba na mota ba - Sai dai idan wannan takardar bayanan ta bayyana a sarari cewa wannan takamaiman samfurin Semiconductor NXP ya cancanci kera, samfurin bai dace da amfani da mota ba. Ba shi da cancanta ko gwada shi daidai da gwajin mota ko buƙatun aikace-aikace. Semiconductors NXP ba su yarda da wani alhaki don haɗawa da/ko amfani da samfuran da ba na kera ba a cikin kayan aikin mota ko aikace-aikace.
A yayin da abokin ciniki ya yi amfani da samfurin don ƙira da amfani a aikace-aikacen kera zuwa ƙayyadaddun kera motoci da ƙa'idodi, abokin ciniki (a) zai yi amfani da samfurin ba tare da garantin NXP Semiconductor na samfurin don irin waɗannan aikace-aikacen kera ba, amfani da ƙayyadaddun bayanai, da ( b) duk lokacin da abokin ciniki ya yi amfani da samfurin don aikace-aikacen mota fiye da ƙayyadaddun bayanan Semiconductor na NXP irin wannan amfani zai kasance cikin haɗarin abokin ciniki ne kawai, kuma (c) abokin ciniki yana ba da cikakken lamuni na Semiconductor NXP ga duk wani abin alhaki, lalacewa ko gazawar samfurin samfur sakamakon ƙira da amfani da abokin ciniki. Samfurin don aikace-aikacen kera fiye da daidaitaccen garanti na Semiconductor NXP da ƙayyadaddun samfur na Semiconductor NXP.
Fassara - Sigar da ba ta Ingilishi ba (fassara) na takarda, gami da bayanan doka a waccan takardar, don tunani ne kawai. Fassarar Ingilishi za ta yi nasara idan aka sami sabani tsakanin fassarar da Ingilishi.
Tsaro - Abokin ciniki ya fahimci cewa duk samfuran NXP na iya kasancewa ƙarƙashin lahani waɗanda ba a tantance su ba ko kuma suna iya tallafawa ƙaƙƙarfan ƙa'idodin tsaro ko ƙayyadaddun ƙayyadaddun ƙayyadaddun ƙayyadaddun ƙayyadaddun ƙayyadaddun ƙayyadaddun ƙayyadaddun ƙayyadaddun bayanai. Abokin ciniki yana da alhakin ƙira da aiki na aikace-aikacensa da samfuransa a duk tsawon rayuwarsu don rage tasirin waɗannan raunin akan aikace-aikacen abokin ciniki da samfuran. Har ila yau, alhakin abokin ciniki ya ƙara zuwa wasu buɗaɗɗen da/ko fasahohin mallakar mallaka waɗanda samfuran NXP ke tallafawa don amfani a aikace-aikacen abokin ciniki. NXP ba ta yarda da wani alhaki ga kowane rauni. Abokin ciniki yakamata ya duba sabuntawar tsaro akai-akai daga NXP kuma ya bi su daidai.
Abokin ciniki zai zaɓi samfuran da ke da fasalulluka na tsaro waɗanda suka fi dacewa da ƙa'idodi, ƙa'idodi, da ƙa'idodi na aikace-aikacen da aka yi niyya kuma su yanke yanke shawara na ƙarshe game da samfuran sa kuma ke da alhakin kawai don biyan duk wasu buƙatu na doka, tsari da tsaro game da samfuran sa, ko da kuwa na kowane bayani ko tallafi wanda NXP zai iya bayarwa.
NXP yana da Tawagar Amsa Taimako na Tsaron Samfur (PSIRT) (ana iya kaiwa a PSIRT@nxp.com) wanda ke gudanar da bincike, bayar da rahoto, da sakin mafita ga raunin tsaro na samfuran NXP.
NXP BV – NXP BV ba kamfani ne mai aiki ba kuma baya rarraba ko siyar da kayayyaki.
Alamomin kasuwanci
Sanarwa: Duk samfuran da aka ambata, sunayen samfur, sunayen sabis, da alamun kasuwanci mallakar masu su ne.
NXP - alamar kalma da tambari alamun kasuwanci ne na NXP BV
AMBA, Arm, Arm7, Arm7TDMI, Arm9, Arm11, Artisan, big.LITTLE, Cordio, CoreLink, CoreSight, Cortex, DesignStart, DynamIQ, Jazelle, Keil, Mali, Mbed, Mbed Enabled, NEON, POP, RealView, SecurCore, Socrates, Thumb, TrustZone, ULINK, ULINK2, ULINK-ME, ULINKPLUS, ULINKpro, μVision, m - alamun kasuwanci ne da/ko alamun kasuwanci masu rijista na Arm Limited (ko rassan sa ko alaƙa) a cikin Amurka da/ko wani wuri. Ana iya kiyaye fasahar da ke da alaƙa ta kowane ko duk abubuwan haƙƙin mallaka, haƙƙin mallaka, ƙira da sirrin kasuwanci. An kiyaye duk haƙƙoƙi.
EdgeLock - alamar kasuwanci ce ta NXP BV
i.MX - alamar kasuwanci ce ta NXP BV
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Ranar fitarwa: 30 Mayu 2023
Takardar bayanai:AN13951
NXP Semiconductors"
AN13951
Inganta Amfanin Wuta na i.MX 8ULP
Takardu / Albarkatu
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NXP AN13951 Inganta Amfanin Wuta don i.MX 8ULP [pdf] Jagorar mai amfani AN13951, AN13951 Inganta Amfani da Wutar Lantarki na i.MX 8ULP |