Fa'ailoga Fa'ailoga INTEL

Intel Corporation, tala'aga - Intel Corporation, fa'ailogaina e pei o le intel, o se fa'alapotopotoga fa'apisinisi tele a Amerika ma kamupani fa'atekonolosi o lo'o fa'auluulu i Santa Clara. webnofoaga o Intel.com.

E mafai ona maua i lalo se lisi o tusi fa'aoga ma fa'atonuga mo oloa Intel. O oloa a Intel e pateni ma fa'ailogaina i lalo ole fa'ailoga Intel Corporation.

Fa'amatalaga Fa'afeso'ota'i:

tuatusi: 2200 Mission College Blvd, Santa Clara, CA 95054, Iunaite Setete
Numera telefoni: +1 408-765-8080
Aofai o tagata faigaluega: 110200
Fa'atuina: Iulai 18, 1968
Fa'avae: Gordon Moore, Robert Noyce & Andrew Grove
Tagata Autu: Andy D. Bryant, Reed E. Hundt

intel DisplayPort Agilex F-Tile FPGA IP Design Example User Guide

A'oa'o pe fa'apefea ona fa'ata'atia ma le DisplayPort Agilex F-Tile FPGA IP Design Exampfa'atasi ai ma le ta'iala fa'afou mo le Intel's Quartus Prime Design Suite 21.4. Fa'aalia se fa'ata'ita'iga fa'ata'ita'iga ma fa'ata'ita'iga meafaigaluega, o lenei fa'ailoga IPample lagolago tu'ufa'atasiga ma su'ega meafaigaluega. Su'e le mamanu lagolago examples ma le fausaga o le lisi, ma amata i le DisplayPort Intel FPGA IP i aso nei.

intel AN 903 Faʻavaveina Taimi Tapuni Taiala Tagata Faʻaaoga

A'oa'o pe fa'apefea ona fa'avave le tapuni taimi mo au fa'ata'ita'iga FPGA fa'atasi ai ma le polokalama Intel® Quartus® Prime Pro Edition. O le AN 903 o loʻo ofoina atu se auala faʻamaonia ma toe faʻaaogaina e aofia ai suʻesuʻega a le RTL, faʻataʻitaʻiga, ma auala faʻapitoa. Mulimuli i laasaga faigofie e tolu e faʻaitiitia ai le taimi faʻapipiʻi ma faʻaitiitia le lavelave o mamanu.

intel AN 951 Stratix 10 IO Limited FPGA Design Guidelines Guidelines User Guide

A'oa'o pe fa'apefea ona mamanuina faiga FPGA e fa'aaoga ai AN 951 Stratix 10 IO Limited FPGA Design Guidelines e Intel. O lenei ta'iala o lo'o tu'uina atu ai fa'atonuga fa'apitoa mo le fa'aogaina o IO Limited FPGAs ma o latou tapula'a, e aofia ai le fa'aogaina o le transceiver ma numera o pine GPIO. E fetaui lelei mo i latou o lo'o saili e galulue i totonu o tapula'a fa'atau atu.

intel NUC11PAHi7 Fale & Pisinisi Desktop Mainsteam Kit Taiala

O lenei tusi fa'aoga o lo'o tu'uina atu ai fa'atonuga fa'apipi'i i lea la'asaga mo le Intel NUC11PAHi7, NUC11PAHi5, ma le NUC11PAHi3 Home & Business Desktop Mainstream Kits. A'oa'o e uiga i fa'aletonu o mamanu ma fa'aletonu, fa'apea fo'i foliga ma fa'amanuiaga o tekonolosi Intel. Ia mautinoa ua e masani i upu komepiuta ma faiga saogalemu a'o le'i amataina le fa'apipi'i.

intel Ausia e oo atu i le 4.96 Taimi le BERT-Large Inference User Guide

Saili pe faʻapefea ona ausia le 4.96 taimi ole BERT-Large inference ma le 3rd Gen Intel Xeon Scalable processors ile M6i instances. O lenei ta'iala fa'aoga e fa'atusatusaina le fa'atinoga o fa'ata'ita'iga M6i ma M6g fa'atasi ai ma AWS Graviton2 fa'agaioiga mo galuega fa'aa'oa'oga fa'alenatura masini. Su'e pe fa'afefea ona maua e pisinisi se poto vave a'o maua lelei le fa'atinoga ile tala ile M6i taimi. Aoao atili e uiga i le BERT-Large faʻataʻitaʻiga ma pe faʻapefea ona suʻeina lona faʻatinoga e faʻaaoga ai le TensorFlow framework.

intel FPGA Programmable Acceleration Card N3000 Board Management Pule Ta'iala mo Tagata Ta'iala

A'oa'o e uiga i le Intel FPGA Programmable Acceleration Card N3000 Board Management Controller e ala i lenei taiala fa'aoga. Malamalama i ana galuega, foliga, ma pe faʻapefea ona faitau faʻamatalaga telemetry e faʻaaoga ai le PLDM i luga ole MCTP SMBus ma le I2C SMBus. Su'esu'e pe fa'afefea ona pulea e le BMC le malosi, fa'afou le firmware, fa'atautaia le fa'atulagaina o le FPGA ma le telemetry fa'amatalaga palota, ma fa'amautinoa fa'afouga mamao mamao. Maua se folasaga ile Intel MAX 10 root of trust and more.

intel 50G Ethernet Design Example User Guide

A'oa'o pe fa'apefea ona mamanuina se feso'otaiga 50G Ethernet ma le Intel's 50G Ethernet Design Example. O lenei ta'iala vave amata o lo'o tu'uina atu ai se fa'ata'ita'iga o meafaigaluega fa'apeaample ma simulation testbench mo le Arria 10 GT masini, faʻamaeʻaina ma se faʻatonuga faʻatulagaina ma faʻataʻitaʻiga faʻatonu. La'u mai le mamanu tu'ufa'atasia ma fa'afeso'ota'i le Intel FPGA mo nisi fa'amatalaga.

UG-20219 Fa'asinoala i fafo Intel Agilex FPGA IP Design Example User Guide

O lenei tusi fa'aoga e tu'uina atu ai fa'amatalaga au'ili'ili e uiga i External Memory Interfaces Intel Agilex FPGA IP Design Example, e aofia ai faʻamatalaga tuʻuina atu, faʻamatalaga IP, ma mamanu lautele example galuega. E aofia ai foʻi se taʻiala vave amata mo le fatuina o se poloketi EMIF. O lenei ta'iala e fa'atatau ile Intel Quartus Prime software versions up to v19.1 ma e fetaui ma Intel FPGA development kits.

intel Native Loopback Accelerator Functional Unit (AFU) User Guide

A'oa'o e uiga i le Intel Native Loopback Accelerator Functional Unit (AFU) ma ona foliga fa'atasi ai ma lenei tusi fa'aoga atoatoa. Malamalama i le AFU Simulation Environment, Core Cache Interface, FPGA Interface Manager, ma isi mea. Su'esu'e pe fa'afefea ona fa'aleleia e le masini fa'avavevave le fa'atinoga e ala i le tu'u ese o galuega fa'akomepiuta mai le PPU.