Secure IP Flow for IP Vendors and Libero SoC User Guide

Microchip Technology introduces a secure IP design flow for its silicon families, including SmartFusion® 2, IGLOO® 2, RTG4™, PolarFire®, and PolarFire SoC. This guide details the implementation of the IEEE 1735-2014 standard for IP core encryption, ensuring both security and interoperability with various Electronic Design Automation (EDA) tools.

The document outlines the necessary software and hardware requirements, including specific versions of Libero SoC, Synplify Pro, and ModelSim. It covers the encryption process, detailing the use of symmetric and asymmetric encryption algorithms, encryption envelopes, and the encryptP1735.pl script. Furthermore, the guide provides step-by-step instructions on how to run Libero SoC with encrypted IP, covering synthesis, simulation, and layout stages.

Key aspects discussed include managing public keys from EDA vendors, adding encryption envelopes to RTL code, and understanding the output of the encryption process. The guide also addresses frequently asked questions and provides a revision history of the document.

For detailed information on Microchip's FPGA support and legal notices, please refer to the respective sections within the document.

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Secure IP Flow for IP Vendors and Libero SoC User Guide

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