GOWIN GW5AT Series FPGA Package and Pinout Manual

Introduction to the GW5AT Series FPGA

The GOWIN GW5AT Series FPGA products are part of the GOWIN Semiconductor's Chenxi family. These FPGAs feature rich internal resources, a novel architecture, and high-performance DSPs with AI acceleration capabilities. They also support high-speed LVDS interfaces and offer abundant BSRAM memory resources. The series is available in various package types, catering to low-power, high-performance, and compatibility-driven applications.

GOWIN Semiconductor also provides an independently developed, next-generation FPGA hardware development environment. This environment supports the GW5AT Series FPGA, enabling a comprehensive workflow that includes FPGA synthesis, placement, routing, bitstream generation, and programming.

Key Features and Documentation

This manual serves as a detailed guide to the package and pinout specifications for the GW5AT Series FPGAs. It covers:

  • Package types and their characteristics
  • Pin definitions and descriptions
  • Pin count tables for different models
  • Pinout diagrams for various packages
  • Package dimensions and recommended PCB layout guidelines

For further technical details and related documentation, please visit the GOWIN Semiconductor website at www.gowinsemi.com. Relevant documents include:

  • DS981: GW5AT Series FPGA Product Datasheet
  • UG982: GW5AT-138 Device Pinout Manual
  • UG1221: GW5AT-75 Device Pinout Manual
  • UG1222: GW5AT-60 Device Pinout Manual
  • UG1224: GW5AT-15 Device Pinout Manual

Technical Support

GOWIN Semiconductor offers comprehensive technical support. For any inquiries or suggestions regarding the GW5AT Series FPGAs, please contact GOWIN Semiconductor directly:

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