BOARDCON Mini3568 Cyfrifiadur ar Fodiwl
Gwybodaeth Cynnyrch
Manylebau
| Nodwedd | Manylebau |
|---|---|
| CPU | Cortecs cwad-craidd-A55 |
| DDR | 2GB DDR4 (hyd at 8GB) |
| eMMC | 8GB (hyd at 128GB) |
| FFLACH | DC 3.4 ~ 5V |
| Grym | Pŵer arwahanol ar fwrdd |
| LVDS / MIPI DSI | 2-CH LVDS neu Du-LVDS, 2-CH MIPI DSI |
| I2S | 3-CH |
| MIPI CSI | 1-CH DVP a 2-CH 2-Lane CSI neu 1-CH 4-Lane CSI |
| SATA | 3-CH |
| PCIe | 1-CH PCIe 2.0 ac 1-CH PCIe 3.0 |
| HDMI allan | 1-CH |
| CAN | 2-CH |
| USB | 2-CH (USB HOST2.0), 1-CH (OTG 2.0) ac 1-CH (USB 3.0) |
| Ethernet | 2-ch GMAC: GMDI, GMII a QSGMII 1GB PHY (RTL8211F) ar y craidd bwrdd |
| SDMC/SDIO | 2-CH |
| SPDIF TX | 1-CH |
| I2C | 5-CH |
| SPI | 4-CH |
| UART | 8-CH, 1-CH(DEBUG) |
| PWM | 14-CH |
| ADC YN | 2-CH |
| Dimensiwn Bwrdd | 70 x 58mm |
Cyfarwyddiadau Defnydd Cynnyrch
Sefydlu System-ar-Fodiwl Mini3568:
- Sicrhewch fod system-ar-fodiwl Mini3568 wedi'i osod yn ddiogel ar y bwrdd datblygu.
- Cysylltwch y perifferolion gofynnol fel mewnbwn pŵer, rhyngwynebau arddangos, dyfeisiau USB, a cheblau Ethernet â'u porthladdoedd priodol ar y Mini3568.
- Pŵer ar y Mini3568 trwy gyflenwi DC sefydlog cyftage o fewn yr ystod benodedig (3.4 ~ 5V).
- Mae'r system bellach yn barod i'w defnyddio. Dilynwch eich gofynion cais penodol i ddefnyddio'r Mini3568 yn effeithiol.
Cwestiynau Cyffredin (FAQ)
- C: Beth yw prif gymwysiadau system-ar-fodiwl Mini3568?
A: Mae'r Mini3568 wedi'i gynllunio ar gyfer cymwysiadau amrywiol gan gynnwys rheolwyr diwydiannol, dyfeisiau IoT, dyfeisiau rhyngweithiol deallus, cyfrifiaduron personol, a robotiaid. - Q: Beth yw'r uchafswm capasiti RAM a gefnogir gan y Mini3568?
A: Mae'r Mini3568 yn cefnogi DDR4 RAM gyda chynhwysedd o hyd at 8GB.
Rhagymadrodd
Am y Llawlyfr hwn
Bwriad y llawlyfr hwn yw rhoi trosodd i'r defnyddiwrview o'r bwrdd a buddion, manylebau nodweddion cyflawn, a gweithdrefnau sefydlu. Mae'n cynnwys gwybodaeth ddiogelwch bwysig hefyd.
Adborth a Diweddariad i'r Llawlyfr hwn
- Er mwyn helpu ein cwsmeriaid i wneud y gorau o'n cynnyrch, rydym yn barhaus yn sicrhau bod adnoddau ychwanegol a diweddar ar gael ar y Boardcon websafle (www.boardcon.com, www.armdesigner.com).
- Mae'r rhain yn cynnwys llawlyfrau, nodiadau cais, rhaglennu examples, a meddalwedd a chaledwedd wedi'u diweddaru. Dewch i mewn o bryd i'w gilydd i weld beth sy'n newydd!
- Pan fyddwn yn blaenoriaethu gwaith ar yr adnoddau hyn wedi'u diweddaru, adborth gan gwsmeriaid yw'r dylanwad mwyaf, Os oes gennych gwestiynau, sylwadau neu bryderon am eich cynnyrch neu brosiect, mae croeso i chi gysylltu â ni yn cefnogaeth@armdesigner.com.
Gwarant Cyfyngedig
- Mae Boardcon yn gwarantu bod y cynnyrch hwn yn rhydd o ddiffygion mewn deunydd a chrefftwaith am flwyddyn o'r dyddiad prynu. Yn ystod y cyfnod gwarant hwn, bydd Boardcon yn atgyweirio neu'n disodli'r uned ddiffygiol o dan y broses ganlynol:
- Rhaid cynnwys copi o'r anfoneb wreiddiol wrth ddychwelyd yr uned ddiffygiol i Boardcon. Nid yw'r warant gyfyngedig hon yn cynnwys iawndal sy'n deillio o oleuadau neu ymchwyddiadau pŵer eraill, camddefnyddio, cam-drin, amodau gweithredu annormal, neu ymdrechion i newid neu addasu swyddogaeth y cynnyrch.
- Mae'r warant hon yn gyfyngedig i atgyweirio neu ailosod yr uned ddiffygiol. Ni fydd Boardcon mewn unrhyw achos yn atebol nac yn gyfrifol am unrhyw golled neu iawndal, gan gynnwys ond heb fod yn gyfyngedig i unrhyw elw a gollwyd, iawndal achlysurol neu ganlyniadol, colli busnes, neu elw rhagweladwy sy'n deillio o ddefnyddio'r cynnyrch hwn neu anallu i'w ddefnyddio.
- Mae atgyweiriadau a wneir ar ôl i'r cyfnod gwarant ddod i ben yn destun tâl atgyweirio a chost llongau dychwelyd. Cysylltwch â Boardcon i drefnu unrhyw wasanaeth atgyweirio ac i gael gwybodaeth am daliadau atgyweirio.
Crynodeb
- Mae system-ar-fodiwl Mini3568 wedi'i gyfarparu â RK3568 Rockchip. Mae ganddo quad-core Cortex-A55, Mali-G52 GPU, a 0.8TOPs NPU.
- Fe'i cynlluniwyd yn benodol ar gyfer dyfeisiau AI fel rheolwyr diwydiannol, dyfeisiau IoT, dyfeisiau rhyngweithiol deallus, cyfrifiaduron personol, a robotiaid. Gall yr ateb perfformiad uchel a phŵer isel helpu cwsmeriaid i gyflwyno technolegau newydd yn gyflymach a gwella effeithlonrwydd datrysiad cyffredinol.
- Yn benodol, mae'r Mini3568 yn defnyddio DDR4 gydag ECC ar gyfer gwaith 7 * 24h.
Nodweddion
- Microbrosesydd
- Cortex-A55 Quad-core hyd at 1.8GHz
- I-cache 32KB a 32KB D-cache ar gyfer pob craidd, storfa 512KB L3
- Mali-G52 hyd at 0.8GHz
- 1.0 TOPS Uned Prosesau Niwral
Sefydliad Cof - RAM DDR4 hyd at 8GB
- EMMC hyd at 128GB
- Boot ROM
- Yn cefnogi lawrlwytho cod system trwy USB OTG neu SD
- System Amgylchedd Gweithredu Ymddiriedolaeth
- Yn cefnogi OTP diogel ac injan seiffr lluosog
- Datgodiwr Fideo / Amgodiwr
- Yn cefnogi datgodio fideo hyd at 4K@60fps
- Cefnogi amgodio H.264
- H.264 HP amgodio hyd at 1080p@30fps
- Maint llun hyd at 8192 × 8192
- Is-System Arddangos
- Allbwn Fideo
- Yn cefnogi trosglwyddydd HDMI 2.0 gyda HDCP 1.4 / 2.2, hyd at 4K@60fps
- Yn cefnogi 8/4 lonydd MIPI DSI hyd at 2560 × 1440@60fps
- Neu ryngwyneb Du-LVDS hyd at 1920 × 1080@60fps
- Yn cefnogi rhyngwyneb ePD1.3 hyd at 2560 × 1600@30fps
- Yn cefnogi allbwn BT-656 8bit
- Yn cefnogi allbwn BT-1120 16bit
- Cefnogi allbwn RGB TTL 24bits
- Cefnogwch dri arddangosfa gyda ffynhonnell wahanol
- Mewnbwn Delwedd
- Yn cefnogi rhyngwyneb MIPI CSI 4lanes neu ryngwynebau 2ch MIPI CSI 2lanes
- Yn cefnogi rhyngwyneb DVP 8 ~ 16bit
- Yn cefnogi mewnbwn BT-656 8bit
- Yn cefnogi mewnbwn 1120 ~ 8bit BT-16
- Allbwn Fideo
- I2S/PCM
- Tri rhyngwyneb I2S/PCM
- Cefnogi arae Mic Hyd at 8ch PDM/TDM rhyngwyneb
- Un allbwn SPDIF
- USB a PCIE
- Tri rhyngwyneb USB 2.0
- Tri rhyngwyneb SATA
- Neu QSGMII + Un gwesteiwr USB3.0.
- Neu Dau westeiwr USB3.0 + Un lôn 1 PCIe 2.0.
- Un rhyngwyneb PCIe 3.0
- Ethernet
- RTL8211F ar fwrdd
- Cefnogi GMAC/EMAC a QSGMII
- Cefnogi cyfraddau trosglwyddo data 10/100/1000Mbit/s
- Cefnogi ethernet deuol
- I2C
- Hyd at Bum I2C
- Cefnogi modd safonol a modd cyflym (hyd at 400kbit yr eiliad)
- SDIO
- Cefnogi protocol SDIO 3.0
- SPI
- Hyd at bedwar rheolydd SPI,
- Rhyngwyneb cyfresol cydamserol deublyg llawn
- UART
- Cefnogi hyd at 9 UARTs
- UART2 gyda 2 wifren ar gyfer offer dadfygio
- Gwreiddio dau FIFO 64byte
- Cefnogi modd rheoli llif ceir ar gyfer UART1-5
- SATA
- Tri rheolydd gwesteiwr SATA
- Cefnogi SATA 1.5Gb/s, 3.0Gb/s a SATA 6.0Gb/s
- ADC
- Hyd at ddwy sianel ADC
- Cydraniad 10-did
- Cyftage ystod mewnbwn rhwng 0V i 1.8V
- Cefnogaeth hyd at 1MS/ssampcyfradd ling
- PWM
- 14 PWM ar sglodion gyda gweithrediad yn seiliedig ar ymyrraeth
- Cefnogi cyfleuster amser/cownter 32bit
- Opsiwn IR ar PWM3/7/11/15
- Uned bŵer
- Pŵer arwahanol ar fwrdd
- Mewnbwn sengl 3.4-5V
- RTC isel iawn yn defnyddio cerrynt, llai 5uA ar gell botwm 3V
- Allbwn 3.3V ar y mwyaf 500mA
Diagram Bloc
Diagram Bloc RK3568
Diagram Bloc bwrdd datblygu
Manylebau
| Nodwedd | Manylebau |
| CPU | Cortecs cwad-craidd-A55 |
| DDR | 2GB DDR4 (hyd at 8GB) |
| eMMC FFLACH | 8GB (hyd at 128GB) |
| Grym | DC 3.4 ~ 5V |
| LVDS / MIPI DSI | 2-CH LVDS neu Du-LVDS, 2-CH MIPI DSI |
| I2S | 3-CH |
| MIPI CSI | 1-CH DVP a 2-CH 2-Lane CSI neu 1-CH 4-Lane CSI |
| SATA | 3-CH |
| PCIe | 1-CH PCIe 2.0 ac 1-CH PCIe 3.0 |
| HDMI allan | 1-CH |
| CAN | 2-CH |
| USB | 2-CH (USB HOST2.0), 1-CH (OTG 2.0) ac 1-CH (USB 3.0) |
| Ethernet | 2-ch GMAC: GMDI, GMII a QSGMII
1GB PHY (RTL8211F) ar fwrdd craidd. |
| SDMC/SDIO | 2-CH |
| SPDIF TX | 1-CH |
| I2C | 5-CH |
| SPI | 4-CH |
| UART | 8-CH, 1-CH(DEBUG) |
| PWM | 14-CH |
| ADC YN | 2-CH |
| Dimensiwn Bwrdd | 70 x 58mm |
Dimensiwn PCB
Diffiniad Pin
| J1 | Arwydd | Disgrifiad neu swyddogaethau | cyfresol GPIO | IO Cyftage |
| 1 | HDMI_TXCN | 0.5V | ||
| 2 | HDMI_TX0N | 0.5V | ||
| 3 | HDMI_TXCP | 0.5V | ||
| 4 | HDMI_TX0P | 0.5V | ||
| 5 | GND | Daear | 0V | |
| 6 | GND | Daear | 0V | |
| 7 | HDMI_TX1N | 0.5V |
| 8 | HDMI_TX2N | 0.5V | ||
| 9 | HDMI_TX1P | 0.5V | ||
| 10 | HDMI_TX2P | 0.5V | ||
| 11 | HDMI_HPD | Mewnbwn HDMI HPD | 3.3V | |
| 12 | HDMI_CEC | HDMI_CEC/SPI3_CS1_M1 | GPIO4_D1_u | 3.3V |
| 13 | I2C_SDA_HDMI | I2C5_SDA_M1 | GPIO4_D0_u | 3.3V |
| 14 | I2C_SCL_HDMI | I2C5_SCL_M1 | GPIO4_C7_u | 3.3V |
| 15 | GND | Daear | 0V | |
|
16 |
LCDC_VSYNC/
UART5_TX_M1 |
VOP_BT1120_D14/SPI1_MI
SO_M1/I2S1_SDO3_M2 |
GPIO3_C2_d |
3.3V |
|
17 |
LCDC_HSYNC/
PCIE20_PERSTn_M1 |
VOP_BT1120_D13/SPI1_MO
SI_M1/I2S1_SDO2_M2 |
GPIO3_C1_d |
3.3V |
|
18 |
LCDC_CLK/
UART8_RX_M1 |
VOP_BT1120_CLK/SPI2_CL
K_M1/I2S1_SDO1_M2 |
GPIO3_A0_ch |
3.3V |
|
19 |
LCDC_DEN/
UART5_RX_M1 |
VOP_BT1120_D15/SPI1_CL
K_M1/I2S1_SCLK_RX_M2 |
GPIO3_C3_d |
3.3V |
| 20 | LVDS_MIPI_TX_D0P | LVDS0 neu MIPI0 DSI D0P TX | Nodyn(1) | 0.5V |
| 21 | LVDS_MIPI_TX_D0N | LVDS0 neu MIPI0 DSI D0N TX | Nodyn(1) | 0.5V |
| 22 | LVDS_MIPI_TX_D1P | LVDS0 neu MIPI0 DSI D1P TX | Nodyn(1) | 0.5V |
| 23 | LVDS_MIPI_TX_D1N | LVDS0 neu MIPI0 DSI D1N TX | Nodyn(1) | 0.5V |
| 24 | LVDS_MIPI_TX_D2P | LVDS0 neu MIPI0 DSI D2P TX | Nodyn(1) | 0.5V |
| 25 | LVDS_MIPI_TX_D2N | LVDS0 neu MIPI0 DSI D2N TX | Nodyn(1) | 0.5V |
| 26 | LVDS_MIPI_TX_D3P | LVDS0 neu MIPI0 DSI D3P TX | Nodyn(1) | 0.5V |
| 27 | LVDS_MIPI_TX_D3N | LVDS0 neu MIPI0 DSI D3N TX | Nodyn(1) | 0.5V |
|
28 |
LCDC_D8/GPIO3_A1 |
VOP_BT1120_D0/SPI1_CS0
_M1/PCIe30x1_PERSTn_M1 |
GPIO3_A1_ch |
3.3V |
|
29 |
LCDC_D9/I2S3_MCLK
_M0 |
VOP_BT1120_D1 |
GPIO3_A2_ch |
3.3V |
|
30 |
LVDS_MIPI_TX_CLKP |
LVDS0 neu MIPI0 DSI CLKP
TX |
Nodyn(1) |
0.5V |
|
31 |
LVDS_MIPI_TX_CLKN |
LVDS0 neu MIPI0 DSI CLKN
TX |
Nodyn(1) |
0.5V |
|
32 |
LCDC_D10/I2S3_SCL
K_M0 |
VOP_BT1120_D2 |
GPIO3_A3_ch |
3.3V |
|
33 |
LCDC_D11/I2S3_LRCK
_M0 |
VOP_BT1120_D3 |
GPIO3_A4_ch |
3.3V |
|
34 |
LCDC_D12/I2S3_SDO
_M0 |
VOP_BT1120_D4 |
GPIO3_A5_ch |
3.3V |
|
35 |
LCDC_D13/I2S3_SDI_
M0 |
VOP_BT1120_CLK |
GPIO3_A6_ch |
3.3V |
| 36 | LCDC_D14/GPIO3_A7 | VOP_BT1120_D5 | GPIO3_A7_ch | 3.3V |
| 37 | LCDC_D15/GPIO3_B0 | VOP_BT1120_D6 | GPIO3_B0_ch | 3.3V |
|
38 |
LCDC_D16/UART4_RX
_M1 |
VOP_BT1120_D7/PWM8_M
0 |
GPIO3_B1_ch |
3.3V |
|
39 |
LCDC_D17/UART4_TX
_M1 |
VOP_BT1120_D8/PWM9_M
0 |
GPIO3_B2_ch |
3.3V |
|
40 |
LCDC_D18/I2C5_SCL_
M0 |
VOP_BT1120_D9/PDM_SDI
0_M2 |
GPIO3_B3_ch |
3.3V |
|
41 |
LCDC_D19/I2C5_SDA
_M0 |
VOP_BT1120_D10/PDM_SD
I1_M2 |
GPIO3_B4_ch |
3.3V |
|
42 |
LCDC_D20/GPIO3_B5 |
VOP_BT1120_D11/PWM10_
M0/I2C3_SCL_M1 |
GPIO3_B5_ch |
3.3V |
|
43 |
LCDC_D21/PWM11_IR
_M0 |
VOP_BT1120_D12/I2C3_SD
A_M1 |
GPIO3_B6_ch |
3.3V |
| 44 | GND | Daear | 0V | |
| 45 | MIPI_CSI_RX_CLK0N | 0.5V | ||
| 46 | MIPI_CSI_RX_D0P | 0.5V | ||
| 47 | MIPI_CSI_RX_CLK0P | 0.5V | ||
| 48 | MIPI_CSI_RX_D0N | 0.5V | ||
| 49 | MIPI_CSI_RX_D2N | MIPI_CSI_RX1_D0N | 0.5V | |
| 50 | MIPI_CSI_RX_D1N | 0.5V | ||
| 51 | MIPI_CSI_RX_D2P | MIPI_CSI_RX1_D0P | 0.5V | |
| 52 | MIPI_CSI_RX_D1P | 0.5V | ||
| 53 | MIPI_CSI_RX_D3P | MIPI_CSI_RX1_D1P | 0.5V | |
| 54 | GND | Daear | 0V | |
| 55 | MIPI_CSI_RX_D3N | MIPI_CSI_RX1_D1N | 0.5V | |
| 56 | MIPI_CSI_RX_CLK1N | MIPI_CSI_RX1_CLKN | 0.5V | |
| 57 | RTC_CLKO_WIFI | Allbwn RTC 32.768KHz CLK | 1.8V | |
| 58 | MIPI_CSI_RX_CLK1P | MIPI_CSI_RX1_CLKP | 0.5V | |
| 59 | GND | Daear | 0V | |
|
60 |
CIF_D9_GMAC1_TXD
3_M1_1V8 |
EBC_SDDO9/UART1_RX_M
1/PDM_SDI0_M1 |
GPIO3_D7_ch |
1.8V |
|
61 |
CIF_D8_GMAC1_TXD
2_M1_1V8 |
EBC_SDDO8/UART1_TX_M
1/PDM_CLK0_M1 |
GPIO3_D6_ch |
1.8V |
|
62 |
CIF_D11_GMAC1_RX
D2_M1_1V8 |
EBC_SDDO11/PDM_SDI1_
M1 |
GPIO4_A1_ch |
1.8V |
|
63 |
CIF_D10_GMAC1_TX
CLK_M1_1V8 |
EBC_SDDO10/PDM_CLK1_
M1 |
GPIO4_A0_ch |
1.8V |
|
64 |
CIF_D13_GMAC1_RX
CLK_M1_1V8 |
EBC_SDDO13/UART7_RX_
M2/PDM_SDI3_M1 |
GPIO4_A3_ch |
1.8V |
|
65 |
CIF_D12_GMAC1_RX
D3_M1_1V8 |
EBC_SDDO12/UART7_TX_
M2/PDM_SDI2_M1 |
GPIO4_A2_ch |
1.8V |
|
66 |
CIF_D15_GMAC1_TX
D1_M1_1V8 |
EBC_SDDO15/UART9_RX_
M2/I2S2_LRCK_RX_M1 |
GPIO4_A5_ch |
1.8V |
|
67 |
CIF_D14_GMAC1_TX
D0_M1_1V8 |
EBC_SDDO14/UART9_TX_
M2/I2S2_LRCK_TX_M1 |
GPIO4_A4_ch |
1.8V |
|
68 |
GMAC1_TXEN_M1_1V
8 |
EBC_SDCE0/SPI3_CS0_M0/
I2S1_SCK_RX_M1 |
GPIO4_A6_ch |
1.8V |
|
69 |
GMAC1_RXD0_M1_1V
8/CAM_CLKOUT0 |
EBC_SDCE1/SPI3_CS1_M0/
I2S1_LRCK_RX_M1 |
GPIO4_A7_ch |
1.8V |
|
70 |
GMAC1_RXD1_M1_1V
8/CAM_CLKOUT1 |
EBC_SDCE2/SPI3_MISO_M
0/I2S1_SDO1_M1 |
GPIO4_B0_ch |
1.8V |
|
71 |
GMAC1_RXDV_CRS_
M1_1V8 |
EBC_SDCE3/I2S1_SDO2_M
1 |
GPIO4_B1_ch |
1.8V |
|
72 |
CIF_HREF_GMAC1_M
DC_M1_1V8 |
EBC_SDLE/UART1_RTS_M
1/I2S2_MCLK_M1 |
GPIO4_B6_ch |
1.8V |
|
73 |
CIF_VSYNC_GMAC1_
MDIO_M1_1V8 |
EBC_SDOE/I2S2_SCK_TX_
M1 |
GPIO4_B7_ch |
1.8V |
|
74 |
CIF_CLKOUT/PWM11_
IR_M1_1V8 |
EBC_GDCLK |
GPIO4_C0_d |
1.8V |
|
75 |
CIF_CLKIN_GMAC1_M
CLKINOUT_M1_1V8 |
EBC_SDCLK/UART1_CTS_
M1/I2S2_SCK_RX_M1 |
GPIO4_C1_d |
1.8V |
|
76 |
I2C4_SCL_M0_1V8/ET
H1_CLKO_25M_M1 |
EBC_GDOE/SPI3_CLK_M0/I
2S2_SDO_M1 |
GPIO4_B3_d (Tynnu i fyny
2.2K ar fwrdd) |
1.8V |
|
77 |
I2C4_SDA_M0_1V8/G
MAC1_RXER_M1 |
EBC_VCOM/SPI3_MOSI_M0
/I2S2_SDI_M1 |
GPIO4_B2_d (Tynnu i fyny
2.2K ar fwrdd) |
1.8V |
| 78 | GND | Daear | 0V | |
| 79 | EDP_TX_D1N | 0.5V | ||
| 80 | EDP_TX_D0N | 0.5V | ||
| 81 | EDP_TX_D1P | 0.5V | ||
| 82 | EDP_TX_D0P | 0.5V | ||
|
83 |
PHY_LED2/CFG_LDO
1 |
LINK LED+ |
3.3V |
|
|
84 |
PHY_LED1/CFG_LDO
0 |
LED CYFLYMDER - |
3.3V |
|
| 85 | EDP_TX_AUXN | 0.5V | ||
| 86 | EDP_TX_AUXP | 0.5V | ||
| 87 | PCIE20_TXP | Neu SATA2/QSGMII_TXP | 0.5V | |
| 88 | SARADC_VIN2_1V8 | 1.8V | ||
| 89 | PCIE20_TXN | Neu SATA2/QSGMII_TXN | 0.5V | |
|
90 |
SARADC_VIN0/RECO
VERY_1V8 |
Adfer mewnbwn Allwedd |
(Tynnwch i fyny 10K ar fwrdd) |
1.8V |
| 91 | GPIO0_A0_ch | REFCLK_OUT | 3.3V | |
| 92 | PCIE20_RXP | Neu SATA2/QSGMII_RXP | 0.5V | |
| 93 | PCIE20_REFCLKP | 0.5V | ||
| 94 | PCIE20_RXN | Neu SATA2/QSGMII_RXN | 0.5V |
| 95 | PCIE20_REFCLKN | 0.5V | ||
| 96 | VCC_RTC | Mewnbwn pŵer VCC_RTC | 1.8-3.3V | |
| 97 | VCC3V3_SYS | Allbwn 3V3 IO ar gyfer bwrdd Cario | Uchafswm 500mA | 3.3V |
| 98 | GND | Daear | 0V | |
| 99 | VCC3V3_SYS | Allbwn 3V3 IO ar gyfer bwrdd Cario | 3.3V | |
| 100 | GND | Daear | 0V |
| J2 | Arwydd | Disgrifiad neu swyddogaethau | cyfresol GPIO | IO Cyftage |
| 1 | VCC_SYS | 3.3-5V Prif mewnbwn Power | 3.4-5V | |
| 2 | GND | Daear | 0V | |
| 3 | VCC_SYS | 3.3-5V Prif mewnbwn Power | 3.4-5V | |
| 4 | GND | Daear | 0V | |
| 5 | PMIC_EN | Pŵer ar signal Rheoli | Nodyn(3) | 3.4-5V |
| 6 | PHY_MDI0+ | 0.5V | ||
| 7 | PHY_MDI1+ | 0.5V | ||
| 8 | PHY_MDI0- | 0.5V | ||
| 9 | PHY_MDI1- | 0.5V | ||
|
10 |
PWM3_IR |
DPC_HPDIN_M1/PCIE30x1_
WAKEn_M0 |
GPIO0_C2_d |
3.3V |
| 11 | PHY_MDI2+ | 0.5V | ||
| 12 | PHY_MDI3+ | 0.5V | ||
| 13 | PHY_MDI2- | 0.5V | ||
| 14 | PHY_MDI3- | 0.5V | ||
| 15 | GND | Daear | 0V | |
|
16 |
SPDIF_TX_M0 |
UART4_RX_M0/PDM_CLK1
_M0/I2S1_SCLK_RX_M0 |
GPIO1_A4_ch |
3.3V |
|
17 |
CIF_D4_SDMMC2_CM
D_M0_1V8 |
EBC_SDDO4/I2S1_SDI0_M1
/VOP_BT656_D4_M1 |
GPIO3_D2_ch |
1.8V |
|
18 |
CIF_D0_SDMMC2_D0
_M0_1V8 |
EBC_SDDO0/I2S1_MCK_M1
/VOP_BT656_D0_M1 |
GPIO3_C6_d |
1.8V |
|
19 |
CIF_D1_SDMMC2_D1
_M0_1V8 |
EBC_SDDO1/I2S1_SCK_TX
_M1/VOP_BT656_D1_M1 |
GPIO3_C7_d |
1.8V |
|
20 |
CIF_D2_SDMMC2_D2
_M0_1V8 |
EBC_SDDO2/I2S1_LRCK_T
X_M1/VOP_BT656_D2_M1 |
GPIO3_D0_ch |
1.8V |
|
21 |
CIF_D3_SDMMC2_D3
_M0_1V8 |
EBC_SDDO3/I2S1_SDO0_M
1/VOP_BT656_D3_M1 |
GPIO3_D1_ch |
1.8V |
|
22 |
CIF_D5_SDMMC2_CL
K_M0_1V8 |
EBC_SDDO5/I2S1_SDI1_M1
/VOP_BT656_D5_M1 |
GPIO3_D3_ch |
1.8V |
|
23 |
CIF_D6_1V8 |
EBC_SDDO6/I2S1_SDI2_M1
/VOP_BT656_D6_M1 |
GPIO3_D4_ch |
1.8V |
|
24 |
CIF_D7_1V8 |
EBC_SDDO7/I2S1_SDI2_M1
/VOP_BT656_D7_M1 |
GPIO3_D5_ch |
1.8V |
|
25 |
CAN2_RX_M0_1V8 |
EBC_GDSP/I2C2_SDA_M1/
VOP_BT656_CLK_M1 |
GPIO4_B4_ch |
1.8V |
|
26 |
CAN2_TX_M0_1V8 |
EBC_SDSHR/I2C2_SCL_M1
/I2S_SDO3_M1 |
GPIO4_B5_ch |
1.8V |
| 27 | GPIO2_C1_d_1V8 | GPIO2_C1_d | 1.8V | |
| 28 | GPIO0_D6_d_1V8 | GPIO0_D6_ch | 1.8V | |
|
29 |
SPI0_CLK_M0 |
PCIe20_WAKE_M0/PWM1_
M1/I2C2_SCL_M0 |
GPIO0_B5_u |
3.3V |
|
30 |
SPI0_CS0_M0 |
PCIe30x2_PEST_M0/PWM
7_IR_M1 |
GPIO0_C6_d |
3.3V |
|
31 |
SPI0_MISO_M0 |
PCIe30x2_WAKE_M0/PWM6
_M1 |
GPIO0_C5_d |
3.3V |
|
32 |
SPI0_MOSI_M0 |
PCIe20_PEST_M0/PWM2_
M1/I2C2_SDA_M0 |
GPIO0_B6_u |
3.3V |
|
33 |
UART7_RX_M1 |
SPDIF_TX_M1/I2S1_LRCK_
RX_M2/PWM15_IR_M0 |
GPIO3_C5_d |
3.3V |
|
34 |
UART7_TX_M1 |
PDM_CLK1_M2/VOP_PWM
_M1/PWM14_M0 |
GPIO3_C4_d |
3.3V |
| 35 | UART8_RX_M0_1V8 | CLK32K_OUT1 | GPIO2_C6_d | 1.8V |
| 36 | UART8_TX_M0_1V8 | GPIO2_C5_d | 1.8V | |
| 37 | GND | Daear | 0V | |
|
38 |
UART8_CTS_M0_1V8 |
CAN2_TX_M1/I2C4_SCL_M
1 |
GPIO2_B2_u |
1.8V |
| 39 | USB3_OTG0_DM | Neu borthladd USB ADB/debug | 0.5V | |
|
40 |
UART8_RTS_M0_1V8 |
CAN2_RX_M1/I2C4_SDA_M
1 |
GPIO2_B1_ch |
1.8V |
| 41 | USB3_OTG0_DP | Neu borthladd USB ADB/debug | 0.5V | |
| 42 | USB3_OTG0_ID | 1.8V | ||
| 43 | USB3_HOST1_DM | 0.5V | ||
| 44 | USB3_OTG0_VBUS | Mewnbwn VBUS DET | 3.3V | |
| 45 | USB3_HOST1_DP | 0.5V | ||
| 46 | USB2_HOST3_DM | 0.5V | ||
|
47 |
SATA0_ACT_LED/UAR
T9_RX_M1 |
SPI3_CS0_M1/I2S3_SDI_M1
/PWM13_M1 |
GPIO4_C6_d |
3.3V |
| 48 | USB2_HOST3_DP | 0.5V | ||
|
49 |
CAN1_RX_M1/PWM14
_M1 |
SPI3_CLK_M1/I2S3_MCLK_
M1/PCIe30x2_CLKREQ_M2 |
GPIO4_C2_d |
3.3V |
| 50 | GND | Daear | 0V | |
|
51 |
SATA1_ACT_LED/UAR
T9_TX_M1 |
SPI3_MISO_M1/I2S3_SDO_
M1/PWM12_M1 |
GPIO4_C5_d |
3.3V |
|
52 |
CAN1_TX_M1/PWM15
_IR_M1D |
SPI3_MOSI_M1/I2S3_SCLK
_M1/PCIe30x2_WAKE_M2 |
GPIO4_C3_d |
3.3V |
| 53 | GND | Daear | 0V | |
|
54 |
SPDIF_TX_M2/SATA2_
ACT_LED |
EDP_HPD_M0/I2S3_LRCK_
M1/PCIe30x2_PEST_M2 |
GPIO4_C4_d |
3.3V |
| 55 | USB3_OTG0_SSRXN | Neu SATA0_RXN | 0.5V | |
| 56 | USB3_OTG0_STXN | Neu SATA0_TXN | 0.5V | |
| 57 | USB3_OTG0_SSRXP | Neu SATA0_RXP | 0.5V | |
| 58 | USB3_OTG0_STXP | Neu SATA0_TXP | 0.5V | |
| 59 | USB3_HOST1_SSRXP | Neu SATA1/QSGMII_RXP | 0.5V | |
| 60 | USB3_HOST1_STXP | Neu SATA1/QSGMII_TXP | 0.5V | |
| 61 | USB3_HOST1_SSRXN | Neu SATA1/QSGMII_RXN | 0.5V | |
| 62 | USB3_HOST1_STXN | Neu SATA1/QSGMII_TXN | 0.5V | |
|
63 |
SDMMC0_CLK |
UART5_TX_M0/CAN0_RX_
M1 |
GPIO2_A2_ch |
3.3V |
| 64 | GND | Daear | 0V | |
|
65 |
SDMMC_D0 |
UART2_TX_M1/UART6_TX_
M1/PWM8_M1 |
GPIO1_D5_u |
3.3V |
|
66 |
SDMMC_CMD |
UART5_RX_M0/CAN0_TX_
M1/PWM10_M1 |
GPIO2_A1_u |
3.3V |
| 67 | SDMMC_D2 | UART5_CTS_M0 | GPIO1_D7_u | 3.3V |
|
68 |
SDMMC_D1 |
UART2_RX_M1/UART6_RX
_M1/PWM9_M1 |
GPIO1_D6_u |
3.3V |
|
69 |
SDMMC_DET |
PCIe30x1_CLKREQ_M0/SAT
A_CP_DET |
GPIO0_A4_u |
3.3V |
| 70 | SDMMC_D3 | UART5_RTS_M0 | GPIO1_A0_u | 3.3V |
|
71 |
PCIE20_CLKREQn_M0
/GPIO0_A5 |
SATA_MP_SWITCH |
GPIO0_A5_ch |
3.3V |
| 72 | LCD0_BL_PWM4 | PCIe30x1_PEST_M0 | GPIO0_C3_d | 3.3V |
|
73 |
LCD0_PWREN_H_GPI
O0_C7 |
HDMITX_CEC_M1/PWM0_M
1 |
GPIO0_C7_d |
3.3V |
| 74 | LCD1_BL_PWM5 | SPI0_CS1_M0 | GPIO0_C4_d | 3.3V |
|
75 |
I2S1_SDI0_M0/PDM_S
DI0_M0 |
GPIO1_B3_ch |
3.3V |
|
|
76 |
I2S1_MCLK_M0 |
UART3_RTS_M0/SCR_CLK/
PCIe30x1_PEST_M2 |
GPIO1_A2_ch |
3.3V |
|
77 |
I2S1_SCLK_TX_M0 |
UART3_CTS_M0/SCR_IO/P
CIe30x1_WAKE_M2 |
GPIO1_A3_ch |
3.3V |
|
78 |
PDM_CLK0_M0 |
UART4_TX_M0/I2S1_LRCK
_RX_M0/AU_PWM_ROUTP |
GPIO1_A6_ch |
3.3V |
|
79 |
I2S1_LRCK_TX_M0 |
UART4_RTS_M0/SCR_RST/
PCIe30x1_CLKREQ_M2 |
GPIO1_A5_ch |
3.3V |
|
80 |
I2S1_SDO0_M0 |
UART4_CTS_M0/SCR_DET/
AU_PWM_ROUTN |
GPIO1_A7_ch |
3.3V |
|
81 |
PDM_SDI1_M0_ADC |
I2S1_SDI1_SDO3_M0/PCIe2
0_PEST_M2 |
GPIO1_B2_ch |
3.3V |
|
82 |
PDM_SDI2_M0_ADC |
I2S1_SDI2_SDO2_M0/PCIe2
0_WAKE_M2 |
GPIO1_B1_ch |
3.3V |
|
83 |
PDM_SDI3_M0_ADC |
I2S1_SDI3_SDO1_M0/PCIe2
0_CLKREQ_M2 |
GPIO1_B0_ch |
3.3V |
|
84 |
LCDC_D0/SPI0_MISO
_M1/I2S1_MCLK_M2 |
PCIe20_CLKREQ_M1/VOP_
BT656_D0_M0 |
GPIO2_D0_ch |
3.3V |
|
85 |
I2C3_SDA_M0 |
UART3_RX_M0/CAN1_RX_
M0/AU_PWM_LOUTP |
GPIO1_A0_u |
3.3V |
| 86 | GND | Daear | 0V | |
|
87 |
LCDC_D1/SPI0_MOSI
_M1/I2S1_SCK_Tx_M2 |
PCIe20_WAKE_M1/VOP_BT
656_D1_M0 |
GPIO2_D1_ch |
3.3V |
|
88 |
I2C3_SCL_M0 |
UART3_TX_M0/CAN1_TX_
M0/AU_PWM_LOUTN |
GPIO1_A1_u |
3.3V |
|
89 |
I2C1_SDA/CAN0_RX_
M0 |
PCIe20_BUTTONRST/MCU_
JTAG_TCK |
GPIO0_B4_u(Tynnu i fyny
2.2K) |
3.3V |
|
90 |
LCDC_D2/SPI0_CS0_ M1/I2S1_LRCK_TX_M
2 |
PCIe30x1_CLKREQ_M1/VO P_BT656_D2_M0 |
GPIO2_D2_ch |
3.3V |
|
91 |
UART2_RX_M0_DEBU
G |
GPIO0_D0_u |
3.3V |
|
|
92 |
I2C1_SCL/CAN0_TX_
M0 |
PCIe30x1_BUTTONRST/MC
U_JTAG_TDO |
GPIO0_B3_u(Tynnu i fyny
2.2K) |
3.3V |
|
93 |
LCDC_D23/UART3_RX
_M1 |
PDM_SDI3_M2/PWM13_M0 |
GPIO3_C0_d |
3.3V |
|
94 |
UART2_TX_M0_DEBU
G |
GPIO0_D1_u |
3.3V |
|
|
95 |
LCDC_D3/SPI0_CLK_
M1/I2S1_SDI0_M2 |
PCIe30x1_WAKE_M1/VOP_
BT656_D3_M0 |
GPIO2_D3_ch |
3.3V |
|
96 |
LCDC_D22/UART3_TX
_M1 |
PDM_SDI2_M2/PWM12_M0 |
GPIO3_B7_ch |
3.3V |
|
97 |
LCDC_D4/SPI0_CS1_
M1/I2S1_SDI1_M2 |
PCIe30x2_CLKREQ_M1/VO
P_BT656_D4_M0 |
GPIO2_D4_ch |
3.3V |
|
98 |
LCDC_D5/SPI2_CS0_
M1/I2S1_SDI2_M2 |
PCIe30x2_WAKE_M1/VOP_
BT656_D5_M0 |
GPIO2_D5_ch |
3.3V |
|
99 |
LCDC_D6/SPI2_MOSI
_M1/I2S1_SDI3_M2 |
PCIe30x2_PEST_M1/VOP
_BT656_D6_M0 |
GPIO2_D6_ch |
3.3V |
|
100 |
LCDC_D7/SPI2_MISO
_M1/I2S1_SDO0_M2/U ART8_TX_M1 |
VOP_BT656_D7_M0 |
GPIO2_D7_ch |
3.3V |
| J3 | Arwydd | Disgrifiad neu swyddogaethau | cyfresol GPIO | IO Cyftage |
| 1 | MIPI_DSI_TX1_D3P | LVDS1 neu MIPI1 DSI D3P TX | Nodyn(1)(2) | 0.5V |
| 2 | GND | Daear | 0V | |
| 3 | MIPI_DSI_TX1_D3N | LVDS1 neu MIPI1 DSI D3N TX | Nodyn(1)(2) | 0.5V |
| 4 | GPIO4_D2_ch | GPIO4_D2_ch | 3.3V | |
| 5 | MIPI_DSI_TX1_D2P | LVDS1 neu MIPI1 DSI D2P TX | Nodyn(1)(2) | 0.5V |
| 6 | MIPI_DSI_TX1_CLKP | LVDS1 neu MIPI1 DSI CKP TX | Nodyn(1)(2) | 0.5V |
| 7 | MIPI_DSI_TX1_D2N | LVDS1 neu MIPI1 DSI D2N TX | Nodyn(1)(2) | 0.5V |
| 8 | MIPI_DSI_TX1_CLKN | LVDS1 neu MIPI1 DSI CKN TX | Nodyn(1)(2) | 0.5V |
| 9 | MIPI_DSI_TX1_D1P | LVDS1 neu MIPI1 DSI D1P TX | Nodyn(1)(2) | 0.5V |
| 10 | MIPI_DSI_TX1_D0P | LVDS1 neu MIPI1 DSI D0P TX | Nodyn(1)(2) | 0.5V |
| 11 | MIPI_DSI_TX1_D1N | LVDS1 neu MIPI1 DSI D1N TX | Nodyn(1)(2) | 0.5V |
| 12 | MIPI_DSI_TX1_D0N | LVDS1 neu MIPI1 DSI D0N TX | Nodyn(1)(2) | 0.5V |
| 13 | GND | Daear | 0V | |
| 14 | PCIE30_RX1P | 0.5V | ||
| 15 | PCIE30_RX0P | 0.5V | ||
| 16 | PCIE30_RX1N | 0.5V | ||
| 17 | PCIE30_RX0N | 0.5V | ||
| 18 | GND | Daear | 0V | |
| 19 | PCIE30_TX1P | 0.5V | ||
| 20 | PCIE30_TX0P | 0.5V | ||
| 21 | PCIE30_TX1N | 0.5V | ||
| 22 | PCIE30_TX0N | 0.5V | ||
| 23 | GND | Daear | 0V | |
| 24 | PCIE30_REFCLKP_IN | 0.5V | ||
|
25 |
PCIE30X2_CLKREQN_
M0 |
SATA_CP_POD |
GPIO0_A6_ch |
3.3V |
| 26 | PCIE30_REFCLKN_IN | 0.5V | ||
| 27 | VCC_SYS | 3.3-5V Prif mewnbwn Power | 3.4-5V | |
| 28 | GND | Daear | 0V | |
| 29 | VCC_SYS | 3.3-5V Prif mewnbwn Power | 3.4-5V | |
| 30 | GND | Daear | 0V | |
| Nodyn:
1. Allbwn MIPI DSI diofyn. Ond gall newid i allbwn LVDS gan feddalwedd. 2. Gellir gosod i Du-LVDS. 3. Tynnwch hyd at VCC_SYS, Gall gosod 0V Power OFF。 |
||||
Pecyn Datblygu
Pecyn Datblygu (SBC3568)
Canllaw Dylunio Caledwedd
Cyfeirnod Cylchdaith Ymylol
Pŵer Allanol
Prif 5V
PRIF 3.3V
Cylchdaith Dadfygio
Cylchdaith Rhyngwyneb TVI
TP28x5
VIN 4CH
Ôl Troed PCB
Y llun o'r cysylltwyr bwrdd cario (Pitch 1.27mm)
Nodweddion Trydanol Cynnyrch
Gwasgariad a Thymheredd
| Symbol | Paramedr | Minnau | Teip | Max | Uned |
|
VCC_SYS |
System IO
Cyftage |
3.4V |
5 |
5.5 |
V |
|
Isys_in |
VCC_SYS
mewnbwn Cyfredol |
1400 |
2050 |
mA |
|
| VCC_RTC | RTC Cyftage | 1.8 | 3 | 3.4 | V |
|
Iirtc |
Mewnbwn RTC
Cyfredol |
5 |
8 |
uA |
|
|
VCC3V3_SYS |
3V3 IO Cyftage |
3.3 |
V |
||
|
I3v3_allan |
VCC_3V3
cerrynt allbwn |
500 |
mA |
||
|
Ta |
Tymheredd Gweithredu |
-0 |
70 |
°C |
|
|
Tstg |
Tymheredd Storio |
-40 |
85 |
°C |
Dibynadwyedd y Prawf
| Prawf Gweithredu Tymheredd Uchel | ||
| Cynnwys | Gweithredu 8h mewn tymheredd uchel | 55°C±2°C |
| Canlyniad | Pasio | |
| Prawf Bywyd Gweithredu | ||
| Cynnwys | Gweithredu yn yr ystafell | 120awr |
| Canlyniad | Pasio | |
Dyluniad Embedded Boardcon
www.armdesigner.com.
Dogfennau / Adnoddau
 |
BOARDCON Mini3568 Cyfrifiadur ar Fodiwl [pdfLlawlyfr Defnyddiwr Mini3568, Mini3568 Cyfrifiadur ar Fodiwl, Cyfrifiadur ar Fodiwl, Modiwl |
