GOWIN-logo

GOWIN FPGA Development Board RISCV Programming

I-GOWIN-FPGA-Development-Board-RISCV-Programming-product-image

Copyright © 2022 Guangdong Gowin Semiconductor Corporation. Wonke Amalungelo Agodliwe.
wuphawu lokuthengisa lwe-Guangdong Gowin Semiconductor Corporation futhi ibhaliswe e-China, e-US Patent and Trademark Office, nakwamanye amazwe. Wonke amanye amagama namalogo akhonjwe njengezimpawu zokuhweba noma izimpawu zesevisi ayimpahla yabanikazi bawo abafanele. Ayikho ingxenye yalo mbhalo okumele igaywe kabusha noma idluliselwe nganoma yiluphi uhlobo noma nganoma iyiphi indlela, ngogesi, ngomshini, ngokwenza amakhophi, ngokurekhodwa noma ngenye indlela, ngaphandle kwemvume ebhalwe ngaphambili ye-GOWINSEMI.

Umshwana wokuzihlangula
I-GOWINSEMI ayinaso isikweletu futhi ayinikezi siqinisekiso (kungaba esishiwo noma esishiwo) futhi ayinasibopho sanoma imuphi umonakalo owenzeke ku-hardware yakho, isofthiwe, idatha, noma impahla ngenxa yokusetshenziswa kwezinto noma impahla eqanjiwe ngaphandle kwalapho kuchazwe Emigomweni Nemibandela ye-GOWINSEMI. Yokuthengisa. Yonke imininingwane ekulo mbhalo kufanele ithathwe njengokwandulelayo. I-GOWINSEMI ingenza izinguquko kule dokhumenti nganoma yisiphi isikhathi ngaphandle kwesaziso sangaphambili. Noma ubani othembele kula madokhumenti kufanele axhumane ne-GOWINSEMI mayelana namadokhumenti amanje kanye nephutha.

Umlando Wokubuyekeza

Usuku Inguqulo Incazelo
04/29/2019 1.0E Inguqulo yokuqala ishicilelwe.
 

11/11/2022

 

1.1E

  • Isoftware ye-AndeSight RDS v311 ibuyekeziwe.
  • Idizayini yesithenjwa ibuyekeziwe.
  • Incazelo yokulanda imiphumela yokuhlanganiswa kwephrojekthi eshumekiwe nge-SPI Flash ibuyekeziwe.

Isingeniso

I-AE250 Isingeniso

I-AE250 iwuhlelo lwe-32-bit RISC-V MCU; ukwakheka kwayo kuboniswe kuMfanekiso 1-1.

I-GOWIN-FPGA-Development-Board-RISCV-Programming-1

Umfanekiso 1-1 AE250 Umdwebo Wesakhiwo

Ngokusekelwe ebhodini lokuthuthukisa i-Gowin FPGA, i-RISC-V AE250 MCU yokuthuthukisa kanye nesistimu yokulungisa iphutha iboniswa kuMfanekiso 1-2.

I-GOWIN-FPGA-Development-Board-RISCV-Programming-2

Umfanekiso 1-2 Umdwebo Wesakhiwo Sokuthuthukisa Nokulungisa Amaphutha

I-chip ye-FPGA ebhodini lokuthuthukisa ilungiswa njenge-AE250 MCU isebenzisa i-Gowin Programmer ku-PC, ngemva kokuthi Ikhebula Lokususa iphutha selixhunywe, ungenza ukuthuthukiswa kohlelo olushumekiwe nokususa iphutha nge-software ye-AndeSight RDS v311.

Amalungiselelo

Ngaphambi kokusebenzisa i-Gowin FPGA ne-AE250 ekuthuthukisweni nasekulungiseni iphutha, amathuluzi alandelayo adinga ukulungiswa:

  1. Gowin GW2A uchungechunge lwebhodi lokuthuthukisa le-FPGA.
  2. Iphakheji yokufaka i-Gowin Software yokumisa nokulanda i-chip ye-FPGA.
  3. Iphakheji yokufaka ye-AndeSight RDS v311 yokuthuthukisa nokulungisa amaphutha ohlelweni olushumekiwe.
  4. Ikhebula Lokususa iphutha lisetshenziselwa ukulanda nokulungisa amaphutha ohlelweni olushumekiwe, futhi okumisiwe yi-AICE-MINI+; abasebenzisi badinga ukuzithenga ngokwabo.

Qaphela! 

  1. Uma idinga ukukhipha ulwazi nge-UART, intambo ye-UART eya ku-USB iyadingeka.
  2. Amanye ama-peripherals okufanele asetshenziswe.
Izinyathelo Zokuthuthukisa Nokususa iphutha

Izinyathelo eziyisisekelo zokuthuthukisa nokulungisa iphutha i-RISC-V AE250 MCU ngokusekelwe ebhodini lokuthuthukisa i-GW2A-55C zimi kanje:

  1. Faka ama-software: I-Gowin Software isetshenziselwa ukulungisa nokwenza idizayini ye-AE250 RTL futhi ikhiqize i-Bitstream file yomklamo; Isofthiwe ye-AndeSight RDS v311 isetshenziselwa ukuthuthukisa nokususa amaphutha izinhlelo ezishumekiwe; amanye ama-software kanye nezishayeli zokulungisa iphutha nazo ziyadingeka.
  2. Lungiselela ukunikezwa kwamandla kanye nekhebuli yokulanda yebhodi lokuthuthukisa. I-Bitstream file ye-AE250_chip ilayishwa ku-chip ye-FPGA ebhodini lokuthuthukisa kusetshenziswa i-Gowin Programmer, futhi i-AE250 isebenza ebhodini lokuthuthukisa.
  3. Vula isofthiwe ye-RDS ukuze udale iphrojekthi entsha eshumekiwe noma uvule iphrojekthi ekhona ukuze ibhalwe ngekhodi, ihlanganise neminye imisebenzi. Xhuma Ikhebuli Yokulungisa Iphutha esetshenziselwa ukulungisa iphutha kwe-AE250, landa umphumela wokuhlanganisa wephrojekthi kumemori yeziqondiso (ILM) ku-AE250, bese uqala ukulungisa iphutha ku-chip.
  4. Ngesikhathi sokulungisa iphutha, ungasebenzisa i-UART kukhebula le-USB ukuxhuma isixhumi esibonakalayo se-UART se-AE250 ku-PC, usebenzise itheminali ye-serial eyakhelwe ngaphakathi ku-RDS ukuze usebenzise okokufaka nokukhiphayo. Ungasebenzisa i-GPIO ukuxhuma kuzinkomba ze-LED, okhiye, noma izikhonkwane zangaphandle zemisebenzi yokufaka/yokukhiphayo; I-I2C, i-SPI, i-Ethernet, namanye ama-peripherals nawo angakhethwa ukuthi asetshenziswe.
  5. I-AE250 ingaxhuma ku-Flash nge-SPI, ilande umphumela wokuhlanganiswa wohlelo olushumekiwe ku-Flash isebenzisa i-Gowin Programmer; uma i-chip ivuliwe, i-AE250 izofunda ngokuzenzakalelayo uhlelo olushumekiwe ku-SPI Flash bese iqala. Ungasebenzisa kabusha i-Flash egcina i-FPGA Bitstream; ezinye zingagcina i-FPGA bitstream, kanti ezinye zingagcina imiphumela yokuhlanganisa yezinhlelo ezishumekiwe. Lena indlela esebenzayo neyongayo.
    Ungabona isahluko 2 Imiyalelo Yokuxhuma Ikhebula Lokususa iphutha, isahluko
    3 Sebenzisa Iziyalezo ze-RDS, kanye nesahluko 4 Idizayini eyinkomba ngezinyathelo ezinemininingwane.

Susa iphutha Imiyalo Yokuxhuma Ikhebula

I-RDS + AE250 isebenzisa ikhebula lokususa iphutha le-AICE-MINI+ ngokuzenzakalelayo; ingaphandle liboniswa kwesokunxele kuMfanekiso 2-1, futhi izikhonkwane zikhonjiswe kwesokudla kuMfanekiso 2-1. Kuyi-interface enamaphini angu-12. Kumele kuqashelwe ukuthi iphinikhodi 1 ayinalutho esithombeni. Lapho ikhebula lixhunywe kahle futhi i-RDS ivuliwe, ukukhanya kwe-LED okubomvu okumakwe ngebhokisi eliphuzi esithombeni kuzocisha.
Umfanekiso 2-1 AICE-MINI+ Debug Cable kanye nezikhonkwane zayo

I-GOWIN-FPGA-Development-Board-RISCV-Programming-3

Incazelo yephinikhodi yekhebuli yokususa iphutha ye-AICE-MINI+ iboniswa kuThebula 2-1. Kufanele kuqashelwe ukuthi i-Pin 1 ichazwa ngokuthi Akukho Connection (NC), ehambisana nengenalutho. I-VREF idinga ukuxhuma iphinikhodi yamandla engu-3.3V, futhi i-GND idinga kuphela ukuxhuma iphinikhodi 3 noma iphinikhodi engu-5.

Ithebula 2-1 AICE-MINI+ Debug Cable Pin Definition

Inombolo Yephini Iphinikhodi yekhebuli yokususa iphutha ye-AICE-MINI+
1 NC
2 TSRST_N
3 GND
4 I-TTMS
5 GND
6 I-TCK
7 I-VREF
8 NC
9 NC
10 TTRST_N
11 I-TTDO
12 I-TTDI

Sebenzisa Imiyalo ye-RDS

Ukufakwa kwe-RDS

Vula iphakheji yokufaka bese ufaka iWindows/Disk1; chofoza kabili setup.exe ukuze uyifake. Azikho izilungiselelo ezikhethekile ezidingekayo ngesikhathi sokufakwa. Ngesikhathi sokufakwa, kuzovela ibhokisi lengxoxo elibuza ukuthi uyasifaka yini isishayeli, sicela ukhethe yebo. Ukuze uthole izinyathelo zokufaka, bheka
I-AndeSight_RDS_v3.2_Installation_Guide_UM207_V1.0.pdf, engatholakala kuphakheji yokufaka.

  1.  Uma usetha indlela yokufaka nendlela yendawo yokusebenza, ungafaki izinhlamvu zesiShayina noma isikhala, noma kuzothola iphutha lesikhathi sokusebenza.
  2. Inguqulo yamanje ye-RDS isekela i-AICE-MINI+ Cable ngokuzenzakalela.
  3. I-GOWIN Programmer ingase ingakwazi ukuxhuma ebhodini lokuthuthukisa ngemva kokufaka i-RDS, engalungiswa ngokufaka kabusha umshayeli we-Gowin Programmer.
  4. Ngenombolo ye-serial nesitifiketi files, sicela uthinte iGowin Semiconductor Corp.
Dala Iphrojekthi Entsha

Chofoza File > Okusha > Iphrojekthi > Iphrojekthi ye-Andes C > Okulandelayo kusixhumi esibonakalayo se-RDS ukuze ufake isixhumi esibonakalayo sokucushwa sephrojekthi entsha ye-C, njengoba kuboniswe kuMfanekiso 3-1.

Umfanekiso 3-1 Dala Iphrojekthi Entsha

I-GOWIN-FPGA-Development-Board-RISCV-Programming-4

Kuphrojekthi entsha ye-C, amapharamitha alandelayo adinga ukulungiselelwa:

  1. Igama lephrojekthi
  2. Indawo: Indawo ezenzakalelayo indawo yokusebenza yamanje.
  3. Ukucushwa Kokuxhuma kusethelwe ku-ICE, okubonisa ukuthi ibhodi lokuthuthukisa lixhunywe kusetshenziswa ikhebula lokususa iphutha le-ICE. Uma i-emulator isetshenziswa njengenkundla yokuhlola, sicela ukhethe i-SID.
  4. OkweChip Profile, khetha i-ADP-AE250-N25-GOWIN, elungiselelwe ngokuvumelana ne-Gowin FPGA.
  5. Uhlobo Lwephrojekthi luhlanganisa Iphrojekthi Engenalutho kanye Nephrojekthi Ye-Hello World ANSI C.
  6. Ku-Toolchains, nds32le-elf-mculib-v5m iyona emisiwe.
    Ngemva kokudala iphrojekthi entsha, chofoza kwesokudla egameni lephrojekthi ku-Project Explorer, khetha Yakha Iphrojekthi kumenyu yokudonsela phansi noma uchofoze ” ” kubha yamathuluzi ukuze uhlanganise futhi uxhumanise iphrojekthi; khetha Hlanza Iphrojekthi kumenyu yokudonsela phansi ukuze wenze iphrojekthi ihlanzeke.
Ngenisa futhi Uthumele Iphrojekthi

Chofoza kwesokudla esikhaleni se-Project Explorer ukuze ukhethe “Ngenisa” noma “Thekelisa”, njengoba kukhonjisiwe kuMfanekiso 3-2.

I-GOWIN-FPGA-Development-Board-RISCV-Programming-5

Umfanekiso 3-2 Ngenisa/Thumela Iphrojekthi

Chofoza okuthi “Ngenisa > Okuvamile > Iphrojekthi Ekhona endaweni yokusebenza” ukuze ungenise iphrojekthi, futhi isixhumi esibonakalayo sinjengoba kuboniswe kuMfanekiso 3-3. Lapho ukhetha "Khetha umkhombandlela wezimpande", ngenisa iphrojekthi kufolda; lapho ukhetha "Khetha ifayili yengobo yomlando", ngenisa iphrojekthi ku-zip.

I-GOWIN-FPGA-Development-Board-RISCV-Programming-6

Umfanekiso 3-3 Ngenisa Iphrojekthi

Khetha “Khipha… > Faka kungobo yomlando File” ukuze uvule isixhumi esibonakalayo sephrojekthi yokuthekelisa, njengoba kuboniswe kuMfanekiso 3-4. Ngemva kokukhetha iphrojekthi ezothunyelwa ngaphandle, ifomethi yokuminyanisa, indlela yokulondoloza, njll. ungaqedela ukuthekelisa.I-GOWIN-FPGA-Development-Board-RISCV-Programming-7

Umfanekiso 3-4 Thumela Iphrojekthi

Landa Izinhlelo ukuze Uzikhanyise

I-AE250 isekela kusukela ku-Flash, bese ifunda uhlelo olushumekiwe olusuka ku-Flash ngesixhumi esibonakalayo se-SPI bese ilugcina ku-ILM, bese kwenziwa uhlelo olushumekiwe. Indlela enconyiwe ukusebenzisa kabusha i-SPI Flash elondoloza i-FPGA Bitstream; sebenzisa ingxenye yokuqala ye-Flash ukuze ulondoloze i-FPGA Bitstream, bese esele ukuze ulondoloze kanambambili files wezinhlelo ezishumekiwe.

  1. Vula i-IP core generator ku-Gowin Software bese ushayela amapharamitha we-AE250 RTL. Chofoza kabili i-SMU ukuze uvule isixhumi esibonakalayo se-SMU bese usetha “Okuzenzakalelayo Kokusetha kabusha Vector” ku-0x80400000, njengoba kuboniswe kuMfanekiso 3-5. Setha isikhala se-SPI Flash 0~0x400000 ngesamba samabhayithi angu-4M njengekheli lokulondoloza le-Bitstream; kusukela ku-0x400000 isetshenziswa njengekheli lokulondoloza kanambambili files wezinhlelo ezishumekiwe.
    Umfanekiso 3-5 Okuzenzakalelayo Kokusetha Kabusha Vector
    I-GOWIN-FPGA-Development-Board-RISCV-Programming-8
  2. Chofoza kabili i-SPI1 ukuze uvule isixhumi esibonakalayo se-SPI1, hlola “Ukusekela kwe-SPI1”, bese usetha “Ikheli Le-Space Memory Memory SPI1” libe ngu-0x80400000, njengoba kuboniswe kuMfanekiso 3 6.
    Umfanekiso 3-6 SPI1 Ukucushwa
    I-GOWIN-FPGA-Development-Board-RISCV-Programming-9
  3. Ezivimbelweni ezibonakalayo zomklamo we-RTL, isixhumi esibonakalayo se-SPI1 kufanele sixhunywe ku-SPI Flash, futhi isixhumi esibonakalayo se-SPI1 kufanele sicindezelwe ngokomzimba ngokuya ngethebula elilandelayo. Kuma-chips e-FPGA ahlukene, indawo yesixhumi esibonakalayo se-MSPI nayo ihlukile, futhi umkhawulo kufanele uqonde ngqo esimweni esithile.
    Ithebula 3-1 SPI1 Interface Izithiyo Zomzimba
    I-AE250 SPI1 Interface I-FPGA MSPI Interface
    CSN I-MCSN
    I-CLK I-MCLK
    I-MISO I-MSO
    UMOSI I-MSI
  4. Phinda usebenzise isixhumi esibonakalayo se-MSPI njenge-IO evamile. Efasiteleni elithi “Inqubo” le-Gowin Software, chofoza kwesokudla “Indawo Nomzila”, khetha “Ukucushwa” kumenyu ephumayo; khetha ithebhu ethi “Dual Purpose Pin”, bese uhlola okuthi “Sebenzisa i-MSPI njenge-IO evamile” bese uchofoza okuthi “KULUNGILE” ukuze uqedele ukubeka kanye nokwenza umzila.
    Umfanekiso 3-7 Setha I-MSPI Interface ibe IO Evamile
    I-GOWIN-FPGA-Development-Board-RISCV-Programming-10
  5. Lungisa izilungiselelo zepharamitha yohlelo olushumekiwe. Okokuqala, lungisa amapharamitha we-bootloader kusikripthi sesixhumanisi. Njengoba umbhalo wesixhumanisi kuhlelo olushumekiwe lwe-AE250 ukhiqizwa ngokuzenzakalelayo yi-SAG file, kufanele ishintshwe ku-SAG file. Vula i-ae250.sag, thola i-BOOTLOADER bese uyishintshela enanini Lokuzenzakalelayo Lokusetha Kabusha Vector ekwakhiweni kwe-RTL, njengoba kuboniswe kuMfanekiso 3-8. Bese ulungisa i-config.h. Vula src/bsp/config/config.h, bese uthola incazelo enkulu
    “BUILD_MODE” futhi uyilungise ukuze ithi “BUILD_BURN”.
    Umfanekiso 3-8 ae250.sag Ukusetha Imingcele ye-bootloader
    I-GOWIN-FPGA-Development-Board-RISCV-Programming-11

Qaphela!

    • Ipharamitha kufanele ihambisane nenani Lokuzenzakalelayo Lokusetha Kabusha Vector yepharamitha ye-RTL.
    • Lungisa izilungiselelo zokuhlanganisa; chofoza kwesokudla igama lephrojekthi eshumekiwe, khetha okuthi Yakha Izilungiselelo; khetha ithebhu ethi “Objcopy > Okuvamile”, bese ususe ukumaka okuthi “Khubaza”. (Ungakhiqizi ngokuzenzakalela okukhiphayo file.)

Hlanganisa kabusha uhlelo olushumekiwe ukuze ukhiqize kanambambili files wephrojekthi eshumekiwe, bese ulanda ifayela le files kuya ku-SPI Flash 0x400000 ikheli usebenzisa imodi ye-Gowin Programmer yangaphandle ye-Flash C Bin.
Hlanganisa futhi ubeke futhi uhambise idizayini ye-RTL eshintshiwe futhi, futhi uyilande ekhelini le-SPI Flash 0x000000 usebenzisa i-Gowin Programmer Flash mode yangaphandle.

Ku-chip Debug

Ngemva kokuhlanganiswa, imiphumela yokuhlanganiswa yephrojekthi eshumekiwe ingalandwa ebhodini lokuthuthukisa ukuze kulungiswe iphutha ku-chip.
Lungisa config.h; vula src/bsp/config/config.h, futhi uthole incazelo enkulu BUILD_MODE; iguqule ibe ngu-BUILD_LOAD, bese uhlanganisa kabusha uhlelo olushumekiwe.
Chofoza kwesokudla egameni lephrojekthi ku-Project Explorer, bese ukhetha okuthi “Susa iphutha njenge> Uhlelo lwe-MCU “kumenyu yokudonsela phansi. Ngokokuqala ngqa, kuzovela ibhokisi lengxoxo ukuze kumiswe "Ukulungiswa Kwephutha", njengoba kuboniswe kuMfanekiso 3-9.

I-GOWIN-FPGA-Development-Board-RISCV-Programming-14

Umfanekiso 3-9 Ukucushwa Kwephutha

Kuthebhu ethi “Ukuqalisa”, hlola inketho ethi “Setha kabusha futhi Ubambe” ukuze umise uhlelo ngaphambi kokwenza umyalo wokuqala. Faka ukulayisha ebhokisini lepharamitha ngezansi kwale nketho ukuze ulande imiphumela yokuhlanganiswa yephrojekthi eshumekiwe ku-ILM ngaphambi kokususa iphutha ku-chip.
Ku-"Izinketho Zesikhathi Sokusebenza", khetha okuthi "Setha indawo yokuphumula kokuthi". Faka ilebula, njengeliyinhloko ebhokisini lokufaka. Ingasetha i-breakpoint ekuqaleni komsebenzi oyinhloko. Hlola okuthi "Qalisa kabusha", futhi izoqala ukusebenza okuqhubekayo ngokuqondile ngemva kokufaka ukulungisa iphutha ku-chip.
Uma ufaka i-on-chip debug, iya ngokuzenzakalelayo ekulungiseni iphutha view futhi indawo izokhonjiswa, njengoba kukhonjisiwe kuMfanekiso 3-10. Le ndawo iyindawo yokusebenza ye-on-chip debug. Ezinye izinkinobho ezinqamulelayo zokususa iphutha ziboniswa ebhokisini elibomvu. Ukusuka kwesobunxele kuye kwesokudla, zisho ukuqala kabusha UKULUNGISA, qhubeka nokusebenzisa, ukumisa okwesikhashana, ukuphela, ukunqamula, ukuxhumanisa inqubo eyodwa, ukungena, ukweqa, ukubuya kwesinyathelo, kanye nemodi yokunyathela imiyalelo; kule modi, isikhathi ngasinye sisebenzisa i-risc – v umhlangano wokufundisa, ngaphandle kwalokho isikhathi ngasinye sisebenzisa isitatimende sika-C.

Qaphela!
Izithonjana ezimpunga zisho ukuthi azitholakali ngalesi sikhathi.
Chofoza kabili kwesokunxele enombolweni yomugqa embhalweni wekhodi ukuze usethe ngokushesha izindawo zokunqamuka noma ukhansele izindawo zokunqamuka, bese uchofoza kwesokudla kumbhalo wekhodi ukuze ukhethe okuthi “gijimela kulayini” kumenyu ephumayo.I-GOWIN-FPGA-Development-Board-RISCV-Programming-13

Umfanekiso 3-10 Izinkinobho Zokulungisa Iphutha Isingeniso

Umfanekiso 3-11 yifasitela lezitatimende zomhlangano elibonisa okuqukethwe kwemiyalelo yokuhlanganisa esebenza ngesikhathi sangempela ku-ILM.

I-GOWIN-FPGA-Development-Board-RISCV-Programming-14

Umfanekiso 3-11 Iwindi Lekhodi Yemiyalo Yomhlangano

Ukusetshenziswa kwe-Serial Terminal Okwakhelwe Ngaphakathi kwe-RDS

Umfanekiso 3-12 ubonisa Itheminali ye-UART eyakhelwe ku-RDS interface. Uma udinga ukusebenzisa, chofoza "Iwindi > Bonisa View > Itheminali” kumenyu ephezulu ukuze uvule iwindi elithi “Itheminali”, bese uchofoza okuthi “vula itheminali” ukuze wakhe itheminali entsha ye-serial. Ngemva kokusetha inombolo yembobo (okungaba viewed kusiphathi sezingxenyekazi zekhompyutha), isilinganiso se-baud namanye amapharamitha, chofoza okuthi "KULUNGILE" ukuze uqale ukusebenzisa.

I-GOWIN-FPGA-Development-Board-RISCV-Programming-15

Umfanekiso 3-12 Itheminali ye-Serial eyakhelwe ngaphakathi ye-RDS

Ukuze uthole imininingwane, bheka idokhumenti
I-AndeSight_RDS_v3.1_User_Manual_UM170_V1.0.pdf, engatholakala endleleni yedokhumenti yohlu lokufaka.

I-Reference Design

Ikhodi Yephrojekthi

Isihluthulelo files kusifanekiso sephrojekthi esishumekiwe se-AE250 simi kanje:

  1. src/bsp/ae250/ae250.h: Lokhu file iqukethe incazelo yewashi lesistimu, incazelo yerejista ye-peripheral, incazelo yemephu yekheli lerejista, futhi iphazamisa incazelo yenombolo yomthombo. Incazelo yewashi kufanele ihambisane nokucushwa kwamapharamitha we-AE250.
  2. src/bsp/ae250/ae250.c: Umsebenzi we-reset_handler uwukufaka ukuqalisa uhlelo olushumekiwe. Ekungeneni, ukuqaliswa kwe-UART kwenziwa ngaphambi kokuba umsebenzi oyinhloko wenziwe. Imbobo ye-UART edingekayo ikhethiwe futhi izinga le-baud elidingekayo liyalungiswa ngokuya ngokucushwa kwepharamitha ye-AE250.
  3. src/bsp/ae250/interrupt.c: Lokhu file incazelo yemisebenzi yesibambi esiphazamisayo ye-AE250
  4. src/bsp/config/config.h: Lokhu file iqukethe incazelo enkulu elawula indlela yokuhlanganisa. #define BUILD_MODE ingachazwa ngokuthi YAKHA_LOAD noma YAKHA_UMSHISE. I-BUILD_LOAD isho ukuthi uhlelo lulayishwa ngokuqondile ku-ILM, futhi ngokuvamile lusetshenziswa lapho kulungiswa amaphutha. I-BUILD_BURN isho ukuthi uhlelo ludawunilodeka ku-SPI Flash, futhi uhlelo lufundwa kusuka ku-SPI Flash kuya ku-ILM kuqala ngemva kokukhanyisa, bese luqalisa, okusebenza ohlelweni lwenguqulo.
  5. Isiqalo.S: Isiqalisi file ebhalwe ngolimi lokuhlangana.
  6. src/bsp/loader.c: i-bootloader file, esetshenziselwa ukuqala ku-SPI Flash.
  7. ae250.sag: I-Sag isikripthi sefomethi yokuhlakazeka nokuqoqa. Isetshenziselwa ukukhiqiza iskripthi sesixhumanisi. Kufanele kuqashelwe ukuthi imingcele yemephu yememori ku-ae250.sag idinga ukuhambisana naleyo eku-AE250.
  8. src/bsp/umshayeli: Lo mkhombandlela uqukethe amafolda amabili, i-ae250 iyikhodi yomshayeli ye-AE250, faka i-call interface yemisebenzi yomshayeli.
  9. src/bsp/lib: Iqukethe ezimbili files. Ku-printf.c, uhlobo lomsebenzi ongaphansi kumtapo wezincwadi ojwayelekile we-C uchazwa kabusha ukuze ukhiphe ulwazi lwe-printf nge-UART. Ku-read.c, kunomsebenzi olula wokufunda imininingwane yokufaka nge-UART.
I-Reference Design

Ngemva kokufaka, imiklamo embalwa eyisisekelo eyinkomba ingatholakala kufolda yedemo yohla lwemibhalo yokufaka noma ku-zip yomklamo wereferensi ku- webindawo; idizayini yesithenjwa ingalayishwa ku-RDS ukuze ihlolwe, ilungiswe futhi ithuthukiswe kabusha ngendlela yokungenisa. Imiklamo yereferensi iboniswa kanje:

  1. i-ae250_demo: Ibonisa okokufaka/okuphumayo kwe-UART kanye nokuphumayo kwe-GPIO kwe-AE250.
  2. ae250_plic: Ibonisa impendulo yesilawuli esiphazamisayo ekuphazamiseni, futhi inikeza ukuboniswa kwesibali-sikhathi somshini nesibali-sikhathi somgodi.
  3. ae250_freertos: Ibonisa ukuthi amachweba we-AE250 ashunyekiwe
    uhlelo lokusebenza lwesikhathi sangempela Uhlelo lwe-FreeRTOS olusebenzisa imicu eminingi.
  4. ae250_ucosiii: Ibonisa ukuthi amachweba we-AE250 ashumeke isistimu yokusebenza yesikhathi sangempela i-uC/OS-III uhlelo olusebenzisa imicu eminingi.

Amadokhumenti / Izinsiza

GOWIN FPGA Development Board RISCV Programming [pdf] Umhlahlandlela Womsebenzisi
I-FPGA Development Board RISCV Programming, Board RISCV Programming, FPGA Development RISCV Programming, RISCV Programming, Board RISCV

Izithenjwa

Shiya amazwana

Ikheli lakho le-imeyili ngeke lishicilelwe. Izinkambu ezidingekayo zimakiwe *