Actel SmartDesign MSS SPI Iṣeto Olumulo Itọsọna

SmartDesign MSS
Iṣeto SPI
Itọsọna olumulo

Awọn akoonu tọju

1 Ọrọ Iṣaaju

2 Awọn aṣayan iṣeto ni

3 Port Apejuwe

4 Awọn iwe aṣẹ / Awọn orisun

4.1 Awọn itọkasi

5 jẹmọ Posts

Ọrọ Iṣaaju

The SmartFusion Microcontroller Subsystem (MSS) provides two SPI hard peripherals (APB_0 and APB_1 sub busses) with optional FPGA fabric slave select ports extension.
The actual behavior of each SPI instance must be defined at the application level using the SmartFusion MSS SPI Driver provided by Actel.
In this document, we describe how you can enable the MSS SPI instances and access the fabric slave select ports. For more details about the MSS SPI hard peripherals, please refer to the Actel SmartFusion Microcontroller Subsystem User ká Itọsọna.

Awọn aṣayan iṣeto ni

Enabling/Disabling SPI Instances. On the MSS canvas, you need to enable (default) or disable each SPI instance based on whether it is being used in your current application. Disabled SPI instances are held in reset (lowest power state) after the Actel system boot code is executed. Enabled SPI instances external ports – MSS I/Os – are also automatically configured by the Actel system boot code. Note that MSS I/Os allocated to a SPI instance are available to connect to MSS GPIOs if that SPI instance is disabled. Refer to the MSS GPIO configurator handbook for more details.

Fabric Slave Select Extension. You may drive up to 3 slave select signals for SPI_0 and 7 for SPI_1 into the FPGA fabric; to do this, you need to manually promote to the top level the FAB_SS[] port present on the MSS SPI instance(s) used in your application. You can then use the FAB_SS port in the next level of hierarchy where it can be ‘sliced’ as individual slave select signals.

Port Apejuwe

Orukọ Port	Ibudo Ẹgbẹ	Itọsọna	PAD?	Apejuwe
DI	PADs	In	Bẹẹni	Shift data in (master or slave)
DO	PADs	Jade	Bẹẹni	Serial data out (generated by SPI as master)
CLK	PADs	Wọle	Bẹẹni	Shift clock out (generated by SPI as master)
SS	PADs	Wọle	Bẹẹni	External dedicated slave select port (generated by SPI as master)
FAB_SS[n:1]		Jade	Rara	Optional routed slave select ports (generated by SPI as master)

Awọn akọsilẹ:

Awọn ebute oko oju omi PAD ni igbega laifọwọyi si oke jakejado awọn ilana apẹrẹ.

Awọn ebute oko oju omi ti kii ṣe PAD gbọdọ ni igbega pẹlu ọwọ si ipele oke lati kanfasi atunto MSS lati wa bi ipele ti atẹle.

Actel jẹ oludari ni agbara-kekere ati awọn FPGA ifihan agbara-dapọ ati pe o funni ni akojọpọ okeerẹ ti eto ati awọn solusan iṣakoso agbara. Awọn nkan agbara. Kọ ẹkọ diẹ sii ni 5Hhttp://www.actel.com .

Ile-iṣẹ Actel 2061 Stierlin ẹjọ Òkè View, CA 94043-4655 USA Foonu 650.318.4200 Faksi 650.318.4600	Actel Europe Ltd. River ẹjọ, Meadows Business Park Ọna Ibusọ, Blackwater Camberley Surrey GU17 9AB apapọ ijọba gẹẹsi Foonu +44 (0) 1276 609 300 Faksi +44 (0) 1276 607 540
Actel Japan EXOS Ebisu Building 4F 1-24-14 Ebisu Shibuya-ku Tokyo 150, Japan foonu +81.03.3445.7671 Faksi + 81.03.3445.7668 6Hhttp://jp.actel.com	Actel Ilu Họngi Kọngi Yara 2107, China Resources Building 26 Opopona Ibudo Wanchai, Ilu họngi kọngi Foonu +852 2185 6460 Faksi +852 2185 6488 www.actel.com.cn