CHAPTER 1 INTRODUCTION
SYSTEM OVERVIEW
The S4967 Rev:2B.31 486 Cache system board Is 2/3 Baby AT-sized, fully PC/AT compatible and offers outstanding performance and features.
With 128K/256K/512K/1M cache memory on board, this system board Is really a high speed machine that is well suited for building advanced personal computers or workstat- lons.
The $4967 Rev:2B.31 486 Cache system board is designed with the SIS 85C496/85C497 chipset which are highly integrated. With this chipset, there are only a few discrete
devices required, which allows 4 memory banks to be placed on the board. The size of the memory can be scaled from 1 MB up to 255 MB.
FEATURES
The $4967 Rev:2B.31 486 Cache system board supports (or includes) the following features:
* Support
Intel 486SX/SX2/DX/DX2,DX4(3.45V),P24D,P24T AMD DX,DX2/DX4(NV8T),OX2/DX4(SVEB) Cyrix SX/DX/DX2,DX2-V66/VB0(3.45V),DX4(3.45V), 15×86 (3.45V) in 25/33/40/SOMHZ
- Designed with SIS 85C496/85C497 Chipsets
- Support 128K/256K/512K/1M 2nd Level Cache
- Support 4 DRAM Banks. The DRAM can be bul with elther Single-Sided or Double- Sided SIMMs. The maximum memory Is up to 255MB
- Software-controlied shadow RAM for system and/or video BIOS
- Three 32-bit PCI local bus slots, four 16-bk expansion slots
CHAPTER 2 SYSTEM BOARD LAYOUT
Placement of the S486 Rev:2B.31
CHAPTER 3 HARDWARE CONFIGURATION
Before the system Is ready to operate, the hardware must be configured to allow for various functions within the system. To configure the $4967 Rev:2B.31 Cache system
board is a simple task, only a few Jumpers, connectors, and sockets needs to be selected.
CACIIE MEMORY SOCKETS
The $4967 Rev:2B.31 Cache system board supports 2 banks of SRAM which provides either 126/256K/512K/1MB of cache memory. The following table lists the detailed
information.
The corresponding bank to part identification are as follows:
Bank 0 – U9, U11, U19, U24
Bank 1 – U10, U14, U20, U2
Tag =~ U8 –
| Cache size | Cacheable DRAM size (8 bit tag) |
Cacheable DRAM size (7 bit tag) |
| – 64K byte | 16fvW fe 32M-byte 64M byte |
8M byte |
| —128K byte | t6M byte 32M byte |
|
| 256K byte | ||
| 512Kb_yte | 128M byte | 64M byte |
| 1M byte | 255M byte | 128M byte |
Table 3-2 Cache Size Options
| Processor Type | Ll Cache Mode | L2 Cache Mode |
| 4 86SX/DX/DX2/ DX4/SL-Enhanced | WT | WT/WB WTNV B |
| P24D/P24T | WT/WB | |
| Cyrix M7/DX4/M1sc | WT/WB | WT/WB |
| Am486DXL/DX2 DX4-100 NV8T | WE | WT/WB |
| Arn486Dr47100/120 SV8B | WI/WS | WT/WB |
Table 3-3 Lt/L2 Cache Configurations
| Cycle Definition Hiiinii–emory | Total Clocks at Host Interface | S0MHz | ||
| 251V1Hz | 33MHz | 40MHz | ||
| Single-Read (L2 Cache Hit) | 2 | 2 | 2 | 2 |
| —-S ri-i-gle-Reacf(12 Cache Miss) | 3 | 4 | 5 | 6 |
| —Teurst-Read (L2 Cache Hit) | 2-1-1-1 | 2-1-1-1 | 3-2-2-2 | 3-2-2-2 |
| urst-Read (L2 Cache Miss) |
3-2-2-2 | 4-3-3-3 | 5-4-4-4 | 6-5-5-5 |
| –Single-Write (L2 Cache Hit) | 2 | 2/VVB,3/WT | 3/W6,4/WT | 3/VVB,5NVI |
| Single-Write (L2 Cache Miss) |
2 2-1-1-1/WB 3-2-2-2/WT 3-2-2-2 |
3 2-1-1-1/WB 3-2-2-2/WT 3-2-2-2 |
4 3-2-2-2/WB 4-3-3-3/WT |
5 3-2-2-2/WB 5-4-4-4/WT |
| *Burst-Write (U Cache Hit) | ||||
| Burst-Write (U Cache Miss) |
4-3-3-3 | 5-4-4-4 | ||
Table 3-4 U Cache/DRAM Performance Options
SHADOW CACHEABLE
UMB (Upper Memory Block) which Is not main memory area Is by default non-cacheable. However, once shadowed, the RAM segments 0C0000-OFFFFFh can be further cached in Level 2 and Level 1 cache. Each 32K memory segments can be Individually enabled to be cacheable by both 85C495’s secondary level cache and CPU’s internal cache.SIMM SOCKETS
je $4967 Rev:2B.31 Cache system board will support 4 DRAM banks, Bank 0 and Bank 1 k 2 and Bank 3 in SIMM sockets use 72-pin SIMM : DRAM type can be 256K, 512K, , 2M, 4M, or 16M by 32/36 bits Single side or Double side Fast Page Mode and faster in BONs.
the use of 256K, 512K, 1M, 2M, 4M or 16M DRAM modules, 1M and upto 255 M of memory can be attained. The installation of DRAM SIMMs Is “Table-free”, which
the SIMMs be installed into any siot location and any combinations.
PU INSTALLATION :
CPU Type select
JUMPER:
CONNECTORS:
Documents / Resources
 |
the retro web S4967 486 Cache System Board [pdf] User Manual S4967 486 Cache System Board, S4967, 486 Cache System Board, Cache System Board, System Board, Board |
