Microsemi DG0618 Kukanganisa Kuona uye Kururamisa paSmartFusion2 Zvishandiso uchishandisa DDR Memory.

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About Microsemi
Microsemi Corporation (Nasdaq: MSCC) inopa yakazara portfolio ye semiconductor uye system mhinduro dzeaerospace & dziviriro, kutaurirana, data data uye misika yeindasitiri. Zvigadzirwa zvinosanganisira kushanda kwepamusoro uye nemwaranzi-yakaomeswa analogi yakasanganiswa-chiratidzo chekubatanidza maseketi, FPGAs, SoCs uye ASICs; magetsi ekugadzirisa zvigadzirwa; nguva uye midziyo yekuwiriranisa uye chaiyo nguva mhinduro, kuseta chiyero chenyika chenguva; midziyo yekugadzirisa izwi; RF mhinduro; discrete components; bhizinesi kuchengetedza uye kutaurirana mhinduro, kuchengetedza matekinoroji uye scalable anti-tamper products; Ethernet mhinduro; Simba-pamusoro-Ethernet ICs uye midspans; pamwe chete nemaitiro ekugadzira maitiro uye masevhisi. Microsemi inotungamirwa muAliso Viejo, California, uye ine vashandi vangangoita 4,800 pasi rose. Dzidza zvakawanda pa www.microsemi.com.

Revision History

Nhoroondo yekudzokorora inotsanangura shanduko dzakaitwa mugwaro. Kuchinja kwacho kunorongwa nekudzokorora, kutanga nebhuku razvino uno.

• Kudzokorora 4.0
  Yakagadziridza gwaro reLibero v11.8 software kuburitswa.
• Kudzokorora 3.0
  Yakagadziridza gwaro reLibero v11.7 software kuburitswa.
• Kudzokorora 2.0
  Yakagadziridza gwaro reLibero v11.6 software kuburitswa.
• Kudzokorora 1.0
  Kwekutanga kuburitswa kweLibero SoC v11.5 software kuburitswa.

Kukanganisa Kuona uye Kugadzirisa paSmartFusion2 Zvishandiso uchishandisa DDR Memory

Nhanganyaya
Muchiitiko chimwe chete chakagumbura (SEU) nharaunda inotapukira, kungoitika ndangariro (RAM) inowanzoitika kune zvikanganiso zvenguva pfupi zvinokonzerwa nemaion anorema.
Gwaro iri rinotsanangura kugona kweEDAC kweSoC FPGA, iyo inoshandiswa mumashandisirwo ane ndangariro dzakabatana kuburikidza neiyo microcontroller subsystem (MSS) DDR (MDDR).
Iwo maEDAC controllers akaiswa muSmartFusion2 zvishandiso zvinotsigira imwechete kukanganisa kururamisa uye kaviri kuona kukanganisa (SECDED). Yese ndangariro-yakakwidziridzwa static random access memory (eSRAM), DDR, low-power DDR (LPDDR)-mukati meSmartFusion2 MSS zvishandiso zvinodzivirirwa neSECDED. Iyo DDR synchronous dynamic random access memory (SDRAM) inogona kuve DDR2, DDR3, kana LPDDR1, zvichienderana neMDDR kumisikidzwa uye hardware ECC kugona.
Iyo SmartFusion2 MDDR subsystem inotsigira ndangariro densities kusvika ku4 GB. Mune iyi demo, unogona kusarudza chero nzvimbo yekuyeuka ye1 GB munzvimbo yeDDR kero (0xA0000000 kusvika 0xDFFFFFFF).
Kana SECDED ikagoneswa:

• Basa rekunyora rinobatanidza uye rinowedzera 8 bits yeSECDED kodhi (kune yega 64 bits yedata)
• Basa rekuverenga rinoverenga uye rinotarisa iyo data inopesana neyakachengetwa SECDED kodhi kutsigira 1-bit kukanganisa kururamisa uye 2-bit yekuona kukanganisa.

Uyu unotevera mufananidzo unotsanangura dhizaini yeBroka yeSmartFusion2 EDAC paDDR SDRAM.

Mufananidzo 1 • Yepamusoro-Level Block Diagram

Iyo EDAC chimiro cheDDR chinotsigira zvinotevera:

1.  SECDED mechanism
2. Inopa kukanganisa kuARM Cortex-M3 processor uye FPGA jira pakuona kwe1-bit kukanganisa kana 2-bit kukanganisa.
3. Inochengeta nhamba ye1-bit uye 2-bit zvikanganiso mumarejista ezvikanganiso
4. Inochengeta kero yekupedzisira 1-bit kana 2-bit kukanganisa kwakakanganisa nzvimbo yendangariro
5. Inochengeta 1-bit kana 2-bit kukanganisa data muSECDED marejista
6. inopa kukanganisa bhazi masaini kune iyo FPGA jira

Kuti uwane rumwe ruzivo nezve EDAC, ona UG0443: SmartFusion2 uye IGLOO2 FPGA Chengetedzo uye Reliability User Guide uye UG0446: SmartFusion2 uye IGLOO2 FPGA High-Speed ​​DDR Interfaces User Guide.

Zvido zvekugadzira
Tafura inotevera inonyora zvinodiwa zvekugadzira.

Tafura 1 • Zvido zvekugadzira

• Design Zvinodiwa Tsananguro
• Hardware Zvinodiwa
• SmartFusion2 Yepamberi Yekuvandudza Kit bhodhi Rev B kana gare gare
• FlashPro5 programmer kana gare gare
• USB A kune mini-B USB tambo
• Simba adapter 12 V
• DDR3 Mwanasikana bhodhi
• Operating System Chero 64-bit kana 32-bit Windows XP SP2
• Chero 64-bit kana 32-bit Windows 7
• Software Zvinodiwa
• Libero® System-on-Chip (SoC) v11.8
• SoftConsole v4.0
• FlashPro programming software v11.8
• Bata PC Madhiraivha USB kune madhiraivha eUART
• Framework to run demonstration Microsoft .NET Framework 4 client

Demo Dhizaini
Iyo demo dhizaini files iripo yekurodha kubva kune inotevera nzira muMicrosemi websaiti: http://soc.microsemi.com/download/rsc/?f=m2s_dg0618_liberov11p8_df
Iyo demo dhizaini files dzinosanganisira:

• DDR Configuration File
• DDR_EDAC
• Programming files
• GUI inoshandiswa
• Readme file

Mufananidzo unotevera unotsanangura chimiro chepamusoro-soro chekugadzira files. Kuti uwane rumwe ruzivo, ona readme.txt file.

Mufananidzo 2 • Demo Dhizaini Yepamusoro-Chimiro Chimiro

Demo Dhizaini Implementation
Iyo MDDR subsystem ine yakazvitsaurira EDAC controller. EDAC inoona kukanganisa kwe1-bit kana 2-bit kukanganisa kana data ichiverengwa kubva mundangariro. Kana EDAC ikaona kukanganisa kwe1-bit, mutongi weEDAC anogadzirisa kukanganisa. Kana EDAC ikabatidzwa pazvikanganiso zvese zve 1-bit uye 2-bit, zviverengero zvekukanganisa zvinoenderana mumarejisitasi ehurongwa zvinowedzerwa uye zvinopindirana zvinovhiringa uye masaini ekutadza kwebhazi kumucheka weFPGA anogadzirwa.
Izvi zvinoitika munguva chaiyo. Kuti uratidze ichi SECDED chimiro, chikanganiso chinounzwa pamaoko uye chakacherechedzwa kuonekwa nekugadzirisa.
Iyi demo dhizaini inosanganisira kuita zvinotevera matanho:

1. Gonesa EDAC
2. Nyora data kuDDR
3. Verenga data kubva kuDDR
4. Dzima EDAC
5. Huori 1 kana 2 bits
6. Nyora data kuDDR
7. Gonesa EDAC
8. Verenga data
9. Panyaya yekukanganisa kwe1-bit, mutongi weEDAC anogadzirisa chikanganiso, anovandudza marejista emamiriro anoenderana, uye anopa iyo data yakanyorwa muChikamu 2 pakuverenga kwakaitwa paChikamu 8.
10. Kana iri 2-bit kukanganisa, kukanganisa kunoenderana kunogadzirwa uye application inofanirwa kugadzirisa data kana kutora danho rakakodzera mubato rinokanganisa. Nzira mbiri idzi dzinoratidzwa mune iyi demo.

Maedzo maviri anoitwa mune iyi demo: loop test uye manual test uye inoshanda kune ese ari maviri-bit uye 1-bit zvikanganiso.

Loop Test
Loop test inoitwa kana SmartFusion2 zvishandiso zvinogamuchira loop test command kubva kuGUI. Pakutanga, zviverengero zvese zvekukanganisa uye marejista ane chekuita neEDAC anoiswa munzvimbo yeRESET.
Matanho anotevera anoitwa kune imwe neimwe iteration.

1. Gonesa iyo EDAC controller
2. Nyora iyo data kune chaiyo DDR memory nzvimbo
3. Dzima EDAC controller
4. Nyora iyo 1-bit kana 2-bit kukanganisa kwakakonzera data kune imwecheteyo DDR memory nzvimbo
5. Gonesa iyo EDAC controller
6. Verenga iyo data kubva kune imwecheteyo DDR ndangariro nzvimbo
7. Tumira iyo 1-bit kana 2-bit yekuona kukanganisa uye 1-bit kukanganisa kukanganisa data kana paine 1-bit kukanganisa kuGUI.

Chinyorwa Chekuongorora
Iyi nzira inobvumira kuongororwa kwemanyorerwo e1-bit kukanganisa kukanganisa uye kururamisa uye 2-bit yekuona kukanganisa kweDDR memory kero (0xA0000000 kusvika 0xDFFFFFFF) nekutanga. A 1-bit/2-bit kukanganisa inounzwa nemaoko kune yakasarudzwa DDR memory kero. Iyo data yakapihwa inonyorerwa kune yakasarudzwa DDR memory nzvimbo ine EDAC inogoneswa. Iyo yakashatiswa 1-bit kana 2-bit yekukanganisa data inozonyorerwa kune imwechete ndangariro nzvimbo ine EDAC yakaremara. Ruzivo rwechikanganiso chakaonekwa 1-bit kana 2-bit chinoiswa kana data ichiverengwa kubva panzvimbo imwechete yekurangarira ine EDAC inogoneswa. Iyo yepamusoro-inoshanda DMA controller
(HPDMA) inoshandiswa kuverenga data kubva kuDDR memory. Iyo mbiri-bit kukanganisa yekuona kukanganisa mubato inoiswa kuti itore danho rakakodzera kana 2-bit kukanganisa kwaonekwa.
Mufananidzo unotevera unotsanangura maitiro eEDAC demo.

Mufananidzo 3 • Kuyerera Kwekugadzira

Cherechedza: Kune 2-bit kukanganisa, kana Cortex-M3 processor ichiverenga data, iyo kodhi kuuraya inoenda kune yakaoma chibatiso chekubata, sezvo iyo yekukanganisa yakagamuchirwa inononoka kuti processor ipindure. Nenguva iyo inopindura kune kukanganisa, inogona kunge yatopfuura data uye netsaona yakatanga murairo. Nekuda kweizvozvo, iyo HRSP inomira kugadzirisa iyo data isiriyo. 2-bit yekuona kukanganisa kunoshandisa HPDMA kuverenga data kubva kuDDR kero nzvimbo, iyo inoraira processor iyo inoverenga data ine 2-bit kukanganisa uye sisitimu inofanirwa kutora danho rakakodzera kupora (ECC inokanganisa Handler).

Kugadzira iyo Demo Dhizaini
Ichi chikamu chinotsanangura SmartFusion2 Advanced Development Kit board setup, iyo GUI sarudzo, uye maitiro ekuita demo dhizaini.
Matanho anotevera anotsanangura maitiro ekuseta demo:

1. Batanidza imwe magumo e USB mini-B tambo kune J33 yekubatanidza yakapihwa muSmartFusion2 Yepamberi Yekuvandudza Kit bhodhi. Batanidza imwe magumo e USB tambo kune inotambira PC. Chiedza emitting diode (LED) DS27 inofanira kuvheneka, zvichiratidza kuti UART link yaiswa. Ita shuwa kuti iyo USB kune UART madhiraivha ebhiriji anongoonekwa otomatiki (anogona kusimbiswa muChishandiso Maneja), sezvakaratidzwa mumufananidzo unotevera.
   Mufananidzo 4 • USB kuUART Bridge Driver
   
   Kana USB kuUART madhiraivha ebhiriji asina kuisirwa, dhawunirodha uye isa madhiraivha kubva: www.microsemi.com/soc/documents/CDM_2.08.24_WHQL_Certified.zip.
2. Batanidza zvinosvetuka pabhodhi reSmartFusion2 Advanced Development Kit, sezvaratidzwa muTebhura 4, peji 11. Shambi yemagetsi SW7 inofanira kudzimwa, paunenge uchiita zvinobatanidza jumper.

Mufananidzo 5 • SmartFusion2 Advanced Development Kit Board Setup

 Graphical User Interface
Ichi chikamu chinotsanangura iyo DDR - EDAC Demo GUI.

Mufananidzo 6 • DDR - EDAC Demo GUI

Iyo GUI inotsigira zvinotevera maficha:

1. Kusarudzwa kweCOM port uye Baud Rate
2. Kusarudzwa kwe1-bit kukanganisa kururamisa tab kana 2-bit yekuona kukanganisa
3. Kero ndima yekunyora kana kuverenga data kune kana kubva kune yakatarwa DDR kero
4. Nzvimbo yedata yekunyora kana kuverenga data kune kana kubva kune yakatarwa kero yeDDR
5. Seri Console chikamu chekudhinda iyo mamiriro eruzivo akagamuchirwa kubva kuchishandiso
6. Gonesa EDAC/Dzivisa EDAC: Inogonesa kana kudzima iyo EDAC
7. Nyora: Inobvumira kunyora data kukero yakatarwa
8.  Verenga: Inobvumira kuverenga data kubva kukero yakatarwa
9. Loop bvunzo ON/OFF: Inobvumira kuyedza iyo EDAC michina nenzira ye loop
10.  Tanga: Inobvumira kutanga iyo yakatemerwa ndangariro nzvimbo (mune iyi demo A0000000-A000CFFF)

Kumhanyisa Demo Dhizaini
Matanho anotevera anotsanangura maitiro ekugadzira dhizaini:Matanho anotevera anotsanangura maitiro ekumhanyisa dhizaini:

1. Batidza switch yekugovera, SW7.
2. Ronga iyo SmarFusion2 mudziyo ine hurongwa file zvakapihwa mukugadzira files.(\ProgrammingFile\EDAC_DDR3.stp) uchishandisa FlashPro dhizaini software, sezvakaratidzwa mumufananidzo unotevera.
   Mufananidzo 7 • FlashPro Programming Window
   
3. Dzvanya SW6 switch kuti uisezve bhodhi mushure mekubudirira kwechirongwa.
4. Tangisa iyo EDAC_DDR Demo GUI inogoneka file inowanikwa mukugadzira files (\GUI Inoita\EDAC_DDR.exe). Iwindo reGUI rinoratidzwa, sezvakaratidzwa mumufananidzo 8, peji 9.
5. Dzvanya Batanidza, inosarudza iyo COM port uye inomisikidza kubatana. Batanidza sarudzo dzekuchinja kuDimbura.
6. Sarudza iyo 1-bit Error Correction tab kana 2-bit Error Detection.
7. Manual uye Loop bvunzo dzinogona kuitwa.
8. Dzvanya Tanga kuti utange DDR ndangariro kuita Manyoro uye Loop bvunzo, yekutanga meseji yekupedzisa inoratidzwa paSerial Console, sezvakaratidzwa muFigure 8, peji 9.

Mufananidzo 8 • Kutanga Kupedzwa Hwindo

Kuita Loop Test
Dzvanya Loop Test ON. Inomhanya mu loop mode uko kunoramba kuchigadziriswa uye kuona zvikanganiso kunoitwa. Zvese zviito zvakaitwa muSmartFusion2 mudziyo zvakaiswa muSeri Console chikamu cheGUI.

Tafura 2 • DDR3 Memory Kero inoshandiswa muLoop Test

• Memory DDR3
• 1-bit kukanganisa kukanganisa 0xA0008000
• 2-bit kukanganisa kukanganisa 0xA000C000

Kuita Manual Test
Nenzira iyi, zvikanganiso zvinounzwa nemaoko uchishandisa GUI. Shandisa matanho anotevera kuita 1-bit kukanganisa kukanganisa kana 2-bit kuona kukanganisa.

Tafura 3 • DDR3 Memory Kero inoshandiswa muBhuku Test

Input Kero uye Data fields (shandisa 32-bit Hexadecimal values).

• Memory DDR3
• 1-bit kukanganisa kukanganisa 0xA0000000-0xA0004000
• 2-bit kukanganisa kuona 0xA0004000-0xA0008000

1. Click Enable EDAC.
2. Dzvanya Nyora.
3. Dzvanya Dzima EDAC.
4. Shandura bhiti rimwe (kana 1-bit kukanganisa kukanganisa) kana maviri mabheti (kana 2-bit yekuona kukanganisa) muData field (kuunza kukanganisa).
5. Dzvanya Nyora.
6. Click Enable EDAC.
7. Baya Read.
8. Tarisa Kukanganisa Kuverengera Kuratidza uye Data munda muGUI. Iko kukanganisa kuverenga kukosha kunowedzera ne1.

Iyo 1-bit kukanganisa loop yekururamisa hwindo inoratidzwa mumufananidzo unotevera.

Mufananidzo 9 • 1-bit Error Loop Detection Window

Iyo 2-bit kukanganisa yekuona bhuku hwindo inoratidzwa mumufananidzo unotevera.

Mufananidzo 10 • 2-bit Error Detection Manual Window

Mhedziso
Iyi demo inoratidza SmartFusion2 SECDED kugona kweiyo MDDR subsystem.

Appendikisi: Jumper Settings

Tafura inotevera inoratidza ese anosvetuka anodiwa kuseta paSmartFusion2 Yepamberi Yekuvandudza Kit.

Tafura 4 • SmartFusion2 Advanced Development Kit Jumper Settings

Jumper : Pin (Kubva) : Pin (Ku) : Comments

• J116, J353, J354, J54 1 2 Aya ndiwo akasarudzika jumper marongero eAdvanced
• J123 2 3 Development Kit board. Ita shuwa kuti majumper aya akaiswa zvinoenderana.
• J124, J121, J32 1 2 JTAG programming kuburikidza neFTDI

DG0618 Demo Gwaro Kudzokororwa 4.0

Zvinyorwa / Zvishandiso

Microsemi DG0618 Kukanganisa Kuona uye Kururamisa paSmartFusion2 Zvishandiso uchishandisa DDR Memory. [pdf] Bhuku reMushandisi DG0618 Kukanganisa Kuona uye Kugadzirisa paSmartFusion2 Zvishandiso uchishandisa DDR Memory, DG0618, Kukanganisa Kuona uye Kugadzirisa paSmartFusion2 Midziyo inoshandisa DDR Memory, SmartFusion2 Devices inoshandisa DDR Memory, DDR Memory.

References

• User Manual