Capacitive Load Charging in Zonal eFuses

Introduction and Scope

This application note details the capacitive load charging capability of power switches/eFuses in zonal architectures. It builds upon previous notes on smart power distribution and highlights the importance of dedicated modes for charging capacitive loads, comparing different design implementations and discussing onsemi eFuse methodology and performance impacts.

Capacitive Load (CL) Mode

Application Use Cases: Conventional applications like lighting, heating, power windows, HVAC, audio systems, and ADAS units often require significant power surges at startup. Capacitors parallel to these loads help stabilize output voltage during transients. In zonal architectures, smart switches replace fuses, supplying multiple electronic control units (ECUs) that typically have bulk or reserve capacitors at their input to ensure uninterrupted power during transients or supply drops. These capacitors can range from tens of µF to several mF. Charging these capacitors via smart switches/eFuses makes capacitive load charging a key feature.

Key Design Considerations

Several factors influence capacitive load charging design, including maximum current, desired charge time, supply voltage, output cable impedance, and power dissipation. System cost and PCB area are also critical. Optimizing these aspects often involves trade-offs.

Managing Peak Inrush Current

The primary challenge is managing the inrush current required to charge capacitive loads. High inrush currents can trigger internal overcurrent detection, leading to shutdown and preventing capacitor charging, especially if no retry strategy is implemented. This can cause transients or power loss in other connected loads. Repetitive high inrush events can also compromise device lifetime and reliability.

Figure 2 illustrates inrush profiles when charging a 3.9 mF capacitor to 13.5 V using NCV84003G without the integrated capacitive charging mode. Figure 2(a) shows a profile with reduced overcurrent detection, where the device shuts down before full charge. Figure 2(b) shows the default overcurrent detection, where load levels can exceed 100 A during inrush, even after the capacitor is charged.

Avoiding Supply Voltage Drops

High output current spikes during inrush can cause supply voltage drops, affecting device operation, particularly during cold cranking. Harness resistance (e.g., 10 mΩ/meter for 14-gauge wire) can contribute to voltage drops of 1-2 V at peak currents of ~100A. These drops can impact internal references, overcurrent thresholds, and current sense outputs. Prolonged voltage drops also increase supply recovery times, delaying capacitor charging. Furthermore, voltage drops affect other loads powered by the same supply, potentially causing compromised performance or shutdown.

Soft-Start Implementation

Reducing high current excursions during inrush can be achieved through various approaches, with output ramp slew rate reduction being a primary method. Switching ICs use active circuitry to control the gate charge of the output stage, thereby setting output voltage slew rates. This active slew rate control is crucial for EMC performance and enables a "soft-start" for specific inrush requirements.

The NCV84003G features load-dependent dynamic slew rate adjustment. As load current increases (e.g., from 5A to 40A), the turn-on profile and slew rate dynamically decrease, as shown in Figure 3, while charging to 13.5V.

This approach can be enhanced by "folding back" the base slew rate in a dedicated capacitive charging mode, allowing a gradual output voltage turn-on. The relationship I = C*dv/dt shows that a slower slew rate (dv/dt) limits inrush current (I) for a given capacitor (C).

Figure 4 compares charging a 220 µF capacitor to 13.5 V with normal versus reduced slew rates. The reduced slew rate (Figure 4b, ~0.03V/µs) exhibits lower current excursions and less supply voltage drop compared to the normal slew rate (Figure 4a, ~0.2V/µs).

While reduced slew rates limit inrush current, they increase charging time and energy dissipation in the switching device. Figure 5 illustrates that switching losses are approximately doubled with reduced slew rates.

onsemi offers devices like NCV84003G with integrated slew rate reduction and NIV3071 with external capacitor control for slew rate adjustment. Proper design considerations for noise and parasitic impedance at the slew rate control pin are essential.

In-Rush Management Considerations - Avoiding Over-heating

Charging large capacitive loads can lead to significant power dissipation and higher die temperature gradients. A short circuit condition during capacitive charging mode can exacerbate this, potentially causing over-temperature shutdowns. Figure 6 shows a short circuit example on a 3 mΩ switch with reduced slew rates, resulting in a thermal gradient exceeding 60°C and peak power of ~800W, in the absence of a dedicated thermal shutdown scheme for CL mode.

onsemi Smart Switches with capacitive charge mode feature differential over-temperature shutdown protection specifically configured for this mode, limiting the dynamic temperature gradient to 30°C instead of the nominal 80°C for normal operation. Figure 8 demonstrates a short circuit scenario in capacitive load mode with NCV84003G, showing reduced power loss and temperature gradient (Delta T = 30°C) compared to Figure 6.

Current Regulation vs Device SOA

Implementing an internal current limit to regulate output at a constant level can manage inrush current. However, this requires the FET to operate in a linear region for extended periods, potentially infringing the Safe Operating Area (SOA) of integrated power FETs. The relationship I = C*V/t shows that for a 5 mF load charged to 13.5V, an inrush time of 20-50 ms implies currents of 1-4A. Figure 7(a) shows the SOA curve for a typical 4 mΩ FET (NVTFWS4D9N04XM). A 7V average output voltage during inrush for a 10ms pulse can result in currents slightly over 4A, potentially triggering protection mechanisms or interrupting charging. Reducing the regulated current can prevent protection engagement but increases inrush time.

Operating FETs in linear mode also raises concerns about stability and hotspot formation due to the loss of negative temperature coefficient advantage. While current regulation is feasible, it presents operating challenges. Some high-voltage EV applications use a separate pre-charge path with a resistor, but this increases PCB area and BOM cost.

onsemi Approach – Capacitive Load Mode

onsemi's capacitive load mode integrates:

• Active slew rate control mechanism.
• Foldback of differential over-temperature shutdown.
• Auto-retry strategy for inrush management.

Slew rate reduction limits inrush. The foldback over-temperature shutdown prevents excessive power and thermal losses associated with reduced slew rates, limiting the dynamic temperature gradient to 30°C. Figure 8 shows a short circuit in CL mode with NCV84003G, demonstrating reduced power loss and temperature gradient compared to Figure 6. The folded DTSD threshold helps limit peak currents.

The auto-retry strategy addresses the trade-off of longer charging times. It allows the output stage to turn on again without microcontroller intervention, with a "cool-down" period between retries to manage heat and SOA concerns. Figure 9 shows the NCV84003G charging a 3.9 mF capacitor with this mode, demonstrating reduced inrush current and supply voltage drop compared to Figure 2.

Once the output voltage reaches a sufficient threshold, the device automatically exits capacitive load mode. A timer internally limits the maximum time in capacitive load mode to prevent repetitive retries during short circuits or with oversized loads. If a short circuit persists after the timer expires, protection circuitry engages, potentially shutting down the eFuse and providing diagnostic feedback.

onsemi's direct drive zonal smart switches offer auto-entry into capacitive load mode at switch-on from sleep. Devices with SPI communication allow microcontrollers to enable/disable this mode via configuration registers. Specific product data sheets should be consulted for parametric specifications and entry/exit criteria.

Additional Considerations

External setup conditions and parasitics, such as the capacitor's ESR, influence charge characteristics and can change with temperature. Figure 10 shows NCV84003G charging a 3.9 mF capacitor at 25°C (~11ms) and 85°C (~14ms), illustrating how impedance changes at higher temperatures lead to longer charge times.

The connected load also affects charging time. A low impedance load can "load the capacitor," increasing charge time. A high impedance load might delay discharge, potentially causing open load detection. Cable inductance can cause voltage overshoots during repetitive retries, which the device is designed to absorb.