Using I2C Master in TPS65987D and TPS65988 PD Controllers

Abstract

The TPS65987D and TPS65988 are stand-alone USB Type-C and Power Delivery (PD) controllers providing cable plug and orientation detection for two USB Type-C connectors. Upon cable detection, these PD controllers communicate on the CC wire using the USB PD protocol. When cable detection and USB PD negotiation are complete, the TPS65987D and TPS65988 enable the appropriate power path and configure alternate mode settings for external multiplexers.

This device also includes three I2C ports, out of which one I2C port can work as both master and slave, one I2C port can work as an I2C master only, and one can work as an I2C slave only. The I2C masters allow the PD controller to control various kinds of slaves directly instead of using an external controller to do the same. This helps to design robust systems with least external dependencies while reducing system latencies.

This application report will also demonstrate the usage of TI's configuration utility to configure the I2C masters of TPS65987D and TPS65988 PD Controllers to control two different kinds of devices.

1 Introduction

This application note is aimed to demonstrate the usage of TPS65987D and TPS65988's I2C Master's configuration, its usage, and how it can be used to solve system complexity.

TPS65987D and TPS65988 each contain three I2C ports which can be used to control an I2C slave, like an alternate mode mux, battery charging controller, and others. At the same time, I2C ports can be used as an I2C slave to provide Host Interface to control the various features of the chip. All of these I2C ports can support Fast (400 KHz) and Standard (100 KHz) I2C modes with burst writing. Table 1 provides an overview of the features offered by each I2C port.

Table 1. I2C Port Features

2 Advantages of having an I2C master in a PD controller

In a traditional system, a PD controller is generally an I2C slave and therefore needs an external embedded controller (EC) to control all the external I2C slave devices like battery management controllers, I2C based alternate mode multiplexers, and so forth. In such systems, the EC is interrupted when there is a PD event. The EC then queries the PD controller upon receiving the interruption, processes the received data, and then finally controls the required device. This process involves multiple I2C read and write transactions, leading to long times and high latencies. In certain situations, latencies increase significantly, causing system timings to be missed and requiring the complete PD negotiation to be retried.

To solve this issue, TI's TPS65987D and TPS65988 series of devices include two I2C Masters that can directly control external I2C slaves. Controlling these slave devices directly makes the solution simpler, more efficient, reduces latencies, and makes the system more robust.

3 How to configure I2C master in TI's Configuration Utility

Several steps are involved in configuring the I2C master:

1. Create or open an existing project and navigate to the "Global System Configuration" tab.
2. Check the checkboxes for the I2C ports you wish to use as masters. Note that the I2C1 port cannot be used for a TBT controller if it is configured as an I2C master.

Figure 1: Global System Configuration

This screenshot of the Application Customization Tool shows the "Global System Configuration" tab. Users select which I2C ports (e.g., I2C1, I2C3) to enable as masters by checking the corresponding boxes. For example, enabling "I2C1 Enable as Master" and "I2C3 Enable as Master" is shown.

3. Navigate to the "I2C Master Configuration" tab. Here, set the I2C address for each connected I2C slave and specify the I2C port it is connected to. Since TPS65987D and TPS65988 devices have two I2C master ports, users can select the appropriate port from a dropdown menu for each slave. Configure this tab for all necessary slaves, leaving remaining slave configurations at their default (e.g., Slave x I2C Address = 0x0).

Figure 2: I2C Master Configuration

This screenshot displays the "I2C Master Configuration" tab. It shows fields for "Slave 1 I2C Address" (e.g., 0x6b) and "Slave 1 Master Selection" (e.g., I2C1 or I2C3), along with similar configurations for Slaves 2 through 5. This is where the I2C slave addresses and the master port (I2C1 or I2C3) used to communicate with them are defined.

4. From the "Settings Menu", select "Show App Config Data Table" to open the "App Config Data Table". This table contains unique hexadecimal values that are sent when triggered by an event. Depending on the event, the corresponding binary data from the mapped record is transmitted over I2C.

Figure 3: Show App Configuration Data Table

This screenshot shows the "Settings Menu" within the Application Customization Tool, highlighting the option "Show App Config Data Table" which is used to access the configuration data.

The "App Config Data Table" can accommodate up to fifty records, each containing 10 bytes of data. Record Index 0 is reserved for Country Code, while the remaining 49 records are available for user applications. Each record index has an associated trigger event. When this event occurs, the data in the "Data" field is sent to the associated slaves via I2C. The table includes five fields per record (excluding Record Index 0):

• Trigger Event: Specifies when the data stored in this index will be sent to the I2C slave. Appendix A lists available events.
• Data Length: Defines the number of bytes to be sent, which must match the data in the "Data" field.
• Slave Address Index: Associates the record with a particular I2C slave. Record Index 0 in the example is attached to the first I2C slave.
• Priority: Allows assigning priority to records when multiple data bytes need to be sent to different I2C slaves for a single PD event. A lower number indicates higher priority.
• Data: The hexadecimal values sent to the I2C slave. The rightmost bytes are sent first.

Figure 4: App Configuration Data Table

This screenshot shows the "App Config Data Table" interface, displaying various record indexes and their associated fields like Trigger Event, Data Length, Slave Address Index, Priority, and Data. It illustrates how to populate these fields for specific configurations.

Navigate to the "Common Settings, port 0" tab and fill in the "App Config Binary Data indices". This section requires multiple entries depending on system requirements and the number of Record Indexes used. Common I2C Records are for events and slaves common to both ports, while Port x I2C records are for port-specific events. The "Record Start index" indicates where the data begins, and "Number of Indexes" specifies how many records are used. The example shows data starting from Record Index 1, using nine Record Indexes, with the slave connected to Port 1.

Figure 5: App Configuration Binary Data Indices

This screenshot shows the "App Config Binary Data Indices" section within the "Common Settings, port 0" tab. It displays fields like "Port 1 I2C Record Start Index" and "Port 1 I2C Record Number of Indices", which are populated based on the previously configured records.

4 Configuring I2C Master for BQ25703A Battery Management Controller (BMC)

The BQ25703A is a synchronous NVDC battery buck-boost charge controller designed for multi-chemistry battery charging applications, supporting USB-PD systems with up to 20V/5A. Out of its 60 registers, only 9 require updates for this configuration. The relevant registers and their comments are:

The first two registers (0x00 and 0x01) initialize internal parameters and are written once during power-up. Register 0x00 requires a value of 0x0E, and 0x01 requires 0x82. For charging current, registers 0x02 and 0x03 are used; each count represents 1 mA, with the first 5 bits reserved. Current can be varied in 64 mA steps, up to 8.128 A. These registers need programming when the BQ25703A charges the battery, or during power role swaps and PDO changes.

Registers 0x06, 0x07, 0x08, and 0x09 are used to set OTG Voltage and Current, required when the BQ25703A provides power to the system, or during power role swaps and PDO changes.

Register 0x35 enables OTG mode, and a GPIO is also needed to configure the BQ25703A as a power source or sink. Remaining registers should be left at default settings.

To configure the I2C master for BQ25703A:

1. Program registers 0x00 and 0x01 with 0x0E and 0x82, respectively. This is done by filling Record Index 1 with 0x820E00, which writes 0x0E to register 0x00 and 0x82 to register 0x01.

Figure 6: Record Index 1 for BQ25703A

This screenshot shows the configuration for Record Index 1. The "Trigger Event" is "Power On Reset", "Data Length" is 3, "Slave Address Index" is 0, "Priority" is 0, and the "Data" field is populated with 0x820e00, corresponding to the initial configuration values for BQ25703A registers 0x00 and 0x01.

2. Set the OTG Voltage and OTG Current registers. For a 5V/3A PD source, set OTG Voltage to 5V and OTG Current to 3A. The OTG Current register can be programmed for up to 5A. Write 0x80, 0x02, 0x00, and 0x40 to registers 0x06, 0x07, 0x08, and 0x09, respectively. These values set the OTG Voltage to 5.12V and OTG Current to 3.2A.

Figure 7: Record Index 2 for BQ25703A

This screenshot shows the configuration for Record Index 2. The "Trigger Event" is "Power On Reset", "Data Length" is 5, "Slave Address Index" is 0, "Priority" is 0, and the "Data" field is populated with 0x4000028006, corresponding to OTG voltage and current settings.

3. Enable OTG Mode by writing 0x10 to register 0x35.

Figure 8: Record Index 3 for BQ25703A

This screenshot shows the configuration for Record Index 3. The "Trigger Event" is "Power On Reset", "Data Length" is 2, "Slave Address Index" is 0, "Priority" is 0, and the "Data" field is populated with 0x1035, enabling OTG mode.

4. For Hard Reset or Cable Detach events, reset the BQ25703A output to 5V by writing 0x80 and 0x02 to registers 0x06 and 0x07, respectively.

Figure 9: Configuration for Hard Reset and Detach events

This figure shows configurations for "Detach" and "Hard Reset" trigger events. For "Detach", Record Index 4 has data 0x28006. For "Hard Reset", Record Index 5 has data 0x28006. These configurations are related to managing the output voltage during specific events.

Registers 0x06 and 0x07 are updated with relevant values when a Source PDO is negotiated. Values are slightly higher to compensate for drops. Examples for 5V, 9V, 15V, and 20V PDOs are provided:

Similarly, fill remaining Record Indexes for other Source PDOs.

Registers 0x02 and 0x03 are updated with relevant charging current when a Sink PDO is negotiated. This value reflects the battery charging current, factoring in the ratio of battery voltage to Sink PDO voltage. For simplicity, battery voltage can be assumed as 12V. Values for 5V, 9V, 15V, and 20V PDOs are:

Figure 10: Record Index for 5 V Sink PDO

This screenshot shows the configuration for Record Index 10. The "Trigger Event" is "Sink PDO 1 Negotiated", "Data Length" is 3, "Slave Address Index" is 0, "Priority" is 0, and the "Data" field is populated with 0x40002, corresponding to the 5V Sink PDO configuration.

Fill the remaining Record Indexes for other Sink PDOs. Then, navigate to "App Configuration Binary Data Indices" and populate it as shown in the image.

Figure 11: App Configuration Binary Data Indices for BQ25703A

This screenshot shows the "App Config Binary Data Indices" section, detailing the "Port 1 I2C Record Start Index" as 1 and "Port 1 I2C Record Number of Indices" as 13, indicating the range of records used for BQ25703A configuration.

Finally, create the firmware binary file for system programming.

5 Configuring I2C Master for TUSB546 Alternate Mode Linear Redriver Crosspoint Switch

The TUSB546 is a VESA USB Type-C alternate Mode redriving switch supporting USB 3.1 and DisplayPort 1.4 for hosts. This device has 8 registers of 8 bits each, with only 1 register requiring updates. The table below details values to be programmed to register address 0x0A in different scenarios:

Configure a project as discussed in Section 3. Program the Record Indices in the App Configuration Data Table window as follows:

1. During Power On Reset, Detach, and Hard Reset events, the multiplexer should be disabled. Data for corresponding Record Indices should be 0x000A.

Figure 13: Power Up Data for TUSB546

This screenshot shows the configuration for Record Index 1. The "Trigger Event" is "Power On Reset", "Data Length" is 2, "Slave Address Index" is 0, "Priority" is 0, and the "Data" field is populated with 0x000a, disabling the multiplexer.

2. For Cable Attach CC_1 PD and DisplayPort Exoted CC_1 PD events, Record Indices data should be 0x010A.

Figure 14: Configuration Data for TUSB546

This screenshot shows the configuration for Record Index 4. The "Trigger Event" is "Cable Attach CC_1 PD", "Data Length" is 2, "Slave Address Index" is 0, "Priority" is 0, and the "Data" field is populated with 0x010a.

3. For Cable Attach CC_2 PD and DisplayPort Exoted CC_2 PD events, Record Indices data should be 0x050A.
4. For DisplayPort Pin Configuration A, C, or E CC_1 PD event, the data sent to the mux should be 0x020A.
5. For DisplayPort Pin Configuration A, C, or E CC_2 PD event, the data sent to the mux should be 0x060A.
6. For DisplayPort Pin Configuration B, D, or F CC_1 PD event, the data sent to the mux should be 0x030A.
7. For DisplayPort Pin Configuration B, D, or F CC_2 PD event, the data sent to the mux should be 0x070A.

Fill the App Configuration Binary Data Indices as shown in the image.

Figure 15: App Config Binary Data Indices for TUSB546

This screenshot shows the "App Config Binary Data Indices" section for TUSB546. It indicates "Port 1 I2C Record Start Index" as 1 and "Port 1 I2C Record Number of Indices" as 11, defining the range of records used for TUSB546 configuration.

Now, create the firmware binary file for system programming.

6 Summary

This Application Note explains how to configure the I2C Master for a given I2C slave and provides examples for two of the most commonly used I2C slaves in a PD ecosystem. Users should be able to configure the I2C master for any arbitrary I2C slave by referring to this application note.

7 References

• Texas Instruments, TUSB546-DCI USB Type-C™ DP ALT Mode Linear Redriver Crosspoint Switch data sheet
• Texas Instruments, bq25703A I2C Multi-Chemistry Battery Buck-Boost Charge Controller With System Power Monitor and Processor Hot Monitor data sheet

Appendix A

A.1 Events available in App Config Record Indices