Texas Instruments TIDA-01627 USB Type-C™ PD Power Bank Reference Design

Description

This power bank reference design offers highly-integrated USB Type-C™ power delivery (PD) for charging notebooks. The key aspect of this design is to reduce the bill of materials (BOM) cost while maintaining the overall functionality. The design implements unique considerations for reducing quiescent current and covers all the required aspects to guide users through the part selection and trade-off considerations.

Resources

  • TIDA-01627: Design Folder
  • TPS65987D: Product Folder
  • BQ25703A: Product Folder
  • TPD8S300: Product Folder
  • TPS563200: Product Folder

Features

  • Supports 5 V at 3 A, 9V at 3 A, 14.8 V at 2 A, 15 V at 3 A, and 20 V at 2.25 A for Power Data Objects (PDOs)
  • Supports up to 45 W of Power to Charge Portable Devices
  • Automatically Charges After Connecting to USB PD Source

Applications

  • Charging Notebooks
  • Charging Cell Phones
  • Charging or Powering Other USB Type-C or PD Devices

Contact TI E2E™ Community Experts for assistance.

System Description

For many, carrying multiple devices is a normal if not necessary part of daily life. The average user's dependency on these gadgets continues to increase while the overall battery life is decreasing. Many users have no choice but to carry an alternate portable source of power to help recharge gadgets while on the move. This reference design offers a power bank solution that can provide 45 W of power to charge a notebook while away from traditional power sources.

Key System Specifications

PARAMETER SPECIFICATIONS
Number of batteries Three cells
Type of batteries Lithium-ion cells
Minimum output voltage 5 V
Maximum output voltage 20 V
Maximum power 45 W

System Overview

This reference design has been built around two key components: TPS65987D and BQ25703A. The TPS65987D is the PD controller which controls all of the USB Type-C™ and PD negotiations, in addition to controlling the BQ25703A battery charger over I²C. This battery charger chip manages all the power and battery charging. The chip also works as a reverse buck-boost to provide power in on-the-go (OTG) mode. TPD8S300 provides protection from electrostatic discharge (ESD) and VBUS to CC short, and the TPS563200 generates 3.3 V from the battery to power the PD controller.

Block Diagram

The block diagram illustrates the system architecture. It shows the battery voltage (Vbat, nominal 12.6V from 3 cells) connected to VBUS and HV_GATE. The USB Type-C connector interfaces via CC1 and CC2 pins. The BQ25703A (Battery Charger) is connected to VBUS, HV_GATE, and the Type-C CC pins, and communicates with the TPS65987D (USB/PD Controller) via I2C (SDA, SCL). The TPS65987D also interfaces with SPI Flash via SPI and controls the BQ25703A. The TPS563200 (Buck) converts battery power to 3.3V for the PD controller. The TPD8S300 (Type-C ESD) protects the Type-C connector's CC and SBU pins.

Design Considerations

This TIDA-01627 system demonstrates how to manufacture reliable power banks using USB-Type-C and PD ports. To achieve this objective, the reference design uses the most-integrated USB-PD controller and battery controller in the market. The unique combination of these two devices ensures the most reliable and cost-effective solution to charge a notebook on the go.

This reference design has been tested with three lithium-ion cells; however, it can support one to four cells by simply changing the values of R12 and R14. For more details on this custom setting, refer to the bq25703A I2C Multi-Chemistry Battery Buck-Boost Charge Controller With System Power Monitor and Processor Hot Monitor datasheet. Note that the batteries must be sized properly to support the PD load, which the power bank must also support.

TPS65987D USB Type-C™ and PD Controller With Firmware Upgrade Capability

The TPS65987D is a highly-integrated USB Type-C and PD controller. This device is the brain of this system and is responsible for negotiating contracts with connected devices, controlling various settings of the BQ25703A device. This device was chosen as it provides I²C master functionality, which can be configured to control any I²C slave by just using its configuration utility.

Figure 2 shows the TPS65987D signals schematic. Figure 3 shows the TPS65987D power lines schematic.

Figure 2. TPS65987D Signals Schematic: This schematic shows the TPS65987D IC (U5A) with its various pins, including CC1, CC2, SCL, SDA, SPI interfaces (MISO, MOSI, CLK, CSZ), control signals like PROCHOT, CHRG_OK, SRC_EVT, SNK_EVENT, EN_OTG, HRESET, and GPIOs. These pins are connected to external resistors, capacitors, and other ICs, facilitating communication and control.

Figure 3. TPS65987D Power Lines Schematic: This schematic illustrates the power supply connections for the TPS65987D (U5B). It shows power inputs such as VBUS_C, VBUS1, VBUS2, PP_HV, PP_HV1, PP_HV2, VIN_3V3, and the output PD_LDO_3V3. These connections are made via decoupling capacitors (C105, C34, C52, C47, C50) to ground (GND). DRAIN1 and DRAIN2 pins are also depicted.

BQ25703A Multi-Chemistry, Battery Buck-Boost Charge Controller With System Power Monitor

The BQ25703A is a buck-boost, narrow-voltage DC (NVDC) charge controller for multi-chemistry portable applications such as notebooks and other mobile devices with rechargeable batteries. This device provides seamless transition between converter operation modes (buck, boost, or buck-boost), fast transient response, and high light-load efficiency. The BQ25703A takes input voltage from 3.5 V to 24 V and charges one to four batteries in series. The BQ25703A also supports USB On-The-Go (OTG) to provide a 4.48-V to 20.8-V output at the USB port.

This device is perfect for this reference design because it can work as a battery controller as well as a DC-DC converter. When the power bank is a sink and charging its own battery, this chip assists with charging the batteries, whereas during the power source mode, this chip works as a DC-DC converter to generate the VBUS.

Figure 4. Battery Controller Schematic: This detailed schematic shows the BQ25703A battery charger circuit. It includes power inputs like VBUS_SYS, ACN, ACP, SRP, SRN, VSYS, and battery connections (BATT). Control and interface pins such as COMP1, COMP2, PROCHOT, CELL_BATPRES, SCL, SDA, CHRG_OK, EN_OTG, PSYS, CMPOUT, PGND, and PAD are shown. The circuit utilizes external MOSFETs (Q1-Q4, Q5), an inductor (L1), and numerous resistors and capacitors for operation. The '3 CELL Configuration' indicates a typical battery setup.

TPD8S300 USB Type-C™ Port Protector

The TPD8S300 is a single-chip, USB Type-C, port protection solution that provides 20-V short-to-VBUS overvoltage and IEC ESD protection. The TPD8S300 integrates four channels of 20-V short-to-VBUS overvoltage protection for the CC1, CC2, SBU1, and SBU2 pins of the USB Type-C connector. Additionally, IEC 61000-4-2 system level ESD protection is required to protect a USB Type-C port from ESD strikes generated by end-product users. The TPD8S300 integrates eight channels of IEC61000-4-2 ESD protection for the CC1, CC2, SBU1, SBU2, DP_T (top side D+), DM_T (top side D−), DP_B (bottom side D+), and DM_B (bottom side D–) pins of the USB Type-C connector. This integration means IEC ESD protection is provided for all of the low-speed pins on the USB Type-C connector in a single chip in the TPD8S300 device. Additionally, the CC and SBU lines require high-voltage IEC ESD protection that is 22-V DC tolerant to simultaneously support IEC ESD and short-to-VBUS protection; unfortunately, not many discrete market solutions are available that can provide this kind of protection. The TPD8S300 integrates this high-voltage IEC ESD diode and has been specifically designed to guarantee that it works in conjunction with the overvoltage protection field-effect transistors (FETs) inside the device. This sort of solution is very hard to generate with discrete components.

Figure 5. TPD8S300 Schematic: This schematic shows the TPD8S300 IC (U4) for USB Type-C port protection. Key connections include PD_LDO_3V3 (power input), VBIAS, VPWR, FLT, RPD_G1, RPD_G2. It interfaces with Type-C connector pins: CC1, CC2, C_CC1, C_CC2, SBU1, SBU2, C_SBU1, C_SBU2, DN_C, DP_C, DN_A, DP_A. Connections to capacitors (C44, C45) and ground are also shown.

TPS563200 DC-DC Converter

The TPS563200 is an easy-to-use, synchronous step-down, DC-DC converter optimized for low standby current with minimum external components. A high switching frequency of typically 650 KHz allows the use of small inductors and provides fast transient response as well as high output voltage accuracy by using the D-CAP2™ mode control. In this reference design, this DC-DC converter functions to generate the 3.3-V rail to power up the TPS65987D device. If nothing is connected to the power bank, then the enable input goes low and everything shuts down. If any PD power sink is connected to the power bank, then this input remains high for as long as the device is connected.

Figure 6. Schematic of 3.3-V Power Scheme of Power Bank: This schematic illustrates the TPS563200 DC-DC converter circuit. It shows inputs like SYS, VIN, EN, and outputs SW, VBST, VFB. The circuit uses an inductor (L3) and capacitors (C36, C37, C38, C39) for voltage conversion, with resistors R23 and R25 for feedback. The EN pin is controlled by the SYS_EN node.

System Powering Scheme

This power bank reference design features two different power modes: power source mode and power sink mode.

Power Source Mode

In this mode, the power bank works as a source and the device connected to it draws power. To start in this mode, the user must press the S1 switch and then ensure that the device is connected after the LED turn on. The user can release this switch after connecting the device, after which it will no longer respond to further presses. If the device comes up as a sink, then the TPS65987D device drives the “SRC_EVT” node high, which ensures that U3 remains turned on even after S1 is released by maintaining 3.3 V at the SYS_EN node. The TPS65987D device drives the SRC_EVT node low when it detects disconnection, which forces the SYS_EN node down after some time, after which U3 eventually turns off and leads to a system shutdown.

Power Sink Mode

Whenever the designer connects a PD source, this power bank begins charging in dead battery mode. The LED turns on automatically to indicate the charging status. Pressing the user switch S1 causes a power role swap and, if accepted by the connected device, causes the power bank to enter power source mode.

Test Data

The following subsections show the PD logs, which were taken during various use cases.

Power Bank When Charging Notebook

The power bank registers as a power source when the user presses the switch with the power bank connected to a notebook. The power bank sends its source power data object (PDO) and the notebook requests for the suitable PDO from the available options. From the given case in Figure 8, the power bank presents various PDOs, for which the notebook chooses a 20-V PDO.

Figure 7. Signals During Negotiations: This figure visually represents the USB PD negotiation process. It depicts phases such as Battery charger startup, VBUS voltage changes, I2C communication (SCL, SDA), CC Line status, Initial PD Negotiations, and the request for a Higher Voltage PDO.

Figure 8. PD Log When Using Power Bank as Source: This table details the Power Delivery (PD) communication log when the power bank acts as a source. It records packet sequences, CC events, messages exchanged (SOP, SRC PD Msg, SNK PD Msg), and negotiated Power Data Objects (PDOs) with their voltage and current ratings.

PacketCC EventCC1 PinsAd CurrPD Msg TypeMsg IDObj CntExtendedVendor DefinedMax CurVoltageDual RoleTime StampDurationIdle
3Attached.SRCCC13.00 ASRC PD Msg05No3.00 A5.00 V6.638951000493.637 us
4Attached.SRCCC13.00 ASRC PD Msg05No3.00 A9.00 V6.849062736633.528 us
5Attached.SRCCC13.00 ASRC PD Msg05No2.00 A14.80 V6.856752736625.779 us
6Attached.SRCCC13.00 ASRC PD Msg05No3.00 A9.00 V6.857453072499.448 us
7Attached.SRCCC13.00 ASRC PD Msg05No2.00 A14.80 V6.858996016499.597 us
8Attached.SRCCC13.00 ASRC PD Msg05No3.00 A15.00 V6.859612096493.935 us
9Attached.SRCCC13.00 ASRC PD Msg05No2.25 A15.00 V6.899148096499.597 us
10Attached.SRCCC13.00 ASRC PD Msg05No2.25 A20.00 V7.220 ms493.637 us
11Attached.SRCCC13.00 ASRC PD Msg05No3.00 A15.00 V7.221 ms499.597 us
12Attached.SRCCC13.00 ASRC PD Msg05No2.25 A20.00 V7.678 ms493.935 us
13Attached.SRCCC13.00 ASRC PD Msg05No2.25 A20.00 V7.220 ms493.637 us
14Attached.SRCCC13.00 ASRC PD Msg05No3.00 A15.00 V6.840571016633.717 us
15Attached.SRCCC13.00 ASRC PD Msg05No2.25 A20.00 V6.840571016633.717 us
16Attached.SRCCC13.00 ASRC PD Msg05No2.25 A20.00 V6.840571016633.717 us
17Attached.SRCCC13.00 ASRC PD Msg05No2.25 A20.00 V6.840571016633.717 us
18Attached.SRCCC13.00 ASRC PD Msg05No2.25 A20.00 V6.840571016633.717 us
19Attached.SRCCC13.00 ASRC PD Msg05No2.25 A20.00 V6.840571016633.717 us
20Attached.SRCCC13.00 ASRC PD Msg05No2.25 A20.00 V6.840571016633.717 us
21Attached.SRCCC13.00 ASRC PD Msg05No2.25 A20.00 V6.840571016633.717 us

Power Swap Upon Switch Press

If the user connects the power bank to a notebook without pressing the switch, then the power bank registers as a sink and starts drawing power from the laptop. In this condition, the user can press the switch and perform a power role reversal to start charging the notebook. The following logs in Figure 9 show the power role sequence after pressing the switch.

Figure 9. PD Log During Power Role Swap: This table logs the sequence of events during a power role swap. It details CC events, connected pins, current, PD message types, message IDs, object counts, timestamps, durations, and idle times, illustrating the transition from sink to source mode.

PacketCC EventCC1 PinsAd CurrPD Msg TypeMsg IDObj CntDurationIdleTime Stamp
0Attached.SNKCC11.50 ASNK PD Msg04499.597 us2.841359136
1Attached.SNKCC11.50 ASNK PD Msg04493.637 us2.841964552
2Attached.SNKCC11.50 ASNK PD Msg04493.637 us2.842600616
3Attached.SNKCC11.50 ASNK PD Msg04499.597 us2.843169552
4Attached.SNKCC11.50 ASNK PD Msg04499.597 us2.843169552
5Attached.SNKCC11.50 ASNK PD Msg04499.597 us2.843169552
6Attached.SNKCC11.50 ASNK PD Msg04499.597 us2.843169552
7Attached.SNKCC11.50 ASNK PD Msg04499.597 us2.843169552
8Attached.SNKCC11.50 ASNK PD Msg04499.597 us2.843169552
9Attached.SNKCC11.50 ASNK PD Msg04499.597 us2.843169552
10Attached.SNKCC11.50 ASNK PD Msg04499.597 us2.843169552
11Attached.SNKCC11.50 ASNK PD Msg04499.597 us2.843169552
12Attached.SNKCC11.50 ASNK PD Msg04499.597 us2.843169552
13Attached.SNKCC11.50 ASNK PD Msg04499.597 us2.843169552
14Attached.SNKCC11.50 ASNK PD Msg04499.597 us2.843169552
15Attached.SNKCC11.50 ASNK PD Msg04499.597 us2.843169552
16Attached.SNKCC11.50 ASNK PD Msg04499.597 us2.843169552
17Attached.SNKCC11.50 ASNK PD Msg04499.597 us2.843169552
18Attached.SNKCC11.50 ASNK PD Msg04499.597 us2.843169552
19Attached.SNKCC11.50 ASNK PD Msg04499.597 us2.843169552
20Attached.SNKCC11.50 ASNK PD Msg04499.597 us2.843169552
21Attached.SNKCC11.50 ASNK PD Msg04499.597 us2.843169552

Power Bank Charging From PD Power Adapter

The power bank registers as a PD sink and makes a PD contract when it is connected to a PD power adapter. The power bank picks up the right PDO from the available options and starts charging (see Figure 10).

Figure 10. PD Log During Power Bank Charging: This table logs the Power Delivery (PD) communication when the power bank functions as a PD sink, connecting to a power adapter. It details the sequence of messages, CC events, and the selected Power Data Objects (PDOs) for charging.

PacketCC EventCC1 PinsAd CurrPD Msg TypeMsg IDObj CntExtendedMax Opr CurVoltageTime StampDurationIdle
0DisabledOpen0.0000000003.430 sec
1Unattached.SNKCC13.4302480001.600 ms
2AttachWait.SNKCC13.00 A3.431848000106.094 ms
3Attached.SNKCC13.00 ASNK PD Msg06No1.50A5.00 V3.558485000106.094 ms
4Attached.SNKCC13.00 ASNK PD Msg06No1.50A9.00 V4.115970376498.703 us
5Attached.SNKCC13.00 ASNK PD Msg06No1.50A10.00 V4.118848016503.769 us
6Attached.SNKCC13.00 ASNK PD Msg06No1.50A12.00 V4.121529032503.769 us
7Attached.SNKCC13.00 ASNK PD Msg06No1.50A15.00 V4.122106312498.852 us
8Attached.SNKCC13.00 ASNK PD Msg06No1.50A20.00 V4.150960517633.339 us
9Attached.SNKCC13.00 ASNK PD Msg06No1.50A20.00 V4.283216616503.173 us
10Attached.SNKCC13.00 ASNK PD Msg06No1.50A20.00 V4.283793312503.173 us
11Attached.SNKCC13.00 ASNK PD Msg06No1.50A20.00 V4.283793312503.173 us

Design Files

To download the schematics, bill of materials (BOM), layout prints, Gerber files, and assembly drawings, see the design files at TIDA-01627.

Related Documentation

  1. Texas Instruments, bq25703A I2C Multi-Chemistry Battery Buck-Boost Charge Controller With System Power Monitor and Processor Hot Monitor Data Sheet

Trademarks

E2E, USB Type-C, D-CAP2 are trademarks of Texas Instruments. USB Type-C is a trademark of USB Implementers Forum, Inc. All other trademarks are the property of their respective owners.

Terminology

  • BOM: Bill of materials
  • ESD: Electrostatic discharge
  • FET: Field-effect transistor
  • LED: Light-emitting diode
  • NVDC: Narrow voltage DC
  • OTG: On-the-go
  • PD: Power delivery
  • PDO: Power data object

Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Original (April 2018) to A Revision

  • Changed TPS65983B to TPS65987D throughout document.
  • Changed TPD6S300 to TPD8S300 throughout document.
  • Changed TPS62170 to TPS563200 throughout document.
  • Changed block diagram and board images.
  • Changed information in Section 2.2.1.
  • Changed Figure 2.
  • Changed Figure 3.
  • Changed Figure 5.
  • Changed information in Section 2.2.4.

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