LTC4221 Dual Hot Swap Controller/Power Sequencer with Dual Speed, Dual Level Fault Protection
DEMO CIRCUIT 1355 - QUICK START GUIDE
DESCRIPTION
Demonstration circuit DC1355 is a dual hot swap circuit featuring the LTC4221 Dual Hot Swap Controller / Power Sequencer with Dual Speed, Dual Level Fault Protection.
DC1355 facilitates evaluation of the LTC4221 performance characteristics including supply ramp-up transients, steady state operation, and overcurrent fault conditions. On board LEDs indicate input supply presence, output state, and power good conditions.
The first LTC4221 channel controls a rail from 2.7V to 13.5V and the second one from 1V to 13.5V with condition that VCC2 ≤ VCC1.
DC1355 is assembled to operate with a +12V rail with 6A maximum current and a +3.3V rail with 3.0A maximum current.
Design files for this circuit board are available. Call the LTC factory.
Linear Technology Corporation, its subsidiaries and affiliates disclaim any and all liability for the use of this product, and make no warranty, express or implied, regarding the suitability of the product for any particular purpose or the accuracy of the information provided in this document.
PERFORMANCE SUMMARY
Specifications are at TA = 25 °C
| SYMBOL | PARAMETER | CONDITIONS | MIN | TYP | MAX | UNITS |
|---|---|---|---|---|---|---|
| VCC1 | Supply Voltage Channel 1 | 2.7 | 13.5 | V | ||
| VCC2 | Supply Voltage Channel 2 | VCC2 ≤ VCC1 | 1.0 | 13.5 | V | |
| VCC1(UVL) | Undervoltage Lockout for Channel 1 | VCC1 Rising | 2.1 | 2.5 | 2.675 | V |
| VCC2(UVL) | Undervoltage Lockout for Channel 2 | VCC2 Rising | 0.65 | 0.8 | 0.975 | V |
| VSENSE(FC) | SENSEn Threshold Voltage | Channeln Fast Comparator Threshold | 85 | 100 | 115 | mV |
| VSENSE(SC) | SENSEn Threshold Voltage | Channeln Slow Comparator Threshold | 20.5 | 25 | 29.5 | mV |
| VSENSE(ACL) | SENSEn Voltage at Active Current Limit | VFBn=0V | 4 | 9 | 16 | mV |
| VFBn=0.65V | 20.5 | 25 | 29.5 | mV | ||
| IGATE(UP) | GATEn Output Current | VON1= 2V, VGATEn=0V | -7 | -9.5 | -120 | uA |
| IGATE(DN) | GATEn Output Current | VON1= 0.6V, VGATEn=3.3V | 75 | 100 | 125 | uA |
| IGATE(FSTDN) | GATEn Output Current | UNLO with VGATEn=3.3V or FAULT latched with VGATEn=3.3V | 16 | mA | ||
| ΔVGATE | External N-Channel Gate Drive | VGATEn-VCC1 for VCC1=2.7V, VCC2=1V | 4.5 | 13 | V | |
| VGATEn-VCC1 for VCC1=3.3V, VCC2=2.5V | 5 | 16 | V | |||
| VGATEn-VCC1 for VCC1=5.0V, VCC2=3.3V | 8 | 16 | V | |||
| VGATEn-VCC1 for VCC1=12V, VCC2=12V | 7 | 18 | V | |||
| VON(OFF) | ONn Off Threshold | High to Low, GATEn Turns Off by 100uA Pulldown | 0.796 | 0.821 | 0.846 | V |
| ΔVON(OFFHYST) | ONn Off Threshold Hysteresis | 30 | mV | |||
| VON(RESET) | ON1 Reset Threshold | VON1 Falling | 0.375 | 0.4 | 0.425 | V |
| Δ | ON1 Reset Threshold Hysteresis | 25 | mV | |||
| VON(RESETHYST) | ||||||
| VFB(UV) | FBn Undervoltage Threshold | FBn Falling | 0.605 | 0.617 | 0.629 | V |
| VFB(OV) | FBn Overvoltage Threshold | FBn Rising | 0.805 | 0.822 | 0.838 | V |
| IFILTER (UP) | FILTER Pull-Up Current | During Current Fault Condition | -80 | -105 | -132 | μA |
| IFILTER (DN) | FILTER Pull-Down Current | During Normal Cycle | 1.15 | 1.8 | 2.45 | μA |
| VFILTER(TH) | FILTER Threshold | Latched Off Threshold, FILTER Rising | 1.18 | 1.24 | 1.30 | V |
| ΔVFILTER(HYST) | FILTER Threshold Hysteresis | 105 | mV | |||
| ITMR(UP1) | TIMER Pull-Up Current 1 | Initial Timing Cycle | -1.2 | 1.9 | -2.6 | μA |
| ITMR(UP2) | TIMER Pull-Up Current 2 | Start-Up cycle | -15 | -20 | -25 | μA |
| ITMR(FSTDN) | TIMER Pull-Down Current | VTMR =1.5V, End of Initial Timing Cycle | 9 | mA | ||
| VTMR(H) | TIMER High Threshold | TMER Rising | 1.172 | 1.234 | 1.27 | V |
| VTMR(L) | TIMER Low Threshold | TIMER Falling | 0.1 | 0.4 | 0.5 | V |
OPERATING PRINCIPLES
The LTC4221 controls two rails with external N-channel MOSFETS.
Two independent ONn comparators allow ramping rails up and down separately or simultaneously.
Each channel has two current limit comparators that provide dual level and dual speed overcurrent circuit breaker protection after the start-up period.
If any current sense voltage exceeds 100mV for 1us or 25mV for the timeout delay, then the FAULT latch is set and both GATE pins are pulled low.
The LTC4221 is suited for low voltage applications such as a hot board insertion and removal and has a rich set of features to support hot swap application including:
- Overvoltage protection
- FAULT latch setting and resetting and fault state indication
- Adjustable Inrush Current Control
- Adjustable duration for Current Limit before switch is turned off
- Power-good signaling
QUICK START PROCEDURE
Demonstration circuit 1355 is easy to set up to evaluate the performance of the LTC4221. Refer to Figure 1. for proper measurement equipment setup and follow the procedure below:
- Place jumpers in the initial position: JP1 (ON2) Off, JP2 (ON1) Off.
- Adjust +12V supply output voltage between 10.6V and 13.0V. Connect +12V power supply to the +12V INPUT and GND turrets and turn it on. Green LED +12V INPUT (D2) should light.
- Adjust +3.3V supply output voltage between 2.89V and 3.67V. Connect +3.3V power supply to the +3.3V INPUT and GND turrets and turn it on. Green LED +3.3V INPUT (D6) should light.
- Place jumpers JP1 and JP2 in the ON positions. Two amber LEDs, PWRGD1 and PWRGD2, should light.
- Connect electronic or resistive loads to the +12V and +3.3V output turrets.
- Activate both loads with lower than 1A for each rail. Increase load current, use a current probe or meter and verify circuit breaker threshold level. For the +12V circuit it should be between 5A and 7.5A, for the +3.3V circuit, between 2.5A and 3.8A. After an overcurrent fault associated power good LED D3 or D4 will be off. To reset FAULT latch turn +12V supply off and then on.
- Remove the loads. Turn both +12V and +3.3V rails off by placing JP1 and JP2 in the OFF position. Load the +12V output with a 1500uF capacitor and return jumper headers of the JP1 and JP2 to the ON position. Turn the +3.3V rail on first and then the +12V rail. Both rails should be on.
- Repeat step 7 with a 6000uF capacitor. In this case only the +3.3V rail comes up, but +12V fails.
- Place the JP3 (AUTO RETRY) in the YES position. Use a current probe to display the +12V rail current and scope probes to display +12V and +3.3V output voltages. Activate both channels and overload +12V rail. The transient should be similar to that shown in Figure 2.
- Place JP4 (FAULT SIGNAL) in the YES position and control FAULT pin signal on the FAULT turret. Activate both channels with no load. Slowly increase the +12V supply output (not higher than 16V). Overvoltage protection should disable both channels when the output voltage is in a range from 13.6V to 15.0V and FAULT turret signal drops to low.
- Activate both channels with no load. Slowly decrease +12V supply output. The PWRGD1 LED goes off when output is in the range of 10.4V to 11.3V.
- Place JP4 (FAULT SIGNAL) in the YES position and control FAULT pin signal on the FAULT turret. Activate both channels with no load. Slowly increase +3.3V supply output (not higher than 16V). Overvoltage protection should disable both channels, when the output voltage is in the range of 3.7V to 3.9V and FAULT turret signal drops to low.
- Activate both channels with no load. Slowly decrease +3.3V supply output. The PWRGD2 LED goes off when output is in a range from 2.76V to 3.0V.
Circuit Diagram
Figure 1 shows the schematic of the DC1355 demonstration circuit. It includes connections for +12V and +3.3V power supplies, electronic loads, jumpers for configuration (JP1, JP2, JP3, JP4), and LEDs for status indication (D2, D6 for power input, D3, D4 for power good, D5 for 3.3V output).
Oscilloscope Waveform Example
Figure 2 illustrates an example oscilloscope capture demonstrating a short overcurrent condition on the +12V channel with auto-retry enabled. The waveform shows the +12V rail output, the +3.3V rail output, the PWRGD signal, and the +12V rail current.
