The Infineon EZ-USB™ FX5N is a cutting-edge USB 3.2 Gen 1x2 device controller designed to meet the demands of emerging USB 10 Gbps applications. It is ideally suited for high-speed data acquisition markets, including video, audio, and other specialized data processing needs.
This advanced controller integrates powerful processing capabilities, featuring both Arm® Cortex®-M4 and Cortex®-M0+ microcontrollers. It is equipped with substantial onboard memory, including 512 KB of flash memory, 128 KB of SRAM, and 128 KB of ROM, alongside a dedicated CRYPTO engine for enhanced security features.
A key highlight is its high-bandwidth data subsystem, capable of delivering DMA data transfers at speeds up to 10 Gbps. This subsystem, along with support for USB Type-C plug orientation detection and flip-MUX functionality, ensures robust and flexible connectivity.
This comprehensive reference manual is intended for engineers and developers working with the EZ-USB™ FX5N USB 3.2 Gen 1x2 device controller. It provides in-depth technical details necessary for integrating and utilizing the device's advanced features in various embedded systems and applications.
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Infineon PSoC™ 6 Wi-Fi Bluetooth® Pioneer Kit Guide Explore the Infineon PSoC™ 6 Wi-Fi Bluetooth® Pioneer Kit (CY8CKIT-062-WIFI-BT) with this comprehensive guide. Learn about its features, hardware, operation, and development capabilities for IoT and embedded systems. |
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Infineon CYT2B6 TRAVEO™ T2G 32-bit Automotive MCU Datasheet Datasheet for the Infineon CYT2B6 TRAVEO™ T2G microcontroller. Features dual Arm® Cortex®-M4 and Cortex®-M0+ cores, extensive peripherals for automotive applications, and advanced security features. |
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Infineon PSoC™ 64 “Secure Boot” MCU CYB06445 Architecture Reference Manual Detailed reference manual for the Infineon PSoC™ 64 “Secure Boot” MCU (CYB06445), covering its architecture, CPU subsystems, memory, peripherals, and secure boot features for IoT applications. |
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PSoC 6 MCU CY8C6xx5 Architecture Technical Reference Manual (TRM) - Infineon Comprehensive technical reference manual detailing the architecture, dual-core CPU subsystem, memory, peripherals, and system resources of the Infineon PSoC 6 MCU CY8C6xx5 family (PSoC 61, PSoC 62). |
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PSoC™ 63 MCU with Bluetooth® LE: CY8C63x6, CY8C63x7 Architecture Reference Manual | Infineon Detailed reference manual for the Infineon PSoC™ 63 MCU (CY8C63x6, CY8C63x7) with Bluetooth® LE 5.0, covering dual-core CPUs, memory, peripherals, low-power modes, and security for IoT applications. |
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Traveo II Program and Debug Interface Training A customer training workshop detailing the Traveo II microcontroller's program and debug interface, covering target products, system architecture, multi-core debug capabilities, tracing features, and programmer/IDE compatibility. |
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Getting Started with Traveo II Family MCUs This application note provides an overview of the feature set and describes the development environment and tools to get started with the CYT2, CYT3, and CYT4 series of MCUs from the Traveo II family. It covers the Arm Cortex-M based MCUs, their features, and how to set up the development environment. |
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CY8CKIT-062-WiFi-BT PSoC 6 Wi-Fi Bluetooth Pioneer Kit Guide Explore the CY8CKIT-062-WiFi-BT PSoC 6 Wi-Fi Bluetooth Pioneer Kit. This guide details its features, including the PSoC 6 MCU, Wi-Fi/Bluetooth connectivity, Arduino shield compatibility, and development tools, for IoT and embedded applications. |