This document serves as the Technical Reference Manual (TRM) for the Infineon PSoC 6 MCU CY8C6xx5 family, encompassing the PSoC 61 and PSoC 62 MCU series.
The PSoC 6 MCU platform is engineered for Internet of Things (IoT) applications, delivering a robust combination of high performance, ultra-low power consumption, and advanced security features. The CY8C6xx5 product family is built around a dual-core architecture, integrating high-performance flash technology, sophisticated analog-to-digital conversion capabilities, and a versatile array of programmable peripherals.
Key Features:
- Dual-core architecture featuring Arm Cortex-M4F (up to 150 MHz) and Arm Cortex-M0+ (up to 100 MHz) processors.
- Exceptional low-power operation with multiple configurable power modes and on-chip DC-DC buck converter.
- Integrated security features, including hardware accelerators for cryptography and secure boot capabilities.
- A comprehensive suite of peripherals, including I/O, communication interfaces (UART, SPI, I2C, CAN FD, USB), timers, counters, PWMs, ADCs, comparators, and touch-sensing controllers.
- Support for external memory interfaces (Quad-SPI) and advanced debugging capabilities.
This manual provides in-depth technical details on the device's architecture, subsystems, and operational features, intended for developers and engineers designing embedded systems.
For further information, please refer to the official resources from Infineon Technologies and Cypress Semiconductor.
