Analog Devices AD4000/AD4004/AD4008

16-Bit, 2 MSPS/1 MSPS/500 kSPS, Precision, Pseudo Differential, SAR ADCs

Features

Easy Drive: Reduced input kickback, low input current (0.4 μA/MSPS), enhanced acquisition phase (≥79% of cycle time at 1 MSPS), accurate first conversion, no latency/pipeline delay, input span compression for single-supply operation, fast conversion for low SPI clock rates, overvoltage clamp protection (sinks up to 50 mA), SPI-/QSPI-/MICROWIRE-/DSP-compatible serial interface.
High Performance: Pseudo differential input range (0 V to VREF, VREF from 2.4 V to 5.1 V), throughput options (2 MSPS/1 MSPS/500 kSPS), INL: ±1.0 LSB max, guaranteed 16-bit (no missing codes), SNR: 93 dB (fIN=1 kHz, VREF=5 V), THD: -115 dB (fIN=1 kHz) / -95 dB (fIN=100 kHz), SINAD: 82 dB (fIN=1 MHz), oversampled dynamic range (96 dB for OSR=2, 123 dB for OSR=1024).
Low Power: Single 1.8 V supply operation with 1.71 V to 5.5 V logic interface. Power consumption scales with throughput (e.g., 70 μW at 10 kSPS, 14 mW typical at 2 MSPS).
Packaging: Available in 10-lead MSOP (3 mm x 4.90 mm) and 10-lead LFCSP (3 mm x 3 mm) packages.
Compatibility: Pin compatible with AD4003/AD4007/AD4011 family.
Operation: Guaranteed operation from -40°C to +125°C.

Applications

Automated test equipment
Machine automation
Medical equipment
Battery-powered equipment
Precision data acquisition systems
Instrumentation and control systems

General Description

The AD4000/AD4004/AD4008 are 16-bit, high-speed, low-power, precision SAR ADCs designed for single-supply operation. They feature 'Easy Drive' technology, reducing signal chain complexity and power consumption. Key features include reduced input current, an extended acquisition phase, input span compression for increased headroom, and an internal overvoltage clamp. The ADCs offer high throughput rates (up to 2 MSPS) and maintain excellent AC performance across a wide input frequency range. The SPI-compatible serial interface supports various logic levels (1.8 V to 5 V).

Functional Block Diagram

The block diagram illustrates the core components: Analog Inputs (IN+, IN-), Reference Input (REF), Power Supplies (VDD, VIO), Ground (GND), a 16-bit SAR ADC core, and a Serial Interface (SDI, SCK, SDO, CNV). It highlights features like High-Z Mode and Span Compression, showing the signal path from analog input to digital output.

Specifications

The datasheet provides comprehensive specifications covering analog input characteristics, throughput rates, conversion times, acquisition phases, DC accuracy (INL, DNL, Zero Error, Gain Error), AC accuracy (SNR, SINAD, THD, SFDR), reference voltage requirements, digital interface levels, power supply current, and temperature range. Key performance metrics include up to 93 dB SNR, -115 dB THD, and 16-bit resolution with no missing codes. Power consumption is optimized, scaling linearly with throughput.

Typical Performance Characteristics

Numerous plots detail typical performance across various conditions:

Nonlinearity (INL/DNL): Shown versus ADC code, illustrating variations with temperature and operating modes (High-Z, Span Compression).
Spectral Performance: Histograms and FFT plots demonstrate code distribution and spectral content (SNR, THD, SINAD) under different input frequencies and reference voltages.
Parameter Dependencies: Graphs show how SNR, SINAD, ENOB, THD, and SFDR vary with input frequency, reference voltage, temperature, and timing parameters.
Input Current and Power: Plots detail analog input current versus input voltage, operating current versus temperature, standby current, and power dissipation versus throughput.

Pin Configurations and Function Descriptions

Pinout diagrams are provided for the 10-lead MSOP and LFCSP packages. Each pin is described, including its function (e.g., REF for Reference Input Voltage, VDD for 1.8 V Power Supply, IN+ and IN- for Analog Inputs, CNV for Convert Input, SCK for Serial Clock, SDI for Serial Data Input, SDO for Serial Data Output) and type (Analog Input, Power, Digital Input/Output).

Theory of Operation

The AD4000/AD4004/AD4008 utilize a successive approximation register (SAR) architecture with charge redistribution. The operation involves an acquisition phase to sample the analog input, followed by a conversion phase where the internal DAC and comparator determine the digital output. Features like High-Z mode, span compression, and turbo mode are explained in relation to their impact on performance and ease of use.

Converter Operation

The ADC performs analog-to-digital conversion using a charge redistribution DAC. The process includes an acquisition phase and a conversion phase managed by internal clocks. The transfer function illustrates the linear relationship between analog input voltage and digital output code, with tables providing specific output codes for given input voltages and span compression settings.

Applications Information

Typical application diagrams show recommended circuit configurations for both multiple-supply and single-supply systems, including guidance on amplifier and RC filter selection for optimal performance based on input signal bandwidth. The importance of driver amplifier characteristics (noise, settling time) and high-frequency input signal performance is discussed.

Digital Interface

The digital interface supports SPI, QSPI™, and MICROWIRE® protocols. Various serial interface modes are detailed, including CS Mode (3-wire/4-wire, with/without busy indicator, turbo mode) and Daisy-Chain Mode. Timing diagrams illustrate signal sequences for each mode. The configuration register allows control over features like status bits, span compression, high-Z mode, and turbo mode via 16-bit SPI instructions.

Layout Guidelines

PCB layout recommendations focus on separating analog and digital sections, using ground planes for shielding, avoiding noise coupling from digital lines, and proper decoupling of power and reference pins. Examples of recommended top and bottom layer layouts are provided.

Evaluating Performance

Analog Devices provides evaluation boards and software tools (e.g., EVAL-AD4000FMCZ, UG-1042) to facilitate performance analysis and testing of the AD4000/AD4004/AD4008.

Outline Dimensions

Mechanical dimensions for the 10-lead MSOP (RM-10) and 10-lead LFCSP (CP-10-9) packages are provided in millimeters, compliant with JEDEC standards.

Ordering Guide

A table lists available part numbers with their integral nonlinearity (INL), temperature range, package type, ordering quantity, package option, and marking code, including RoHS-compliant options and reel packaging.

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