LXS0204/LXS0204L: Ultra-Low Voltage, Auto-Direction Sensing, 4-Bit Level Shifter
Description
The LXS0204/LXS0204L is a 4-bit, configurable, dual-supply, bi-directional, auto-sensing translator that does not require a directional control pin. The A and B ports are designed to track two different power supply rails, VCCA and VCCB respectively. The VCCA supply rail is configurable from 0.72V to 1.98V. The VCCB supply rail is configurable from 1.65V to 5.5V. This allows voltage logic signals on the VCCA side to be translated into higher or equal value voltage logic signals on the VCCB side.
The translator has integrated 10kΩ pullup resistors on the Port A lines and Port B lines for up to 150 pF loading. The integrated pullup resistors are used to pull up the I/O lines to either VCCA or VCCB.
Port A and OE are referenced to VCCA and port B is referenced to VCCB. A LOW level at pin OE causes all I/Os to be a high-impedance OFF-state. Power-off protection is implemented to prevent the current from passing through the device when it is powered down.
The LXS0204/LXS0204L is an excellent match for open-drain applications such as the I2C communication bus. For push-pull applications, the LXS0204L disables the internal pullup resistors during logic-low and re-enables the internal pullup resistors during logic-high, thereby reducing static power consumption.
Features
- 0.72V to 1.98V on A Port, and 1.65V to 5.5V on B Port
- VCCA must be less than or equal to VCCB
- High Speed with 24Mb/s Data Rate for Push-Pull Applications
- High Speed with 2Mb/s Data Rate for Open-Drain Applications
- Supports I2C High-Speed Mode (3.4MHz) with up to 150pF (VCCA ≥ 1.08V)
- No Direction-Control Signal Needed
- Low Bit-to-Bit Skew
- Non-Preferential Power-Up Sequencing
- ESD Protection: HBM JEDEC JS-001-2023 Class 3A Exceeds 4000V, CDM JEDEC JS-002-2022 Class C3 Exceeds 1000V
- Latch-Up JESD78 200mA
- Integrated 10kΩ Pullup Resistors
- Packaging (Pb-Free & Green): 12-Pin, 1.385mm x 1.035mm, 0.35mm pitch, U-WLB1014-12 (Type JC)
- Totally Lead-Free & Fully RoHS Compliant
- Halogen and Antimony Free. "Green" Device
For automotive applications requiring specific change control (i.e. parts qualified to AEC-Q100/101/104/200, PPAP capable, and manufactured in IATF 16949 certified facilities), please contact Diodes Incorporated or your local Diodes representative.
Applications
- I2C, SMBus, MDIO
- Low-voltage ASIC level translation
- Mobile phones, PDAs, cameras
Pin Assignments
Transparent Top View
VCCB A1 VCCA A2 B2 B3 OE A3 B4 GND A41 | 2 | 3 | |
A | B1 | ||
B | |||
C | |||
D |
U-WLB1014-12 (Type JC)
Pin Descriptions
VCCA Power A-port supply voltage. 0.72V ≤ VCCA ≤ 1.98V. VCCB Power B-port supply voltage. 1.65V ≤ VCCB ≤ 5.5V. A1 I/O Input/output A. Referenced to VCCA. A2 I/O Input/output A. Referenced to VCCA. A3 I/O Input/output A. Referenced to VCCA. A4 I/O Input/output A. Referenced to VCCA. B1 I/O Input/output B. Referenced to VCCB. B2 I/O Input/output B. Referenced to VCCB. B3 I/O Input/output B. Referenced to VCCB. B4 I/O Input/output B. Referenced to VCCB. OE Input Output Enable (Active High). Pull OE Low to place all outputs in 3-state mode. GND GND Ground.Pin Number (Type JC) | Pin Name | Type | Description |
A2 | |||
B2 | |||
A3 | |||
B3 | |||
C3 | |||
D3 | |||
A1 | |||
B1 | |||
C1 | |||
D1 | |||
C2 | |||
D2 |
Functional Block Diagram
A block diagram shows the internal architecture of the LXS0204/LXS0204L. It illustrates four channels, each with an OE input controlling the output state. The diagram shows inputs A1, A2, A3, A4 and outputs B1, B2, B3, B4. The OE signal is connected to all channels.
Absolute Maximum Ratings
mASymbol | Parameter | Rating | Unit |
TSTG | Storage Temperature | -65 to +150 | °C |
VCCA | DC Supply Voltage Port A | -0.5 to +2.5 | V |
VCCB | DC Supply Voltage Port B | -0.5 to +6.5 | V |
VEN | Enable Control DC Input Voltage | -0.3 to +6.5 | V |
VIOA | Port A DC Input Voltage | -0.5 to +2.5 | V |
VIOB | Port B DC Input Voltage | -0.5 to +6.5 | V |
IO | Continuous Output Current | 40 |
Note: Stresses greater than those listed under Absolute Maximum Ratings can cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to Absolute Maximum Ratings for extended periods can affect device reliability.
Recommended Operating Conditions
Symbol | Parameter | Min | Typ | Max | Unit |
VCCA | VCCA Positive DC Supply Voltage | 0.72 | - | 1.98 | V |
VCCB | VCCB Positive DC Supply Voltage | 1.65 | - | 5.5 | V |
VEN | Enable Control Pin Voltage | GND | - | 5.5 | V |
VIOA | Port A I/O Pin Voltage | GND | - | VCCA | V |
VIOB | Port B I/O Pin Voltage | GND | - | VCCB | V |
At/Av | Input Transition Rise or Fall Time (A or B port Push-Pull Driving, VCCA = 0.72V to 1.98V, VCCB = 1.65V to 5.5V) | - | 10 | - | ns/V |
At/Av | Input Transition Rise or Fall Time (OE, VCCA = 0.72V to 1.98V, VCCB = 1.65V to 5.5V) | - | 10 | - | ns/V |
TA | Operating Temperature Range | -40 | - | +85 | °C |
DC Electrical Characteristics
This section details the DC electrical characteristics of the LXS0204/LXS0204L, including input/output voltages, supply currents, and leakage currents under various conditions.
Symbol | Parameter | Test Conditions | VCCA | VCCB | Min | Typ | Max | Unit |
VIHB | B Port Input HIGH Voltage | 0.72V to 1.98V | 1.65V to 5.5V | - | VCCB*0.7 | - | V | |
VILB | B Port Input LOW Voltage | 0.72V to 1.98V | 1.65V to 5.5V | - | - | 0.15 | V | |
VIHA | A Port Input HIGH Voltage | 0.72V to 1.98V | 1.65V to 5.5V | - | VCCA*0.7 | - | V | |
VILA | A Port Input LOW Voltage | 0.72V to 1.98V | 1.65V to 5.5V | - | - | 0.13 | V | |
VIHOE | Control Pin Input HIGH Voltage | 0.91V to 1.98V | 1.65V to 5.5V | - | VCCA*0.65 | - | V | |
VILOE | Control Pin Input LOW Voltage | 0.72V to 0.9V | 1.65V to 5.5V | - | VCCA*0.7 | - | V | |
VOHB | B Port Output HIGH Voltage | B port source current = -10μΑ | 0.72V to 1.98V | 1.65V to 5.5V | - | VCCB*0.8 | - | V |
VOLB | B Port Output LOW Voltage | B port sink current = 1mA | 0.72V to 1.98V | 1.65V to 5.5V | - | - | 0.3 | V |
VOHA | A Port Output HIGH Voltage | A port source current = -10μΑ | 0.72V to 1.98V | 1.65V to 5.5V | - | VCCA*0.8 | - | V |
VOLA | A Port Output LOW Voltage | A port sink current = 1mA | 0.72V to 1.98V | 1.65V to 5.5V | - | - | 0.3 | V |
IQVCB | VCCB Supply Current | VIA = VOA = VCCA, VIB = VOB = 1.98V, floating | 0.72V to 1.98V | 1.65V to 5.5V | 0 | -1 | - | μΑ |
IQVCA | VCCA Supply Current | VIA = VOA = VCCA, VIB = VOB = floating | 0.72V to 1.98V | 1.65V to 5.5V | - | 10 | - | μΑ |
ILA | Port A Input Mode LOW Current (LXS0204L) | OE = VCCA, VIAX = 0, VOBX = floating | 0.72V to 1.98V | 1.65V to 5.5V | - | 4.7 | - | μΑ |
ILB | Port B Input Mode LOW Current (LXS0204L) | OE = VCCA, VIBX = 0, VOAX = floating | 0.72V to 1.98V | 1.65V to 5.5V | - | ±1 | - | μΑ |
IOZ | I/O Tri-State Output Mode Leakage Current | Port A | 0V to 1.98V | 0 to 5.5V | - | - | ±2.8 | μΑ |
IOFF | Power-Off Leakage Current | Port A | 0 | - | - | ±2 | μΑ | |
RPU | Pullup Resistors I/O | Port A | 0.72V to 1.98V | 1.65V to 5.5V | 10 | - | - | kΩ |
RPU | Pullup Resistors I/O | Port B | 0.72V to 1.98V | 1.65V to 5.5V | 10 | - | - | kΩ |
Note: All units are production tested at TA = +25°C. Limits over the operating temperature range are guaranteed by design.
AC Electrical Characteristics
This section provides detailed AC electrical characteristics for the LXS0204/LXS0204L, including propagation delays, rise/fall times, and maximum data rates under various supply voltage and load conditions.
Symbol | Parameter | Test Conditions | VCCA = 1.8V | VCCA = 3.3V | VCCA = 5.0V | Unit | |||
VCCB = 3.3V | VCCB = 5.0V | VCCB = 5.0V | |||||||
Min | Max | Min | Max | Min | Max | ||||
tPHL-A-B | Propagation Delay | Push-pull driving | 5.1 | - | 5.7 | - | 6.8 | - | ns |
Open-drain driving (LXS0204) | 4.5 | - | 4.7 | - | 6.9 | - | ns | ||
Open-drain driving (LXS0204L) | - | 4.5 | - | 7.9 | - | 11.9 | ns | ||
Push-pull driving | 7.4 | - | 4.1 | - | 3.7 | - | ns | ||
tPLH-A-B | Propagation Delay | Open-drain driving (LXS0204) | 38.7 | - | 24.4 | - | 19.1 | - | ns |
Open-drain driving (LXS0204L) | 27.1 | - | 23.0 | - | 21.2 | - | ns | ||
Push-pull driving | 4.0 | - | 4.5 | - | 5.8 | - | ns | ||
Open-drain driving (LXS0204) | 3.6 | - | 4.1 | - | 4.5 | - | ns | ||
tPHL-B-A | Propagation Delay | Open-drain driving (LXS0204L) | 3.7 | - | 4.6 | - | 5.0 | - | ns |
Push-pull driving | 6.7 | - | 0.4 | - | 0.3 | - | ns | ||
tPLH-B-A | Propagation Delay | Open-drain driving (LXS0204) | 0.3 | - | 0.2 | - | 0.1 | - | ns |
Open-drain driving (LXS0204L) | 0.3 | - | 0.1 | - | 0.1 | - | ns | ||
ten | Enable Time | - | 200 | - | 200 | - | 200 | ns | |
tdis | Disable Time | - | 230 | - | 230 | - | 230 | ns | |
tRB | B Port Rise Time | Push-pull driving | 1.08 | 9.1 | 0.46 | 7.6 | - | - | ns |
Open-drain driving (LXS0204) | 0.56 | 106 | 0.44 | 58 | - | - | ns | ||
tFB | B Port Fall Time | Open-drain driving (LXS0204L) | 0.56 | 106 | 0.44 | 58 | - | - | ns |
Push-pull driving | 2.1 | 16.2 | 2.8 | 16.2 | - | - | ns | ||
TRA | A Port Rise Time | Open-drain driving (LXS0204) | 2.1 | 16.2 | 2.7 | 16.2 | - | - | ns |
Open-drain driving (LXS0204L) | 3.5 | 132 | 3.3 | 95 | - | - | ns | ||
tFA | A Port Fall Time | Push-pull driving | 1.9 | 6 | 1.7 | 13.3 | - | - | ns |
Open-drain driving (LXS0204) | 2 | 6.4 | 2 | 6.1 | - | - | ns | ||
tSKEW | Channel-to-Channel Skew | Push-pull driving | 1 | - | 1 | - | 1 | - | ns |
fDATA | Maximum Data Rate | Push-pull driving | 24 | - | 24 | - | 24 | - | Mbps |
Open-drain driving | 2 | - | 2 | - | 2 | - | Mbps |
Test Circuits
The document includes diagrams for various test circuits used to evaluate the performance of the LXS0204/LXS0204L, including rail-to-rail driving and open-drain driving configurations for both Port A and Port B.
Figure 2. Rail-to-Rail Driving A
Figure 3. Rail-to-Rail Driving B
Figure 4. Open-Drain Driving A
Figure 5. Open-Drain Driving B
Figure 6. Test Circuit for Enable/Disable Time Measurement
Figure 7. Timing Definitions for Propagation Delays and Enable/Disable Measurement
Definition of Vx and Vy
Supply Voltage | Output | |
Vcco | Vx | Vy |
0.72V | VOL + 0.1V | VOH - 0.1V |
0.95V | VOL + 0.1V | VOH - 0.1V |
1.2V +/- 0.12V | VOL + 0.1V | VOH - 0.1V |
1.8V +/- 0.15V | VOL + 0.15V | VOH - 0.15V |
2.5V +/- 0.2V | VOL + 0.15V | VOH - 0.15V |
3.3V +/- 0.3V | VOL + 0.3V | VOH - 0.3V |
5V +/- 0.5V | VOL + 0.3V | VOH - 0.3V |
Functional Description
Level Translator Architecture
The LXS0204/LXS0204L is a 4-bit configurable, dual-supply, bi-directional, auto-sensing translator that does not require a directional control pin. The A-port operating voltage range is from 0.72V to 1.98V, and the B-port operating voltage range is from 1.65V to 5.5V.
The translator has integrated a 10kΩ pullup resistor on port A and port B. The integrated pullup resistors are used to pull the I/O lines to either VCCA or VCCB. When OE goes low, the pullup resistors are disabled. There is an nMOS transistor that connects the A port and B port. When either A port or B port is pulled low externally, the nMOS transistor will turn on and pull the other port low. When both A port and B port are not pulled low externally, the pullup resistors will pull both ports to their corresponding VCC. In addition, each output has integrated a one-shot rising-edge detector to turn on the pMOS transistor within a short duration to improve the low-to-high transition.
Figure 8. Architecture
Pullup Resistors
The translator has integrated two pullup resistors at both ports A and B of each channel to maintain the logic-high level at VCCA or VCCB if no external pulldown driver turns on. The pullup resistors are also responsible to pull up the ports initially before the internal one-shot pMOS transistors turn on.
The LXS0204L has an additional feature in which the internal pullup resistors are disabled during a logic-low level on Port A or Port B. This reduces the static power consumption during a logic-low state. The internal pullup resistors are re-enabled during a logic-high level on Port A and or Port B. Please note that using the LXS0204L in open-drain applications requires the use of external pullup resistors to initially pull the ports high. This is because the LXS0204L's internal pullup resistors are disabled during a logic-low state and are not available to pull the ports HIGH themselves. Using the LXS0204L in push-pull applications does not require the use of external pullup resistors.
Input Driver Requirements
The rise (tr) and fall (tr) timing parameters of the open-drain outputs depend on the magnitude of the pullup resistors. In addition, the propagation time (tpD) and maximum data rate depend on the impedance of the device that is connected to the translator. The timing parameters and DC output voltages listed in the data sheet assume that the output impedance of the drivers connected to the translator is less than 500Ω and no external pullup resistors are connected. Drivers with lower output impedance may be needed in order to maintain low VOL if small external pullup resistors are used.
Output Enable (OE)
The LXS0204/LXS0204L has an Output Enable pin (OE) that enables the device by setting HIGH. Driving the Output Enable pin to a low logic level minimizes the power consumption of the device and sets all I/Os in high-impedance OFF state. Normal translation operation occurs when the OE pin is equal to a logic-high signal. The OE pin is referenced to the VCCA supply and can tolerate the VCCB voltage.
Power Supply Guidelines
During normal operation, supply voltage VCCA must be less than or equal to VCCB. The sequencing of the power supplies will not damage the device during the power-up operation. For optimal performance, 0.01μF to 0.1μF decoupling capacitors should be used on the VCCA and VCCB power supply pins. Ceramic capacitors are a good design choice to filter and bypass any noise signals on the voltage lines to the ground plane of the PCB. The noise immunity will be maximized by placing the capacitors as close as possible to the supply and ground pins, along with minimizing the PCB connection traces.
Ordering Information
The ordering part number is determined by the feature and package type. The LXS0204 series offers a choice between standard internal pullup resistors (blank) and a version that disables internal pullup resistors during logic-low (L).
Feature | Package | Packing |
(Blank): Static Internal Rpu | CBA12: U-WLB1014-12 (Type JC) | 7: Tape & Reel |
L: Disable Internal Rpu During Logic-Low | CBA12: U-WLB1014-12 (Type JC) | 7: Tape & Reel |
Orderable Part Number | Feature | Package | Package Code | Qty. | Carrier |
LXS0204CBA12-7 | Static Internal Pullup Resistors | U-WLB1014-12 (Type JC) | CBA12 | 3,000 | Tape & Reel |
LXS0204LCBA12-7 | Disable Internal Pullup Resistors During Logic-Low | U-WLB1014-12 (Type JC) | CBA12 | 3,000 | Tape & Reel |
Marking Information
The marking information for the U-WLB1014-12 (Type JC) package includes an identification code (XX) for the year and week of manufacture, and an internal code.
Orderable Part Number | Package | Identification Code |
LXS0204CBA12-7 | U-WLB1014-12 (Type JC) | P2 |
LXS0204LCBA12-7 | U-WLB1014-12 (Type JC) | P5 |
Package Outline Dimensions
Detailed package outline dimensions for the U-WLB1014-12 (Type JC) package are provided in millimeters. A link to the Diodes Incorporated website for the latest version of package outlines is included.
Dim | Min | Max | Typ |
A | 0.489 | 0.565 | 0.527 |
A1 | 0.140 | 0.180 | 0.160 |
A2 | 0.313 | 0.339 | 0.326 |
B | 0.035 | 0.045 | 0.040 |
A3 | 0.191 | 0.231 | 0.211 |
D | 1.020 | 1.050 | 1.035 |
E | 1.370 | 1.400 | 1.385 |
e1 | - | - | 0.350 |
e2 | - | - | 0.350 |
e3 | - | - | 0.700 |
e4 | - | - | 1.050 |
z1 | - | - | 0.063 |
z2 | - | - | 0.063 |
All Dimensions in mm
Suggested Pad Layout
A suggested pad layout for the U-WLB1014-12 (Type JC) package is provided, with dimensions in millimeters. A link to the Diodes Incorporated website for the latest version of suggested pad layouts is included.
Dimensions | Value (in mm) |
C | 0.350 |
D | 0.211 |
X | 0.700 |
Y | 1.050 |
Y1 | 0.175 |
Mechanical Data
- Moisture Sensitivity: Level 1 per J-STD-020
- Terminals: SnAgCu Balls, Solderable per MIL-STD-202, Method 208
- Weight: 0.00295 grams (Approximate)
Important Notice
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