Analog Devices AD9959/PCB Evaluation Board

Evaluation Board Block Diagram

The evaluation board block diagram illustrates the AD9959 integrated circuit and its supporting components. A crystal oscillator (XTAL) or external reference clock (REFCLK) feeds into a buffer/oscillator and a frequency multiplier, providing the system clock (SYS CLK) to four Direct Digital Synthesis (DDS) cores (DDS 0-3). Each DDS core is connected to a Digital-to-Analog Converter (DAC) output (DAC 0-3 IOUT) which passes through a Low-Pass Filter (LPF) before reaching the output connectors (J2, J5, J3, J7, J6, J8). The AD9959 also includes timing and control logic. Various connectors are present for clock input (REFCLK, SYNC CLK, SYNC IN), clock output (SYNC OUT), and power/ground.

Features

• Full-featured evaluation board for the AD9959
• PC evaluation software for control and measurement of the AD9959
• USB interface
• Graphic user interface (GUI) software with frequency sweep capability for board control and data analysis
• Factory tested and ready to use

Applications

• AD9959 performance evaluation
• GUI control panel for learning AD9959 programming

General Description

This document serves as a guide to the setup and use of the AD9959 evaluation board. The AD9959 is a multichannel frequency synthesizer that incorporates four synchronous direct digital synthesis (DDS) cores with many user-programmable functions. The evaluation board software provides a graphical user interface for easy communication with the device, featuring a "mouse-over effect" for clarifying software elements. This document is intended for use in conjunction with the AD9959 data sheet, available from Analog Devices at www.analog.com.

Evaluation Board Hardware

Package Contents

The AD9959/PCB kit contains:

• AD9959 evaluation board
• AD9959/PCB installation software

Requirements

To successfully use the evaluation board and software, the following requirements must be met:

Setting up the Evaluation Board

Powering the Part

The AD9959 evaluation board has seven power supply connectors: TB1, J10, J16, J17, J18, J19, and J20. TB1 powers the DDS, PC interface logic, and USB circuitry. J10 powers the input clock. J18 provides the reference voltage for band gap functionality. J16, J17, J19, and J20 power the analog circuitry of individual DACs. These four AVDD connections (J16, J17, J19, J20) are typically tied together, allowing power to any one of them to enable all four DACs. Table 2 lists the necessary connections and biasing voltages.

Note: CLK_VDD, BG_VDD, and AVDD connections are typically tied together. Powering any one of these connectors is sufficient for all four channels. For better channel isolation, these AVDD connections can be separated by removing specific 0Ω resistors (R21, R32–R51, R54–R64) on the back of the board. Ensure CLK_VDD, BG_VDD, and the relevant AVDD connections are powered when separating them.

Clocking the Part

The AD9959 can be clocked using an external clocking signal connected to the REF CLK connector (J9) or by providing an external crystal. Use jumper W11 on REF CLK for the external clocking option, or on CRYSTAL for the crystal option. Refer to the AD9959 data sheet for details on input speeds and sensitivities.

Communicating with the Part

Two interface standards are available:

1. USB 1.1/2.0 interface.
2. Header row (U2, U13) for external controller communication (e.g., µP, FPGA, DSP). Analog Devices provides GUI software for PC control, but not for external controllers.

Table 3 shows jumper settings for communication modes:

Evaluation Board Layout

The evaluation board layout diagram shows various connectors and components, including:

• USB Port: For PC control.
• Manual I/O Control Headers: Interface for external controller communication.
• Multi Device Synchronous Control: For synchronizing multiple AD9959s.
• DAC Channels: Represent DAC filtered/unfiltered outputs and AVDD power supply.
• Clock Input Supply: Powers the AD9959's clock input circuitry.
• Clock Mode Select: Selects between crystal or external signal generator clocking.
• Ref Clk Input: Input for the external Ref Clk signal.
• Band Gap Supply: Provides voltage for band gap functionality.
• Power Supply: Powers USB circuitry, I/O circuitry, and digital portion (DVDD). Note AVDD is not powered via TB1.
• RU/RD Control, SDIO: Jumpers for controlling Ramp Up/Ramp Down feature.
• Eval Board Control: Jumpers for setting manual or PC control mode.

Evaluation Board Software

Installing the Software

Follow these steps to install the AD9959 evaluation software:

1. Log in with administrative privileges.
2. Uninstall any previous versions of the AD9959 evaluation software.
3. Insert the AD9959 evaluation software CD into your CD-ROM drive. Do not connect the evaluation board until the software is successfully installed. Refer to the Readme.txt file in the Software folder.
4. Run setup.exe from the Software folder and follow on-screen instructions.

Configuring the Evaluation Board

After software installation, interface the AD9959 evaluation software to the board via the USB Port. Drivers must be loaded onto your PC.

Windows 98/ME/2000 Users

1. Power up the AD9959 evaluation board.
2. Connect the board to the computer via USB. The VBUS LED (CR1) illuminates.
3. Upon USB connection, a "Found New Hardware" window (Figure 3) appears and disappears.
4. Another "Found New Hardware" window (Figure 4) appears and disappears.
5. If using Windows 2000, click Finish on the "Found New Hardware Wizard" (Figure 5).
6. The "EZSSP Device" installation window (Figure 6) appears.

After these windows disappear, the USB Status LED (CR2) flashes, indicating a proper connection.

Windows XP Users

1. Power up the AD9959 evaluation board.
2. Connect the board to the computer via USB. The VBUS LED (CR1) illuminates.
3. Upon USB connection, a "Found New Hardware Wizard" appears (Figure 7). Click Next.
4. Click "Continue Anyway" on the hardware installation warning (Figure 8).
5. Click Finish on the "Found New Hardware Wizard" for the AD9958/59 Firmware Loader (Figure 9).
6. Click Next on the "Found New Hardware Wizard" for the EZSSP Device (Figure 10).
7. Click "Continue Anyway" on the hardware installation warning for the EZSSP Device (Figure 11).
8. Click Finish to exit the wizard (Figure 12).

After the wizard closes, the USB Status LED (CR2) flashes, indicating a proper connection.

Loading the Software

Follow these steps to load the AD9959 evaluation software:

1. Ensure the AD9959 evaluation board is powered up, connected, and the USB Status LED is flashing.
2. Click the Start button.
3. Select Programs > AD9958_59 Eval Software > AD9958_59 Eval Software (Figure 13).

The software loads, and status messages appear. Successful loading is indicated by a green splash screen (Figure 14). Red text in the status box indicates an error (Figure 15). Common errors can be resolved by checking jumper settings, power, USB connections, or REF CLK input configuration. If the REF CLK input is not recognized, a pop-up window will appear (Figure 16).

Feature Control Windows

Chip Level Control

The Chip Level Control window manages features affecting all AD9959 channels:

• 1. LOAD and READ: Used to send data and retrieve register settings. LOAD flashes orange when new data is ready. I/O updates can be manual or automatic (default).
• 2. Clock: Configures the reference clock path. Ref Clock sets the input frequency (max 500 MHz). Multiplier selects the PLL multiplication factor (4x to 20x). CP Current sets the charge pump current. System Clock displays the derived operating frequency. VCO Gain is set automatically for system clocks > 255 MHz.
• 3. All Channel Accumulator Control: Controls phase and sweep accumulators. Check boxes for auto-clear or use explicit clear functions.
• 4. Modulation Configuration: Configures modulation. Profile Pin Configuration sets modulation scheme via PPC bits. RU/RD controls amplitude scaling via profile or SDIO pins. Level selects modulation level (2, 4, 8, or 16-level).
• 5. Multi Device Sync: For synchronizing multiple evaluation boards.
• 6. All Channel Power Down: Powers down channels via software or external control. Options include Quick Recovery or Full Power Down.

Channel Control

The Channel Control window manages channel-specific features:

• 1. Channel Select: Tabs (Channel 0-3) to select specific channels for configuration.
• 2. Pwr Down: Power down digital logic or DAC circuitry for a channel.
• 3. Modulation Output Type: Selects Phase, Frequency, Amplitude, or None (Single Tone) modulation. Level is set in Chip Level Control.
• 4. Linear Sweep Options: Enables linear sweep functions, including options like "Linear Sweep No Dwell" and "Load SRR @ I/O Update". Clear Sweep Accumulator functions are channel-specific.
• 5. Pipe-Line Latency Control: "Match Pipe Delays" synchronizes pipeline delays for single-tone channels.
• 6. DAC Full Scale Current Control: Scales DAC output current (Full Scale, ½, ¼, ⅛ Scale).
• 7. Output Waveform: Selects Cosine(x) or Sine(x) function.
• 8. Phase Accumulator Control: Channel-specific Clear Phase Accumulator and Auto Clear Phase Accumulator functions.

Channel Output Config

The Channel Output Config window configures output characteristics per channel:

• 1. Single Tone Setup: Configures output frequency (Frequency 00 box), phase offset, and amplitude scale factor (Enable ASF). Tuning word values can be entered in decimal, hex, or binary. The Frequency 00 box also sets the start for linear sweeps and frequency modulation. Phase Offset and Amplitude Scale Factor (ASF) have integer factors for incrementing/decrementing.
• Amplitude Ramp Rate (ARR): Sets the time for amplitude changes.
• Amplitude Step Adjust: Sets the step size for amplitude scaling.
• Load ARR @ I/O Update: Loads ARR into the timer on I/O update.
• Profile Registers: Up to 16 registers per channel for modulation (FSK, PSK, ASK) and linear sweep modes.
• Profile and RURD Pin Control: Controls modulation, linear sweep, or RU/RD operations via profile (P0-P3) and SDIO (SDIO1-SDIO3) pins. The "Auto" box enables immediate execution upon pin selection.
• Linear Sweep Setup: Configures rising/falling step size and interval for linear sweeps.

Debug

The Debug Window allows direct reading/writing of AD9959 internal registers. Select a channel and register address to interact with them. External input pins (profile/SDIO) can also be toggled.

DUT I/O Box

This dialog box controls I/O configuration. Use "I/O Reset" for a reset. "LSB First" changes data format. "Serial I/O Mode" selects operation modes (Single Bit-2 Wire, Single Bit-3 Wire, 2-Bit Serial, 4-Bit Serial).

Setup Files

Introduction

Preconfigured setup files are included for single tone, modulation, and linear sweep modes. These files serve as references for configuring the device.

To load setup files, go to File > Load Setup... or click the open folder icon. Then, navigate to the "AD9959 Configuration Files" folder and select the desired mode (Linear Sweep Mode, Modulation Mode, or Single Tone Mode).

Single Tone Mode

This section discusses example setup files for single tone operation, such as "All Channels on @ 10_20_30_40MHz_RURD enabled.stp". It shows configurations in the Chip Level Control and Channel Control windows, detailing settings like System Clock, RU/RD enablement, and modulation output type.

Modulation Mode

This section covers example setup files for modulation modes (FSK, PSK, ASK). It describes configurations for frequency, phase, or amplitude modulation, indexed by level (2, 4, 8, or 16-level). An example discusses "CH2_@3 MHz increments.stp" for 16-level frequency modulation.

Linear Sweep Mode

This section covers example setup files for linear sweep modes. It discusses configurations for frequency, phase, or amplitude sweeps. An example discusses "All Channels@10 MHz_half to full scale.stp" for amplitude sweep.

Schematic

The schematic diagrams (Pages 1-3) detail the electronic design of the AD9959/PCB evaluation board. They show the AD9959 IC, the CY7C68013 USB controller, various support components like buffers, filters, and power supply circuitry, and their interconnections. Key sections include I/O headers, USB bypass capacitors, and the main AD9959 connections to DACs, clocking, and control signals.

Ordering Information

Ordering Guide

ESD Caution

The AD9959/PCB is an ESD (electrostatic discharge) sensitive device. Electrostatic charges can cause permanent damage. Proper ESD precautions are recommended to avoid performance degradation or loss of functionality.

Notes

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© 2005 Analog Devices, Inc.