Manuals+

Versal® ACAP AI Edge Series Product Selection Guide

Industry's First Adaptive Compute Acceleration Platform (ACAP)

Versal® AI Edge Series – Resources

A visual representation of the Versal ACAP platform, featuring multiple interconnected computing modules with vibrant, colored lights (red, green, blue) emanating from them, set against a dark background. Abstract red geometric shapes are shown flowing away from the modules, suggesting data or progress.

VE2002VE2102VE2202VE2302VE1752VE2602VE2802
AI Engine-ML Tiles81224340152304
AI Engine Tiles0000000
AIE/AIE-ML Data Memory (Mb)4612177676152
AIE-ML Shared Memory (Mb)484868680304304
DSP Engines901763244641,3129841,312
System Logic Cells43,75080,080229,688328,720981,120820,3131,139,040
LUTs20,00036,608105,000150,272448,512375,000520,704
NoC Master / NoC Slave Ports2255212121
Distributed RAM (Mb)0.61.13.24.613.711.415.9
Total Block RAM (Mb)0.81.73.85.433.516.721.1
UltraRAM (Mb)6.813.230.443.6129.963.074.3
Accelerator RAM (Mb)32323232000
Total PL Memory (Mb)40.24869.485.6177.191.1111.3
DDR Memory Controllers1111333
DDR Bus Width64646464192192192
Application Processing UnitDual-core Arm® Cortex-A72, 48KB/32KB L1 Cache w/ parity & ECC; 1MB L2 Cache w/ ECC
Real-Time Processing UnitDual-core Arm Cortex-R5F, 32KB/32KB L1 Cache, and 256KB TCM w/ECC
Memory256KB On-Chip Memory w/ECC
ConnectivityEthernet (x2); UART (x2); CAN-FD (x2); USB 2.0 (x1); SPI (x2); I2C (x2)
Serial TransceiversGTY Transceivers00004400
GTYP Transceivers0088032[note 1]32[note 1]
CCIX & PCIe® w/DMA (CPM)----1 x Gen4x16, CCIX1 x Gen4x16, CCIX1 x Gen4x16, CCIX
PCI Express®--1 x Gen4x81 x Gen4x84 x Gen4x84 x Gen4x84 x Gen4x8
40G Multirate Ethernet MAC011222
Video Decoder Engines (VDEs)2222244
Platform Mgmt ControllerBoot, Security, Safety, Monitoring, and High-Speed Debug
Extended Temp-1MSE, -1LSE, -2MSE, -2MLE, -2LSE, -2LLE
Industrial Temp-1MSI, -1MLI, -1LSI, -1LLI, -2MSI, -2MLI, -2LLI, -2HSI

[note 1] 16 GTYP transceivers are dedicated to CPM5 for PCI Express use.

[note 2] In extended and industrial temperature grades, some ordering combinations can operate for a limited time with a junction temperature of 110°C. Timing parameters adhere to the same speed file at 110°C as they do below 110°C, regardless of operating voltage. Operation at 110°C Tj is limited to 3% of the device lifetime and can occur sequentially or at regular intervals as long as the total time does not exceed 3% of device lifetime.

All parameters listed are maximum values. Verify all data in this document with the device data sheets or product guides found at: www.xilinx.com.

Versal® AI Edge Series – Packages

Package NamePackage FootprintPackage Dimensions (mm)Ball Pitch (mm)VE2002VE2102VE2202VE2302VE1752VE2602VE2802
SBVA48419x190.884, 30
0, 78
0, 0		84, 30
0, 78
0, 0
SBVA62521x210.8132, 84
0, 78
0, 0		132, 84
0, 78
0, 0
SFVA78423x230.8132, 84
0, 78
0, 0		132, 84
0, 78
0, 0
NSVG136935x350.92132, 84
22, 78
0, 8		132, 84
22, 78
0, 8		132, 246
44, 78
24, 0
NSVH136935x350.92132, 246
44, 78
32, 0
VSVA1596[note 1]37.5x37.50.92192, 294
44, 78
44, 0
VFVH176040x400.92186, 300
44, 78
0, 32		186, 300
44, 78
0, 32
VSVA219745x450.92

[note 1] VE1752 in the VSVA1596 package supports peak LPDDR4 data rates in 324 I/O only. The remaining 54 I/O support limited data rates. See the associated data sheet.

All parameters listed are maximum values. Verify all data in this document with the device data sheets or product guides found at: www.xilinx.com.

Versal® AI Edge Series – Figures of Merit

VE2002VE2102VE2202VE2302VE1752VE2602VE2802
AI Engine Peak Perf – INT8x4TOPS: 11TOPS: 16TOPS: 32TOPS: 45TOPS: 101TOPS: 202TOPS: 405
AI Engine Peak Perf – INT8TOPS: 5TOPS: 8TOPS: 16TOPS: 23TOPS: 101TOPS: 101TOPS: 202
AI Engine Peak Perf – INT8x16TOPS: 3TOPS: 4TOPS: 11TOPS: 11TOPS: 51TOPS: 51TOPS: 101
AI Engine Peak Perf – INT16TOPS: 1TOPS: 2TOPS: 6TOPS: 6TOPS: 25TOPS: 25TOPS: 51
AI Engine Peak Perf – CINT16Complex TOPs: 0.2Complex TOPs: 0.2Complex TOPs: 0.5Complex TOPs: 0.7Complex TOPs: 6.3Complex TOPs: 3.2Complex TOPs: 6.3
AI Engine Peak Perf - FP32TFLOPS: 0.4TFLOPS: 0.7TFLOPS: 1.3TFLOPS: 1.9TFLOPS: 6.3TFLOPS: 8.3TFLOPS: 16.6
AI Engine Peak SRAM BandwidthTb/s: 11Tb/s: 16Tb/s: 32Tb/s: 45Tb/s: 405Tb/s: 202Tb/s: 405
DSP Engine Peak Perf – INT8TOPS: 0.6TOPS: 1.2TOPS: 2.2TOPS: 3.2TOPS: 9.1TOPS: 6.8TOPS: 9.1
DSP Engine Peak Perf – INT24TOPS: 0.2TOPS: 0.4TOPS: 0.7TOPS: 1.1TOPS: 3.0TOPS: 2.3TOPS: 3.0
DSP Engine Peak Perf – CINT18Complex TOPs: 0.1Complex TOPs: 0.2Complex TOPs: 0.3Complex TOPs: 0.5Complex TOPs: 1.3Complex TOPs: 1.0Complex TOPs: 1.3
DSP Engine Peak Perf – FP32TFLOPS: 0.1TFLOPS: 0.3TFLOPS: 0.5TFLOPS: 0.7TFLOPS: 2.1TFLOPS: 1.6TFLOPS: 2.1
Adaptable Engine Peak Perf - INT1TOPS: 21TOPS: 38TOPS: 110TOPS: 157TOPS: 469TOPS: 392TOPS: 544
Adaptable Engine Peak Perf - INT2TOPS: 10TOPS: 18TOPS: 50TOPS: 72TOPS: 215TOPS: 180TOPS: 250
Adaptable Engine Peak Perf - INT4TOPS: 2TOPS: 5TOPS: 13TOPS: 19TOPS: 56TOPS: 47TOPS: 65
Adaptable Engine Peak Perf - INT8TOPS: 1TOPS: 1TOPS: 3TOPS: 5TOPS: 14TOPS: 12TOPS: 17
NoC Cross-sectional BandwidthTb/s: 0.6Tb/s: 0.6Tb/s: 0.6Tb/s: 0.6Tb/s: 1.7Tb/s: 1.7Tb/s: 1.7
Arm® Cortex-A72 PerformanceDMIPS: 18,942DMIPS: 18,942DMIPS: 18,942DMIPS: 18,942DMIPS: 18,942DMIPS: 19,516DMIPS: 19,516
Arm Cortex-R5F PerformanceDMIPS: 2,672DMIPS: 2,672DMIPS: 2,672DMIPS: 2,672DMIPS: 2,672DMIPS: 2,672DMIPS: 2,672
Total Bandwidth - Block RAMTb/s: 3Tb/s: 7Tb/s: 16Tb/s: 22Tb/s: 137Tb/s: 69Tb/s: 86
Total Bandwidth - Ultra RAMTb/s: 3Tb/s: 5Tb/s: 11Tb/s: 16Tb/s: 49Tb/s: 24Tb/s: 28
Total Bandwidth - Accelerator RAMTb/s: 0.4Tb/s: 0.4Tb/s: 0.4Tb/s: 0.4Tb/s: 0Tb/s: 0Tb/s: 0
Total SRAM BandwidthTb/s: 6Tb/s: 12Tb/s: 27Tb/s: 39Tb/s: 186Tb/s: 92Tb/s: 114
DDR4 Memory BandwidthGB/s: 25.6GB/s: 25.6GB/s: 25.6GB/s: 25.6GB/s: 76.8GB/s: 76.8GB/s: 76.8
LPDDR4 Memory BandwidthGB/s: 34.1GB/s: 34.1GB/s: 34.1GB/s: 34.1GB/s: 102.4GB/s: 102.4GB/s: 102.4
Transceiver BandwidthTb/s: 0Tb/s: 0Tb/s: 0.51Tb/s: 0.51Tb/s: 2.48Tb/s: 2.10Tb/s: 2.10
Sensor I/O BandwidthGb/s: 269Gb/s: 269Gb/s: 269Gb/s: 269Gb/s: 941Gb/s: 960Gb/s: 960

All parameters listed are maximum values. Verify all data in this document with the device data sheets or product guides found at: www.xilinx.com.

Versal® ACAP Migration Table

Package NameFootprintVE2002VE2102VE2202VE2302VE1752VE2602VE2802VC1352VC1502VC1702VC1802VC1902VC2602VC2802VM1102VM1302VM1402VM1502VM1802VM2202VM2302VM2502VM2902VP1102VP1202VP1402VP1502VP1552VP1702VP1802
SBVA484A484●
SBVA625A625●
SFVA784A784●
NBVA1024A1024●
NBVB1024B1024●
NFVB1369B1369●
NSVE1369E1369●
NSVF1369F1369●
NSVG1369G1369●●
NSVH1369H1369●●
VSVA1596[note 1]A1596●●
VIVA1596[note 1]A1596●
VFVC1596C1596●
VFVC1760C1760●
VSVD1760D1760●
VFVF1760F1760●
VFVH1760H1760●●
VSVA2197A2197●
VSVC2197C2197●
VSVA2785A2785●
VSVA3112A3112●
VSVA3340A3340●
LSVC4072C4072●

[note 1] VSVA1596 package dimensions are 37.5x37.5mm, VIVA1596 package dimensions are 40x40mm with 1.25mm overhang

All parameters listed are maximum values. Verify all data in this document with the device data sheets or product guides found at: www.xilinx.com.

Versal® ACAP Ordering Information

The Versal® ACAP device name follows a specific structure, allowing for detailed configuration specification:

Device Name Example: XC V C 1902 -1 M S E V S V D1760

Xilinx

Architecture

Versal

Series Name

Device Number

Digits 1-3: Value Identifier (e.g., 1902)

Digit 4: Number of Primary Cores (e.g., 1)

Speed Grade

Voltage

Static Screen

Temp Grade

Ball Pitch

Lid

RoHS6 Code

Footprint

D1760

[note 1] Operation at 110°C Tj is limited to 3% of the device lifetime and can occur sequentially or at regular intervals as long as the total time does not exceed 3% of device lifetime--except -1E and -3E (standard 0-100°C).

[note 2] All packages have Pb-free bumps.

All parameters listed are maximum values. Verify all data in this document with the device data sheets or product guides found at: www.xilinx.com.

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