S32M27xEVB-L064 Evaluation Board Hardware User Manual
Introduction
This document serves as the Hardware User Manual for the S32M27xEVB-L064 evaluation board, which is designed for NXP's S32M27x family of LIN MCUs. It details the board's features, configuration options, power supply management, motor control capabilities, programming and debugging interfaces, communication protocols (CAN and LIN), user-accessible peripherals, and essential legal information.
Table of Contents
Definitions, Acronyms, and Abbreviations
The following list defines the abbreviations used in this document:
Abbreviation | Definition |
---|---|
BST | Boost |
CCM | Counter with CBC MAC (Cipher block chaining message authentication code) |
CMOS | Complementary Metal Oxide Semiconductor. |
CP | Charge Pump |
CPU | Central Processing Unit. |
CSPI | Configurable Serial Peripheral Interface. |
DDR | Double Data Rate. |
DIP | Dual In-line Package. |
DPGA | Differential Programmable Gain Amplifier |
EEPROM | Electrically Erasable Programmable Read Only Memory. |
EPROM | Erasable Programmable Read Only Memory. |
FET | Field-Effect Transistor |
GCTL | Gate Control |
GDU | Gate Driver Unit |
GPIO | General Purpose Input/output. |
GPO | General Purpose Output. |
HG | High-side Gate |
HS | High-side Source |
HW | Hardware. |
HVI | High Voltage Input |
HVM | High Voltage Module |
I2C | Inter-Integrated Circuit. |
I/O | Input/output. |
JTAG | Joint Test Access Group. |
LED | Light Emitting Diode. |
LG | Low-side Gate |
LPM | Low-Power Mode |
LS | Low-side Source |
MB | Megabyte. |
MCU | Microcontroller Unit. |
MOSFET | Metal-Oxide-Semiconductor Field-Effect Transistor |
MS | Memory Stick. |
NVRAM | Non-volatile Random-Access Memory. |
PCB | Printed Circuit Board. |
PHY | Physical interface. |
PMC | Power Management Controller |
POR | Power-on Reset. |
PSRAM | Pseudo Random Access Memory. |
PWR | Power. |
PWM | Pulse Width Modulation. |
RAM | Random Access Memory. |
SDRAM | Synchronous Dynamic Random-Access Memory. |
TFT | Thin Film Transistor. |
UART | Universal Asynchronous Receiver/Transmitter. |
USB | Universal Serial Bus. |
Block Diagram
The block diagram illustrates the architecture of the S32M27xEVB-L064 evaluation board. At its core is the S32M276 MCU (HLQFP64 package), which interfaces with various power management circuits, communication transceivers, and motor control components.
Power Management: The board accepts VBAT and VSUP inputs. VSUP is regulated and fed into a BOOST circuit, which then supplies VPRE. VDD_HV_A is another input. The MCU itself generates internal supply voltages like VDD_AE10, VDD_HV_A, VREFH, VDDC, V25, and V11 from these inputs. The VPRE voltage can be generated internally or via an external FET controlled by the GCTL_MCU pin.
Motor Control: The MCU's Gate Driver Unit (GDU) controls six external MOSFETs arranged in a three-phase bridge configuration for driving BLDC or PMSM motors. High-side (HG) and low-side (LG) drivers are utilized for each phase. The system includes a charge pump and bootstrap circuit for efficient gate driving. The outputs for PHASE A, PHASE B, and PHASE C are provided.
Communication Interfaces: The board supports standard communication protocols:
- JTAG/SWD: A JTAG CONNECTOR is provided for programming and debugging.
- UART: LPUARTx_TX and LPUARTx_RX lines are available for serial communication.
- LIN: A dedicated LIN CONNECTOR is present.
- CAN: A CAN CONNECTOR is available, utilizing an NXP TJA1462 transceiver for communication.
Peripherals: The board includes RGB LED, User LEDs, User Push Buttons, an ADC Rotary Potentiometer, and an Encoder Sensor Hall interface. It also features Reverse Battery Protection and a Differential Programmable Gain Amplifier (DPGA).
Features
The S32M27xEVB-L064 evaluation board is a development platform for NXP's S32M27x LIN MCUs. Key features include:
- S32M276 L64 LQFP Microcontroller.
- Support for three-phase motor control (BLDC/PMSM) via 6 external MOSFETs.
- Integrated Gate Driver Unit (GDU) with charge pump and bootstrap circuitry.
- CAN interface utilizing an NXP TJA1462 transceiver.
- LIN interface.
- JTAG/SWD interface for programming and debugging.
- User-accessible peripherals: 2 User LEDs, 2 Push Buttons, 1 ADC Rotary Potentiometer.
- Power connectors for +24.0V and +12.0V input.
- On-board debugger (OpenSDA).
- Status and Power LEDs.
Important Notes:
- Verify and download the latest version of this document from www.nxp.com.
- Read the user manual thoroughly before applying power or using the board. Incorrect configuration can cause irreparable damage.
- Ensure power is removed from the EVB before removing/placing components or re-configuring jumpers.
The physical layout of the board includes connectors for power input (+24.0V, +12.0V), motor phase outputs (PHASE A, B, C), CAN PHY, LIN PHY, and JTAG/SWD. Key components like the MCU, MOSFETs, LEDs, push buttons, and potentiometer are visible and labeled.
Default Configuration and Jumpers
Default Configuration
The following table details the default configuration of the S32M27xEVB-L064 evaluation board:
Interface | Reference / Signal | Default Configuration | Description/Comment |
---|---|---|---|
S32M276 MCU | U13 | N/A | S32M276L_64LQFP |
OnBoard Debugger | U9 | PTC2 | PTC2/LPUART0_RX is routed to NTS0102GD terminal B1 for serial interface to MK26FN2M0VMI18 |
PTC3 | PTC3/LPUART0_TX is routed to NTS0102GD terminal B2 for serial interface to MK26FN2M0VMI18 | ||
LIN Interface | Internal LIN | LIN | LIN out is routed to J53 and J54 terminal 2 |
CAN Interface | U11 | CAN0_RX_MCU | PTE15/LPUART3_RX is routed to TJA1462 RX |
CAN0_TX_MCU | PTE16/LPUART3_TX is routed to TJA1462 TX | ||
CAN0_STB_MCU | PTB5 is routed to TJA1462 STB | ||
CANH | CANH is routed to J50 terminal 2 | ||
CANL | CANL is routed to J50 terminal 2 | ||
User Push Buttons | SW2 | PTA15 | Active Low, |
SW3 | PTD0 | Active Low, | |
User LEDs | D20 | PTE15 | User Led 1 |
D21 | PTE16 | User Led 2 | |
ADC Potentiometers | ADCPOT | PTE6 | ADCPOTO is routed to PTE6 – USER_ADC |
Default Jumpers
The evaluation board is equipped with several jumpers to configure its operation. The default positions and their functions are described below:
Interface | Reference | Position | Description / Comments |
---|---|---|---|
Power Supply | J2 | 1-2 | VBAT is routed to VSUP. (Option A: Protection diode and supply for peripherals/MCU. Option B: Routes VBAT to a power boost converter circuit.) |
J61 | 1-2 | VSUP is routed to VSUP_PERH. This header supplies peripherals like RESET LED, LINPHY, and USER LEDs. | |
J1 | 1-2 | VSUP_MCU is routed to VSUP input of MCU. This header supplies the VSUP input from the MCU. | |
Peripherals | J7 | 1-2 | Power LEDs to ground connection. |
J23 | 1-2 | VDD_MCU is connected to VDD_MCU_PERH to supply SW peripherals (LEDs, buttons, user_adc) and CAN interface. | |
LINPHY | J51 | 1-2 | VSUP_PERH connected to give robustness to the LIN interface signal. |
The physical layout of the board shows various jumper locations (e.g., J2, J61, J1, J23, J51, J50, J53, J54, J55, J56, J57, J58, J59, J60, J62, J63) marked on the PCB silkscreen, along with labels for specific functions like RESET, USER LEDs, ADCPOT, LIN MASTER/OUT, CAN Interface, and MOTOR OUT.
Power Supplies Options
Main Power Supply
The evaluation board requires an external power supply of +12V / ≥2A, connectable via connector J4 (2.1mm Barrel Connector) or J5 (2-Way Screw Type Connector). This allows for easy integration into vehicle environments. The 12V input powers the VSUP rail, from which the MCU generates internal voltages like VDD_AE10 and VDD_HV_A. The VPRE voltage is also derived from VSUP.
The VSUP pin of the S32M2 MCU is supplied from VBAT (+12V) after initial filtering. VPRE can be generated internally or externally via a power FET controlled by the GCTL pin. The external FET option is used on this board to optimize power consumption and reduce heat.
Main Power Supply Connectors:
- J4 (2.1mm Barrel Connector): Accepts a standard wall-plug adapter. Ensure correct polarization if using an alternative adapter. Provides Ground and V+ (+12 Volts) connections.
- J5 (2-Way Screw Type Connector): Allows connection of bare wire leads, typically from a laboratory power supply. Provides Ground and V+ (12Volts) connections.
VSUP Jumpers:
Interface | Reference | Position | Description / Comments |
---|---|---|---|
VSUP | J2 | 1-2 (Default) | Routes VBAT through a protection diode to supply peripherals and MCU. |
J2 | 2-3 | Routes VBAT to a power boost converter circuit. Consult the S32M2 Hardware Design Guidelines for details. | |
VSUP | J61 | 1-2 (Default closed) | Supplies peripherals like RESET LED, LINPHY, and USER LEDs. |
VSUP | J1 | 1-2 | Supplies the VSUP input from the MCU. |
The main power supply input schematic shows the connection of J4/J5 to VBAT, a fuse (F1), protection diode (D1), and the VSUP rail. It also depicts an optional boost converter circuit with components L1, D2, D3, and associated capacitors.
VPRE
VPRE_MCU is typically 6V and is generated from VSUP_MCU. It can be powered by an external power FET (controlled by GCTL pin) or an internal PMC regulator. VPRE is always powered. An external bypass capacitor (2.2uF to 4.7uF) is required.
The schematic shows VPRE_MCU being generated from VSUP_MCU via a PMOS FET (Q3) controlled by GCTL_MCU, with bypass capacitors C20 (2.2uF) and C89 (0.22uF).
VDD_HV_A
The S32M276 MCU can internally regulate the VDD_HV_A pins. However, external bulk and decoupling capacitors are mandatory for each supply pin. The VDD_AE10 must also be connected to VDD_HV_A pins on the PCB. Capacitor values are specified in the table below:
Capacitor | Characteristic | Value |
---|---|---|
Decoupling Capacitor | X7R/X8R Ceramic | 100nF - 220nF |
Bulk Capacitor | X7R/X8R Ceramic | 4.7uF - 2.2uF |
Motor Control Interface
The S32M27 MCU integrates automotive-qualified capabilities for motor control, including MOSFET Gate pre-drivers and six external power MOSFETs for BLDC or PMSM motor drive applications. The MCU's Gate Driver Unit (GDU) provides pre-drivers to control a three-phase DC motor via external FETs, supported by an integrated charge pump and boost converter. This setup replaces a traditional bootstrap circuit for gate driving.
The GDU features three gate driver instances, each controlling one high-side FET (HG) and one low-side FET (LG). These drivers enable control of the three phases of a brushless DC motor. The pre-driver amplifies control signals to drive the power MOSFETs effectively. Low-side drivers are powered by the VLS regulator, while high-side drivers are supplied by an internal bootstrap circuit via VBS pins.
The outputs from the MOSFETs to the motor are connected to the MOTOR OUT connector (J47).
The MOTOR OUT connector (J47) provides connections for PHASE A (Pin 1), PHASE B (Pin 2), and PHASE C (Pin 3).
Programming and Debug Interface
RESET switch and led indicator
The board features a RESET switch (SW1) for manual reset operations. When activated, the S32M2 MCU drives the RESET signal to the EVB's reset pins (PTA5 and RESET). The RESET LED indicator (D10) illuminates during the RESET signal duration, signifying that the S32M27 MCU is in the reset state.
On-board Debugger
The evaluation board includes an On-Board Debugger and embedded JTAG connectors. This system facilitates serial and debug communication between a USB host and the embedded target processor.
A 10-pin Cortex Debug connector (J27) is provided for debugging. Its pinout is as follows:
Pin Number | Signal/Connection |
---|---|
1 | VDD_MCU |
2 | JTAG_TMS/SWD_DIO |
3 | GND |
4 | JTAG_TCLK/SWD_CLK |
5 | GND |
6 | JTAG_TDO |
7 | DNP |
8 | JTAG_TDI |
9 | GND |
10 | RESET_B_MCU |
Communication Interfaces
CAN PHY
The board incorporates a CAN interface connected to the S32M27 MCU, using an NXP TJA1462 CAN transceiver that supports both master and slave modes (selectable via jumpers). The output from the CAN transceiver is routed to connector J50.
The CAN connector (J50) provides the following connections:
Pin Number | Signal/Connection |
---|---|
1 | CANL |
2 | CANH |
3 | GND |
4 | NC |
LIN PHY
The S32M27xEVB-L064 features an internal LIN interface. To configure it as MASTER or SLAVE, the necessary external circuitry must be connected. The output signal is available at connectors J50 and J54.
The LIN connectors (J50 and J54) provide the following connections:
Pin Number | Signal/Connection |
---|---|
1 | VBAT |
2 | LIN |
3 | NC |
4 | GND |
User Peripherals
User Led
The evaluation board is equipped with two red LEDs, connected via NPN transistors to MCU ports. Their connections are as follows:
Reference | Signal Name | MCU Port Default | Color |
---|---|---|---|
D20 | USER_LED0 | PTD15 | Red |
D21 | USER_LED1 | PTD16 | Red |
The LEDs are driven by transistors controlled by the MCU. The schematic shows these connections, with one LED (USER_LED0) connected via Q18 and another (USER_LED1) via Q19, both receiving power from VSUP_PERH.
User Push buttons
Two push-buttons (SW2 and SW3) are available, functioning as active high inputs (pulled low, driven to VDD_MCU_PERH). They are connected to MCU ports as detailed below:
Reference | Function | MCU Port | Comments |
---|---|---|---|
SW2 | USER_SW0 | PTA15 | Enabled |
SW3 | USER_SW1 | PTD0 | Enabled |
Zero-ohm resistors (R181, R182) are present on the direct connections between the USER_SWx switches and the MCU pins. These can be removed to isolate or change the user switch's MCU pin assignment.
The schematic illustrates SW2 and SW3 connected to VDD_MCU_PERH, pulled down through resistors and connected to the MCU ports via zero-ohm resistors and decoupling capacitors.
ADC Rotary Potentiometer
The board includes an ADC Rotary Potentiometer that routes a voltage between 0V and VDD_MCU_PERH directly to an ADC Input Channel of the S32M27 Microcontroller, specifically ADC1_P611.
Reference | Function | MCU Port | Comments |
---|---|---|---|
R152 | ADCPOT | PTE6 | Enabled |
The schematic shows the potentiometer (R152) connected to VDD_MCU_PERH and GND, with its wiper output connected to the USER_ADC pin (PTE6) via a resistor (R153) and decoupling capacitors (C83, C84).
Revision History
Document Revision | Date | Schematic/ Board Number | Schematic/ Board Revision | Changes | Author |
---|---|---|---|---|---|
A | 01/2024 | 55375 | A | Internal version | Luis Rico |
Legal Information
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