NXP S32K344 White Board User Manual

8.1 MCU HW Configuration

8.1.1 MCU Power Supply Configuration

The S32K344 features two power domains: VDD_HV_A and VDD_HV_B, which can be supplied by either 5V or 3.3V. The White Board optimizes pin assignments to minimize voltage level shifter usage. VDD_HV_A is supplied with 5V and its pins are primarily used for 5V circuits, while VDD_HV_B is supplied with 3.3V and its pins are used for 3.3V circuits.

Figure 8. Pins distribution for different power domains: This diagram shows how MCU pins are allocated to the VDD_HV_A (5V) and VDD_HV_B (3.3V) power domains.

8.1.2 MCU Clock Settings

The MCU can generate a 320MHz PLL clock using a 16MHz external crystal. For low-power modes, an external 32KHz crystal can be utilized to minimize power consumption.

Figure 9. External crystals for MCU: This diagram illustrates the external crystal oscillators used for MCU clock generation.

8.1.3 MCU Reset Control

The MCU RESET pin is bidirectional. It can be used as an input to reset the MCU via a push button (SW1) or an SBC RESET signal. As an output, certain MCU internal failures (like watchdog timeouts) can pull the RESET pin low, allowing the SBC to detect and react to the reset event.

8.1.4 MCU Debug Interface

The White Board provides two debug interfaces: a 10-pin connector for SWD/JTAG and a 20-pin connector for JTAG with ETM (Enhanced Trace Module) capability. The pins used for these interfaces are detailed below. JTAG pins are essential for MCU debugging, while TRACE pins are optional.

Figure 10. Debug interface: This diagram shows the physical connections for the MCU debug interfaces, including SWD and JTAG.

8.2 SBC Features

8.2.1 SBC and MCU Connections

The Safety SBC (FS26) and the S32K344 MCU are interconnected as follows:

Figure 11. SBC and MCU on the White Board: This diagram illustrates the interconnections between the Safety SBC (FS26) and the S32K344 MCU.

8.2.2 SBC Wakeup Function

The SBC supports wakeup functionality through several sources:

• External key-on signal (0V to 12V transition on WAKE1).
• Push button SW7 on the board can generate these transitions.
• Wakeup input via LIN PHY.
• Wakeup input via CAN PHY or Ethernet PHY.

8.2.3 SBC Fail-safe Outputs

The SBC can assert fail-safe signals FS0B and FS1B upon detecting certain failures, independent of MCU intervention. FS0B disables high-side driver outputs (XS6500). FS1B is left floating and can be routed to customer-specific circuits. Assertions of FS0B or FS1B are indicated by LEDs D8 or D9 on the White Board, respectively. These signals can be released via specific SPI commands, as detailed in the FS26 datasheet.

8.2.4 SBC Debug Mode

To enter SBC FS26 debug mode during power-up, jumper J5 must be closed and J87 must be open. This configuration bypasses the need for watchdog refreshing from the MCU via SPI.

Figure 12. SBC debug entry circuit: This schematic shows the circuit configuration required to enable the SBC FS26 debug mode.

According to the FS26 datasheet, debug mode is entered if approximately 4V is detected on the FS26 DEBUG pin during power-up. After this, the FS26 begins supplying the MCU once the DEBUG pin returns to GND. A 4V pulse is observed on the FS26 DEBUG pin during power-up to initiate debug mode.

8.3 Communication Interfaces

8.3.1 Ethernet Interfaces

The board utilizes the SJA1105 Ethernet switch, providing four Ethernet interfaces. One interface is 100BASE-TX for PC connectivity, while the other three are automotive Ethernet (100BASE-T1). The SJA1105 is powered by a 3.3V buck circuit and a 1.2V LDO to meet its current consumption requirements.

Figure 13. Ethernet circuit block diagram: This diagram outlines the architecture of the Ethernet interface, including the switch and PHYs.

Figure 14. Ethernet circuit on the White Board: This figure shows the physical implementation of the Ethernet circuitry on the board.

8.3.2 CAN and LIN Interfaces

The board supports four CAN interfaces using the TJA1145 CAN PHY, which operates from a 12V VBAT and supports a sleep mode. External CAN messages can wake up the TJA1145. The MCU configures the TJA1145 operation modes via SPI commands.

The SJA1124 serves as a LIN controller and transceiver. The MCU can access this device via one SPI interface to manage four LIN channels. The remaining four LIN channels are connected to MCU LPUART modules.

Figure 15. CAN/LIN circuit block diagram: This diagram illustrates the CAN and LIN communication architecture.

Figure 16. CAN and LIN transceivers on White Board: This figure shows the physical placement of CAN and LIN transceivers.

8.3.3 USB to UART Interface

Two CP2104 USB2UART devices are integrated for easy transmission of debug messages to a PC. MCU's LPUART0 and LPUART2 are connected to these USB2UART interfaces.

Figure 17. USB to UART circuit on the White Board: This diagram details the USB to UART conversion circuitry.

8.4 General Purpose Inputs and Outputs

8.4.1 Analog and Digital Inputs

The White Board provides two general-purpose digital inputs and two analog inputs. Analog input voltage can range from 0V to 20V, and digital inputs can also accept 0V to 20V signals, allowing for analog sampling.

Figure 18. Analog input and digital input circuit: This diagram shows the schematic for analog and digital input signal conditioning.

Figure 19. Analog input and digital input on White Board: This figure indicates the location of analog and digital input connectors.

8.4.2 High Side and Low Side Driver Outputs

There are four high-side outputs driven by the XS6500, controllable via MCU GPIO/PWM pins or SPI commands. Eight low-side outputs are managed by the MC33879 and are controlled via MCU SPI commands. Related MCU pin details are listed in Table 6.

Figure 20. HS/LS outputs on the White Board: This figure illustrates the high-side and low-side driver output connections.

8.5 H-bridge Driver

An H-bridge driver (HB2001) is included on the board, controlled via the MCU SPI interface, suitable for brushed DC motor control.

Figure 21. H-bridge driver - HB2001: This diagram shows the H-bridge driver component and its connections.

8.6 Switch Inputs Detection

The MSDI device CD1030 offers 21 switch-to-ground inputs and 12 programmable inputs. The White Board implements six SG (Switch-to-Ground) pins and six SP (Switch to Programmable input) pins. The status of these switches (open or closed) can be read by the MCU via SPI. Push buttons SW8 and SW9 are provided for testing switch status transitions.

Figure 22. MSDICD1030: This diagram illustrates the switch input detection circuitry using the CD1030 device.

8.7 User Peripherals

The board is equipped with user buttons, user LEDs, ADC potentiometers, and touch sense pads.

Figure 23. User peripherals on the White Board: This figure highlights the user-accessible components like buttons, LEDs, and potentiometers.

8.7.1 User Buttons

MCU pins PTC20 and PTC21 are used to monitor the state of the user push buttons.

Figure 24. User push button schematic: This schematic shows the circuit for the user push buttons.

8.7.2 User LEDs

MCU GPIO pins PTF8, PTF9, PTF10, and PTF11 drive four user LEDs (high-active). An additional three user LEDs, driven by PTG0/PTG1/PTG2, can indicate Ethernet PHY link status.

Figure 25. User LEDs schematic: This schematic illustrates the circuit for the user LEDs.

8.7.3 ADC Rotary Potentiometers

Two ADC POTs are connected to MCU pins PTB13 and PTB14.

Figure 26. User ADC inputs schematic: This schematic shows the circuit for the ADC potentiometers.

8.7.4 Touch Sense Pads

The board includes two touch sense buttons and one touch sense slider.

Figure 27. User touch sense schematic: This schematic shows the circuit for the touch sense pads and slider.

8.8 IO Headers for Extension Board

Several IO Headers are available for connecting external modules or evaluation boards.

Figure 28. IO headers for external board: This figure shows the location of IO headers for external board connectivity.

8.8.1 GD3000 EVB

IO Headers J38, J39, J41, J42, J43, J44, J45 can serve as ARDUINO shield connectors, compatible with the GD3000 EVB for driving 3-phase PMSM motors. Key signal connections are detailed in the White Board schematics.

8.8.2 4G Module Extension

IO Headers J26 and J27 are designated for connecting an external 4G Module (e.g., USRLTE-7S4).

8.9 Car Access

The NCK2910 RF receiver and NJJ29C2 LF driver are utilized for car access applications, requiring external antennas for communication with keys. The MCU controls these devices via SPI interfaces.

Figure 29. RF and LF circuit block diagram: This diagram outlines the RF and LF receiver circuitry for car access applications.

Figure 30. RF and LF circuit on the White Board: This figure shows the physical implementation of the RF and LF circuits.

Details on NCK2910 and NJJ29C2 are under Non-Disclosure Agreement (NDA). Please contact NXP sales for more information.

8.10 Audio

The SGTL5000 audio codec can be used with Ethernet circuits for Audio Video Bridging (AVB) evaluation. The CS2100CP synchronizes clocks between the MCU and the SGTL5000. Audio data is transmitted/received via the SAI_0 interface, and the codec is configured via the LPI2C_0 interface. A 12-pin header is provided for connecting external multi-channel audio codecs.

Figure 31. Audio circuit on the White Board: This diagram illustrates the audio codec and clock synchronization circuitry.

8.11 Others

The board includes a 128Mbit QSPI Flash (S25FL128L) for storing firmware for the S32K344 and other vehicle network controllers. A 256Mbit FRAM (MB85RC256VPF) is used for NVM data storage requiring quick write operations during power down. The MMA8452Q is a 12-bit resolution, three-axis accelerometer that can monitor events in low-power mode using its inertial wakeup interrupt signals.

Figure 32. QSPI Flash, FRAM and sensor on the White Board: This figure shows the location of the QSPI Flash, FRAM, and accelerometer sensor.