Microchip PolarFire SoC Icicle Kit User Guide: FPGA Evaluation Board

Introduction

The PolarFire® SoC FPGA Icicle Kit (MPFS250T-FCVG484EES) is an RoHS-compliant, cost-optimized kit with general-purpose interfaces that enables evaluation of features of the PolarFire SoC family of FPGAs.

1. Getting Started

The PolarFire SoC Icicle Kit supports the following interfaces:

The PolarFire SoC device available on the Icicle Kit is programmed using the on-board FlashPro6 programmer. This programmer is used to develop and debug embedded applications using SoftConsole, Identify, or SmartDebug.

Note: Embedded FlashPro6 is enabled only for production kits. For PROTO kits, the device can be programmed using an external FlashPro 4, 5, or 6 programmer.

1.1 Kit Contents

The following table lists the contents of the PolarFire SoC Icicle Kit.

ItemQuantity
PolarFire SoC FPGA Icicle Kit ES featuring the MPFS250T-FCVG484EESEES device with 254 K logic elements1
12 V/5 A wall-mounted power adapter1
Ethernet cable1
USB 2.0 micro AB connector for UART interface to PC1
Quickstart card1

1.2 Block Diagram

The block diagram illustrates the key components and their interconnections within the PolarFire SoC Icicle Kit. It shows the 12V power input connecting to a Power Module, which provides various voltage outputs (5V, 3.3V, 1.0V, 1.1V, 1.2V, 2.5V, 1.05V, 1.8V) to different components. Key components include the PolarFire® SoC MPFS250T-FCVG484 FPGA, LPDDR4 memory, eMMC Memory, SD-CARD, RaspberryPi CONN, LEDs, Push Buttons, USB PHY, I2C Power Sensor, USB-UART, USB CONN, RJ-45 CONN, VSC8662, SC-SPI Flash, JTAG, and PCIe RootPort. The diagram highlights various interfaces such as mikroBUS CONN, HDR, CAN x2, XCVR x4, and JTAG-PROG 10-pin HDR, showing how they are connected to the FPGA and other modules.

1.3 Web Resources

For more information about the PolarFire SoC Icicle Kit, refer to the PolarFire SoC Page.

1.4 Board Overview

The PolarFire SoC Icicle Kit features a MPFS250T-FCVG484EES FPGA with the following capabilities:

The board's top view shows the arrangement of various components including user and power LEDs, eMMC Flash, SD Card Slot, USB OTG, 40-pin Raspberry Pi® Expansion Connector, CAN Connector, Gigabit Ethernet RJ45 Jacks, mikroBUS™ Expansion Connector, USB-UART Terminal, Push Buttons, 12V Power Supply Input, Power ON/OFF Switch, USB Embedded Programming connector, PolarFire SoC MPFS250T-FCVG484EES, JTAG Programming Header, x4 PCIe Connector, and SPI Flash. The bottom view shows additional components and traces.

1.4.1 Form Factor

The dimensions of the PolarFire SoC Icicle Kit are:

1.4.2 FPGA Bank IO Assignment for Individual Interfaces

The following table lists the FPGA Bank Assignment for individual interfaces.

InterfacesFPGA Bank Allocation
LPDDR4B6
SGMIIB5, B1, B9, and B2
PCIXCVR0, B1, B9
mikroBUSB1, B9, and B2
USB-UART (x4)B1, B9
USB interfaceB2
SC-SPI_FLASHB3
JTAG HeaderB3
eMMC/SDIOB4
CANB2, B1
Raspberry Pi 4 interface connectorB1
User defined LEDs/SwitchesB0

The following table lists the important components of the PolarFire SoC Icicle Kit.

ComponentLabel on BoardDescription
Featured Device
PolarFire SoC FPGAMPFS250T-FCVG484EES Extended Commercial (0 °C to 100 °C) temperature support.
Power Supply and Monitoring
12 V power supply inputJ29The board is powered by a 12 V power source using an external +12 V/5 A DC jack.
ON/OFF switchSW6Power ON/OFF switch from +12 V external DC jack.
Clocks
On-board 50 MHz clock oscillatorX550 MHz clock oscillator with single-ended output.
OSCX2125 MHz oscillator (differential LVDS output) which is the input to the MSS Reference clk.
FPGA Programming and Debugging
SPI flashU431 Gb Micron MT25QL01GBBB8ESF-0SIT SPI flash memory device connected to SPI pins on bank3 of the PolarFire SoC device.
JTAG programming headerJ23Header to program and debug the PolarFire SoC device using FlashPro. The appropriate programmer must be selected in the FlashPro software.
Note: For PROTO kits, the device can be programmed using an external FlashPro 4, 5, or 6 programmer.
Embedded FlashPro 6U26On-board programming.
Expansion Interfaces
mikroBUSJ44, J8mikroBUS connector.
Raspberry Pi 4J26Raspberry Pi 4 interface connector.
PCIe X 16J6PCI Express Root port connector.
Communication Interfaces
1000Base-X Gigabit Ethernet Transceiver RJ45 conn-2J1, J2Ethernet (RJ45) jack with external magnetics interfacing with VSC8662 in SGMII mode.
USB-UARTJ11USB Micro AB connector.
CANJ25, J27CAN Headers.
USB-ULPIJ16USB Micro AB connector.
Memory Chips
LPDDR4U2MT53D512M32D2DS-053 WT:D TR is used for LPDDR4 interface. Memory size: 16 Gb.
eMMCU45SDINBDG4-8G eMMC is used for this interface. Memory size: 8 GB.
SD cardJ30SD connector.
General Purpose I/O
Debug SwitchesSW1 to SW4For debug.
Light-emitting diodes (LEDs)LED1 to LED4Four active-high LEDs connected to some of the user I/Os for debugging.

1.5 Handling the Board

Pay attention to the following points while handling or operating the board to avoid possible damage or malfunction:

1.6 Operating Temperature

Extended commercial temperature range (0 °C to 100 °C).

1.7 Powering Up the Board

To power up the board, do the following:

  1. Connect 12 V/5 A power supply brick to J29.
  2. Slide switch SW6 to ON position.
  3. Power status LEDs 12P0, 5P0, 2P5V, VDDAUX4, 3P3V, VDD, 1P8, 1P1V_LPDDR4, and VDDA will glow.
  4. Install the software required for developing designs and set the jumpers for the pre-programmed design. For more information, refer to 2. Installation and Settings.

The following table provides the probing points for power rails.

#Power RailProbing PointTolerance AllowedExpected Voltage (in Volt)
112P0VC476±5%12 V
25P0VC482±5%5 V
31P8VC542±5%1.8 V
42P5VC786±5%2.5 V
51P5V_DDR3C602±5%1.5 V
60P75V_VTT_DDR3C514±5%0.75 V
7VDDC499±3%1 V
81P1V_LPDDR4C574±5%1.1 V
91P2V_PHY_VSC_FP6C587±5%1.2 V
103P3VC527±5%3.3 V
11VDDAC556±3%1.05 V

2. Installation and Settings

This section provides information about the software and hardware settings required to run the pre-programmed demo design on the PolarFire SoC Icicle Kit.

2.1 Software Settings

  1. Download and install the latest release of Libero® SoC software from the Microsemi website.
  2. Generate a free silver license for your software. The Libero SoC installer includes FlashPro5 drivers.

For instructions about installing Libero SoC, refer to Libero Software Installation and Licensing Guide. For instructions about how to download and install DirectCores and driver firmware cores on the PC where Libero SoC is installed, refer to Installing IP Cores and Drivers User's Guide.

2.2 Hardware Settings

This section provides information about jumper settings, switches, and LEDs on the PolarFire SoC Icicle Kit.

2.2.1 Jumper Settings

The following table lists the default jumper settings on board.

JumperDescriptionPinDefault Setting
J31To select LPDDR4 VrefOpen
J9Select pin for programming FPGA with external FlashPro header or with on-board programmer.Open
J21To select PolarFire SoC JTAG reset.Open
J46To select 3.3 V for RPI connector from the Icicle KitOpen
J47To select 5 V for RPI connector from the Icicle KitOpen
J15To select USB IDShort pin 1-2
J175 V for VBUS switch for USB3340Short pin 1-2
J43To select 1.8 V or 3.3 V for eMMC modesShort pin 1-2
J28Jumper for PolarFire SoC Serdes VrefShort pin 1-2
J245 V for VBUS switch for USB3320Short pin 1-2
J34To select 1.8 V or 3.3 V for BANK4 voltageShort pin 1-2
J35To select 2.5 V or 3.3 V for BANK4 Aux voltageShort pin 1-2
J45To select 1 V or 1.05 V for VDD core voltageShort pin 1-2

2.2.2 Power Supply LEDs

The following table lists the power supply LEDs on the PolarFire SoC Icicle Kit.

LEDDescription
12P012 V power supply
5P05 V power supply
2P5V2.5 V power supply
VDDAUX4Bank4 Aux voltage
3P3V3.3 V power supply
VDDCore voltage
1P81.8 V power supply
1P1V_LPDDR4LPDDR4 voltage
VDDAPower for Serdes channels

2.2.3 Test Points

The following test points are available on the PolarFire SoC Icicle Kit.

Test PointDescription
GND1TP_BLK to GND10TP_BLKTest point for Ground
SD_D0Test point for SD_DATA0/eMMCMC_DATA0 at Mux
SD_D1Test point for SD_DATA1/eMMCMC_DATA1 at Mux
SD_D2Test point for SD_DATA2/eMMCMC_DATA2 at Mux
SD_D3Test point for SD_DATA3/eMMC_DATA3 at Mux
SD_CLKTest point for SD_CLK/eMMC_CLK at Mux
SD_CMDTest point for SD_CMD/eMMC_CMD at Mux
eMMC_CLKTest point for eMMCMC_CLK at eMMCMC device
SDC_CLKTest point for SD_CLK at SD connector
SDC_CMDTest point for SD_CMD at SD connector
SDC_D3Test point for SD_DATA3 at SD connector
SDC_D2Test point for SD_DATA2 at SD connector
SDC_D1Test point for SD_DATA1 at SD connector
SDC_D0Test point for SD_DATA0 at SD connector
SD_CLK_FB_EM_D4Test point for SD_CLK_FB/eMMC_DATA4 at Mux
SD_VSEL_EM_D5Test point for SD_VSEL/eMMC_DATA5 at Mux
SD_CMD_DIR_EM_D7Test point for SD_CMD_DIR/eMMC_DATA7 at Mux
SD_WP#_EM_RSTNTest point for SD_WP#/eMMC_RSTN at Mux
SD_CD#_EM_STBTest point for SD_CD#/eMMC_STB at Mux
TP19-UART0 TX ToggTest point for UART0 TX Togg
TP17-UART0 RX ToggTest point for UART0 RX Togg
TP16-UART1 TX ToggTest point for UART1 TX Togg
TP15-UART1 RX ToggTest point for UART1 RX Togg
TP12-UART2 TX ToggTest point for UART2 TX Togg
TP13-UART2 RX ToggTest point for UART2 RX Togg
TP14-UART3 TX ToggTest point for UART3 TX Togg
TP18-UART3 RX ToggTest point for UART3 RX Togg
XTAL2_VSCTest point for XTAL2 for Phy
RCLK1_VSCTest point for Phy recovered clk1
RCLK2_VSCTest point for Phy recovered clk2
CKO_VSCTest point for Phy clkout
THMDA1Test point for THMDA1
FIBR_DIP_1Test point for PHY_Serdes receiver input pair
FIBR_DIN_1Test point for PHY_Serdes receiver input pair
FIBR_DOP_1Test point for PHY_Serdes transmitter output pair
FIBR_DON_1Test point for PHY_Serdes transmitter output pair
FIBR_DIP_0Test point for PHY_Serdes receiver input pair
FIBR_DIN_0Test point for PHY_Serdes receiver input pair
FIBR_DOP_0Test point for PHY_Serdes transmitter output pair
FIBR_DON_0Test point for PHY_Serdes transmitter output pair
TP1 to TP6 -Test points for PCIe reserved pins
TP_VDDTest point for VDD_core voltage
TP_1P1VTest point for 1.1 V
GND_1P1VTest point for 1.1V_Ground
TP_1P2VTest point for 1.2 V
GND_1P2VTest point for 1.2V_Ground
TP_3P3VTest point for 3.3 V
TP_VDDATest point for VDDA voltage
TP_2P5VTest point for 2.5 V
TP_1P8VTest point for 1.8 V
TP_5P0VTest point for 5 V
GND_1P8VTest point for 1.8V_Ground

2.3 Power Sources

The PolarFire SoC Icicle Kit uses power supply devices. For more information about these power supply devices, refer to Power Management web page.

The following table lists the key power supplies required for normal operation of the PolarFire SoC Icicle Kit.

Supply NameDescriptionValue (in Voltage)
VDDCore Power1.0/1.05
VDD25Power for PLL/ICB/Bank Controller/PNVM/Programming Analog block2.5
VDDAPower for SerDes RX Channels [3:0] Power for SerDes TX Channels [3:0]1.0/1.05
VDDA25Power for SerDes PLLS2.5
VDD18HSIO/MSS_DDR Receiver Input Power SE Corner Oscillator Power for programming blocks, analog block and SW Corner Oscillator1.8
VDDIOHSIO Bank Power1.2, 1.5, 1.8
VDDI1GPIO Bank Power1.2, 1.5, 1.8, 2.5, 3.3
VDDI2MSSIO Bank Power1.2, 1.5, 1.8, 2.5, 3.3
VDDI3Power for JTAG Ios1.8, 2.5, 3.3
VDDI4MSSIO Bank Power1.2, 1.5, 1.8, 2.5, 3.3
VDDI5MSS SGMII Bank Power and Pre-Driver2.5, 3.3
VDDI6MSS DDR (HSIO) Bank Power1.2, 1.5, 1.8
VDDI7GPIO Bank Power1.2, 1.5, 1.8, 2.5, 3.3
VDDI8HSIO Bank Power1.2, 1.5 1.8
VDDI9GPIO Bank Power1.2, 1.5, 1.8, 2.5, 3.3
VDDAUX1GPIO Pre-Driver Bank Power2.5, 3.3
VDDAUX2MSSIO Pre-Driver Bank Power2.5, 3.3
VDDAUX4MSSIO Pre-Driver Bank Power2.5, 3.3
VDDAUX7GPIO Pre-Driver Bank Power2.5, 3.3
VDDAUX9GPIO Pre-Driver Bank Power2.5, 3.3
XCVR_VREFAll SerDes RefClk receiver's voltage reference pin0.9/1.25

Note: Bank 9 VDDI power pins are connected to Bank 1 VDDI power pins within the package substrate for pin migration compatibility.

The voltage rails available on the PolarFire SoC Icicle Kit include 12 V, 5 V, 3.3 V, 2.5 V, 1.8 V, 1.2 V, and 1.0 V. A diagram illustrates the connections of various voltage rails (12P0V, 5P0V, 1.0V-VDD, 1P2V_PHY_VSC_FP6, 1P1V_LPDDR4, 1P8V, 2P5V, 3P3V, VDDA, 1P5V_DDR3, 0P75V_VTT/VREF) to different ICs (MIC26950YJL, MIC22705YML, MIC23303YML-T5, MIC69502WR (LDO), MIC5166YML-TR) which act as power regulators.

The following table lists the power regulators used for PolarFire SoC FPGA Icicle voltage rails.

Voltage RailPart NumberDescriptionCurrent
5 VMIC26950JLIC REG BUCK ADJ12 A
VDD (1 V)MIC22705YMLIC REG BUCK ADJUSTABLE7 A
VSC_PHY(1.2 V)MIC23303YML-T5IC REG BUCK ADJUSTABLE3 A
1.1V_LPDDR4MIC23303YML-T5IC REG BUCK ADJUSTABLE3 A
1P8VMIC23303YML-T5IC REG BUCK ADJUSTABLE3 A
2P5VMIC69502WRIC REG LINEAR POS ADJ5 A
3P3VMIC26950JLIC REG BUCK ADJ12 A
VDDAMIC69502WRIC REG LINEAR POS ADJ5 A
1P5V_DDR3MIC23303YML-T5IC REG BUCK ADJUSTABLE3 A
VTTMIC5166YML-TRIC PWR SUP 3 A HS DDR TERM 10MLF3 A

3. Board Components and Operations

This section describes the key components of the PolarFire SoC Icicle Kit and provides information about important board operations. For device datasheets, refer to PolarFire SoC Page. For more information, refer to the Board Level Schematics document.

3.1 LPDDR4 Memory Interface

LPDDR4 is connected to the MSS BANK 6.

3.2 SPI Serial Flash

The PolarFire SoC Icicle Kit has one SPI flash (1 Gb). The flash is connected to BANK3 SC-SPI pins to support IAP programming.

The SPI Flash interface diagram shows the PolarFire® SoC FPGA (BANK3) connected to the SC-SPI Flash (1 Gb) via SDO (F7), SDI (H10), SS (G7), and SCK (E6) pins.

3.3 eMMC and SDIO Interface

The PolarFire SoC MSS BANK4 has MUXed IOs for SDIO or eMMC interface. The PolarFire SoC Icicle Kit uses on-board MUX U44 and U29 to select the interface between an 8 GB eMMC device or an SD card connector.

3.3.1 eMMC

3.3.2 SD Card

The PolarFire SoC Icicle Kit has one SD card connector.

3.4 High Speed Transceivers Configuration

3.4.1 Transceivers Block Allocations

3.4.2 PCIx16 Connector

XCVR x4 lanes are mapped to PCIe CONN. An on-board PCIx16 straddle Mount root port connector is available in the PolarFire SoC Icicle Kit.

3.5 Communication Interfaces

3.5.1 Ethernet - SGMII Interface

The VSC8662 device is a low-power, dual Gigabit Ethernet transceiver (1000BASE-X Gigabit Ethernet Transceiver PHY).

3.5.2 CAN Interface

The PolarFire SoC Icicle Kit has two CAN interfaces. One interface is from the MSS BANK 2 and another interface is from the GPIO BANK 1.

3.5.3 USB OTG

USB3340 is a Hi-Speed USB 2.0 Transceiver that provides a physical layer (PHY) solution well-suited for portable electronic devices.

3.6 Expansion Capabilities

The following sections explain the expansion connectors for the PolarFire SoC Icicle Kit.

3.6.1 Raspberry Pi 4 Connector

The PolarFire SoC Icicle Kit has a 40 pin Raspberry Pi connector.

3.6.2 mikroBUS Connector

The PolarFire SoC Icicle Kit has a 16 pin mikroBUS interface connector.

3.7 Voltage and Current Monitoring

The PolarFire SoC Icicle Kit has provision to measure current for four power rails:

Current sensing is done by PAC1934T-I/JQ. The I2C interface is available on digital values to read back values. The sensor's I2C interface is connected to the MSS I2C interface.

3.8 GPIO

3.8.1 Switches and LEDs

The PolarFire SoC Icicle Kit is equipped with four tact switches and four LED indicators.

3.8.2 LEDs

LEDs are used to indicate:

3.9 User Interface

The PolarFire SoC Icicle Kit has four user defined LEDs and four push-button switches.

3.9.1 USB to UART Interface

CP2108 is a USB to quad UART bridge controller to support 4 UART interfaces on board. UART IOs are connected to the Fabric IOs (Bank 1) of PolarFire SoC.

Note: The Silicon Labs CP2108 drivers are needed to see the COM ports through the J11 connector. The drivers can be downloaded from the following location: www.silabs.com/developers/usb-to-uart-bridge-vcp-drivers

3.10 Mux for JTAG Selection

Multiplexer U22 is used for JTAG selection for External Flash Pro header and On-board Programmer.

Jumper (J9)JTAG Selection
OpenExternal Flash Pro header
CloseOn-board Programmer

3.11 Programming Scheme

PolarFire SoC silicon is programmed in two ways:

The programming scheme block diagram shows the PolarFire® SoC (Bank 3) connected to a MUX, which then connects to either an FP Header or an On-board Programmer (Bank 7).

3.12 System Reset

DEVRST_N is an input-only reset pad that allows a full reset of the chip to be asserted at any time. A sample reset circuit uses a Microchip MCP121T-240E/TT device, connecting 3P3V to Bank3 via the MCP121T-240E/TT, which outputs to DEVRST_n.

3.13 50 MHz Oscillator

A 50 MHz clock oscillator with an accuracy of ±10 ppm is available on the board. This clock oscillator is connected to the FPGA fabric to provide a system reference clock.

The pin number of the 50 MHz oscillator is W12, and the pin name is HSIO92PB0/CLKIN_N_2/CCC_NW_CLKIN_N_2/CCC_NW_PLL1_OUT0.

The 50 MHz clock oscillator interface diagram shows the 50 MHz Oscillator connected to the PolarFire® SoC FPGA (Bank0) at pin W12, with a 1.8V supply.

For more information, refer to the Board-Level Schematics document (provided separately).

4. Pin List

For more information about all package pins on the PolarFire SoC, refer to the PolarFire SoC MPFS250T_MPFS250TS-FCVG484 Package Pin Assignment Table.

5. Board Component Placement

The silkscreen top view of the PolarFire SoC Icicle Kit illustrates the placement of various components, including connectors (J29, J33, J24, J30, J46, J19, J47, J25, J26, J27, J44, J45, J6, J3, J1, J2), switches (SW1-SW4, SW6), LEDs (LED1-LED8, LD1-LD9, LD11, LD12), and major ICs (U1, U3, U4, U5, U21, U23, U24, U26, U29, U32, U34, U35, U41, U43, U45, U47, U48, U49, U50, U52, U54, U61, U66). Various capacitors (e.g., C476, C482, C542, C786, C602, C514, C499, C574, C587, C527, C556) and resistors are also visible, along with test points (TP1-TP19) and power rails (12P0V, 5P0V, 1P8V, 1P1V_LPDDR4, 2P5V, 3P3V, VDDAUX4, VDDA, VDD). The bottom view shows additional components and traces on the underside of the board.

6. Demo Design

For the Icicle kit reference design, refer to the documentation provided on GitHub.

7. Appendix: Programming PolarFire SoC FPGA Using the On-Board Programmer

The PolarFire SoC Icicle Kit includes an on-board programmer. An external programmer hardware is, therefore, not required to program the PolarFire SoC device. The device can be programmed using the FlashPro software installed on the host PC.

Follow these steps to program an on-board PolarFire SoC device using the on-board programmer.

Notes: The programming file will be available in a future release.

  1. Connect the power supply cable to the J23 connector on the board.
  2. Close Jumper J9 for mux U22.
  3. Power on the board using the SW6 slide switch.
  4. When the board is successfully set up, the power LEDs start glowing.
  5. Download FlashPro Express from the following location: https://www.microsemi.com/product-directory/programming/4977-flashpro#software
  6. On the host PC, start the FlashPro Express software.
  7. Click New Project to create a new project.
  8. In the New Project window, do the following, and click OK.
    • Enter a project name.
    • Select Single device as the programming mode
  9. Click Configure Device.
  10. Click Program to program the device.
  11. From the View Programmer pane, select the on-board FlashPro6 programmer.
  12. Click Browse, and select the .stp file from the Load Programming File window.

The Programmer List window in the FlashPro Express software shows the programmer name, programmer type, port, programmer status, and information about whether the programmer is enabled.

When the device is programmed successfully, a Run Program PASSED status is displayed.

8. Revision History

The revision history describes the changes that were implemented in the document. The changes are listed by revision, starting with the most current publication.

RevisionDateDescription
B05/2021Updated 3.9.1 USB to UART Interface section with a note.
A01/2021Following is a list of changes made in this release:
  • Converted this document from Microsemi format to Microchip format. Document number is changed from 50200882 to DS60001679A.
  • Information about 1.4.1 Form Factor has been updated in this revision.
2.0The following is a summary of the changes made in this revision.
1.0This is the first publication of this document.

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Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, Anyln, AnyOut, Augmented Switching, BlueSky, BodyCom, CodeGuard, CryptoAuthentication, CryptoAutomotive, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, Espresso T1S, EtherGREEN, IdealBridge, In-Circuit Serial Programming, ICSP, INICnet, Intelligent Paralleling, Inter-Chip Connectivity, JitterBlocker, maxCrypto, maxView, memBrain, Mindi, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE, Ripple Blocker, RTAX, RTG4, SAM-ICE, Serial Quad I/O, simpleMAP, SimpliPHY, SmartBuffer, SMART-I.S., storClad, SQI, SuperSwitcher, SuperSwitcher II, Switchtec, SynchroPHY, Total Endurance, TSHARC, USBCheck, VariSense, VectorBlox, VeriPHY, ViewSpan, WiperLock, XpressConnect, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.

SQTP is a service mark of Microchip Technology Incorporated in the U.S.A.

The Adaptec logo, Frequency on Demand, Silicon Storage Technology, and Symmcom are registered trademarks of Microchip Technology Inc. in other countries.

GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries.

All other trademarks mentioned herein are property of their respective companies.

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ISBN: 978-1-5224-8241-3

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