eXecute-In-Place (XIP) with Serial Flash Memories on MPUs Using MPLAB Harmony V3
AN5218
Introduction
This document describes the eXecute-In-Place (XIP) from serial Flash memory feature on MPUs and discusses the implementation of an application using the MPLAB® Harmony v3 software framework. It explains how to generate an application binary to execute in the serial Flash memory region, and it also shows how to execute an application from the serial Flash. The purpose of this feature is to provide an option to run a DDR-less system on MPUs.
The example provided in this application note comprises the six main steps listed below. These steps are detailed in 3. Serial Flash XIP Example Using MPLAB Harmony v3:
- SAM-BA installation on Windows host
- Device setup to Flash using SAM-BA
- Configure the first stage bootloader (ROMBOOT) to boot from the serial Flash memory
- Configure the second stage bootloader (at91bootstrap) to enable XIP
- Modification required to execute a Harmony application from QSPI
- Debug an application on MPLAB or run an application executed from serial Flash
Hardware and Software Requirements
MPU Evaluation Kit
The procedure enumerated by this document is applicable to an MPU that supports XIP from serial Flash memory. The detailed steps shown here apply to SAM9X60-EK and SAMA7G54-EK evaluation kits that feature serial Flash memory on the boards.
SAMA7G54-EK Evaluation Kit (EV21H18A)
The SAMA7G54-EK Evaluation Kit is a development kit for evaluating the SAMA7G5 microprocessor (MPU). The SAMA7G5 is based on the Cortex®-A7 and is capable of running at 1 GHz. The evaluation kit includes an on-board embedded debugger. The SAMA7G54-EK board has Macronix Octa SPI flash MX66LM1G45GXDI00.
The SAMA7G54-EK Evaluation Kit is available at Microchip Direct.
SAM9X60-EK Evaluation Kit (DT100126)
The SAM9X60-EK Evaluation Kit is a development kit for evaluating the SAM9X60 microprocessor (MPU). The SAM9X60 is based on the Arm® ARM926EJ-S™ and is capable of running at 600 MHz. The evaluation kit includes an on-board embedded debugger. The SAM9X60-EK board features the Microchip QSPI module SST26VF064B.
Details of the SAM9X60-EK Evaluation Kit are available on the Microchip Website.
Windows® Host System
The execute-in-Place Harmony application described in this application note is tested and verified on a Windows host PC.
MPLAB X Integrated Development Environment (IDE) and MPLAB XC32 C/C++ Compiler
MPLAB X IDE is an expandable, highly configurable software program that incorporates powerful tools to help users to discover, configure, develop, debug, and qualify embedded designs for most Microchip microprocessors.
The IDE is available at the Microchip Website. This document uses MPLAB X IDE version 6.15.
The compiler is available at the Microchip Website. This document uses MPLAB XC32 version 4.35.
MPLAB Harmony v3
MPLAB Harmony v3 is a fully-integrated embedded software development framework that provides flexible and interoperable software modules that enable the user to dedicate resources to create applications for 32-bit MPUs, rather than dealing with device details, complex protocols, and library integration challenges. The Harmony framework includes MPLAB Code Configurator (MCC), an easy-to-use development tool with a Graphical User Interface (GUI) that simplifies device set-up, library selection, configuration, and application development. MCC is available as a plug-in that directly integrates with MPLAB X IDE.
SAM-BA® In System Programmer
SAM-BA software provides an open set of tools for in-system programming of internal and external memories connected to Microchip MPUs. Devices can be programmed through the JTAG, debug UART or USB interfaces. With the SAM-BA monitor residing in on-chip non-volatile memory, SAM-BA can be used to re-program the MPU without connecting to the debugger. If using the secure boot feature of Microchip MPUs, the Secure SAM-BA edition, available under NDA, must be used.
Note: Links to download the software are given in 6. References.
XIP on Serial Flash Memory
The Quad Serial Peripheral Interface (QSPI) is configured to Serial Memory mode for XIP program execution. In a system that maps external Flash memory, such as ROM, SRAM, DRAM, etc., this mode allows code execution directly from Flash memory without code shadowing to RAM.
QSPI Serial Memory Mode
In Serial Memory mode, the QSPI acts as a serial Flash memory controller. The QSPI can be used to read data from the serial Flash memory, allowing the CPU to execute code from it (XIP). The QSPI can also be used to control the serial Flash memory (Program, Erase, Lock, etc.) by sending specific commands.
In this mode, the QSPI is compatible with single-bit SPI, Dual SPI, Quad and Octal SPI protocols. Refer to the device data sheet to confirm support.
To activate this mode, QSPI_MR.SMM must be written to ‘1'. In Serial Memory mode, data is transferred either by QSPI_TDR and QSPI_RDR, or by writing or reading in the QSPI memory space depending on the configuration of QSPI_IFR.TFRTYP and QSPI_IFR.SMRM.
Instruction Frame
In order to control serial Flash memories, the QSPI sends instructions via the SPI bus (READ, PROGRAM, ERASE, LOCK, etc.). Because the instruction set implemented in serial Flash memories is memory-vendor dependent, the QSPI includes a complete Instruction Frame register (QSPI_IFR) to ensure compatibility with all serial Flash memories.
An instruction frame includes:
- (Optional) An instruction code (see Continuous Read Mode in the corresponding data sheet).
- An address (size: 8, 16, 24 or 32 bits). The address is optional but is required by instructions such as READ, PROGRAM, ERASE, LOCK. By default, the address is 8 bits long, but can be increased up to 32 bits to support serial Flash memories larger than 128 Mbits.
- An option code (size: 1/2/4/8 bits). The option code is used to activate the XIP mode or the Continuous Read mode (see Continuous Read Mode) for READ instructions, in some serial Flash memory devices. These modes improve the data read latency.
- Dummy cycles. Dummy cycles are optional but required by some READ instructions.
- Data bytes are optional. Data bytes are present for data transfer instructions such as READ or PROGRAM. The instruction code, the address/option and the data can be sent with Single-bit SPI, Dual SPI, or Quad SPI protocols.
A diagram shows the QSPI signal timing for instruction, address, option, dummy cycles, and data transfer.
Read Memory Transfer
The data of the serial memory is accessed by sending an instruction with QSPI_IFR.DATAEN = 1 and QSPI_IFR.TFRTYP = 1. In this mode, the QSPI is able to read data at random address into the serial Flash memory, allowing the CPU to execute code directly from it (XIP). In order to fetch data, the user must first configure the instruction frame by writing the QSPI_IFR. Then data can be read at any address in the QSPI address space mapping. The address of the system bus read accesses matches the address of the data inside the serial Flash memory.
In Serial Memory mode, QSPI is compatible with four protocols:
- Single-Bit SPI: Communicate with external memory with QIO0.
- Dual SPI: Communicate with external memory with QIO0 and QIO1.
- Quad SPI: Communicate with external memory with QIO0, QIO1, QIO2 and QIO3.
- Octal SPI protocols: Communicate with external memory with QIO0 to QIO7.
When communicating with external memory, the instruction, address, and data can be set to use different modes which are configured in the Instruction Frame register (QSPI_IFR). There are ten combinations:
Value | Name | Description |
---|---|---|
0 | SINGLE_BIT_SPI | Instruction: Single-bit SPI / Address-Option: Single-bit SPI / Data: Single-bit SPI |
1 | DUAL_OUTPUT | Instruction: Single-bit SPI / Address-Option: Single-bit SPI / Data: Dual SPI |
2 | QUAD_OUTPUT | Instruction: Single-bit SPI / Address-Option: Single-bit SPI / Data: Quad SPI |
3 | DUAL_IO | Instruction: Single-bit SPI / Address-Option: Dual SPI / Data: Dual SPI |
4 | QUAD_IO | Instruction: Single-bit SPI / Address-Option: Quad SPI / Data: Quad SPI |
5 | DUAL_CMD | Instruction: Dual SPI / Address-Option: Dual SPI / Data: Dual SPI |
6 | QUAD_CMD | Instruction: Quad SPI / Address-Option: Quad SPI / Data: Quad SPI |
7 | OCT_OUTPUT | Instruction: Single-bit SPI / Address-Option: Single-bit SPI / Data: Octal SPI |
8 | OCT_IO | Instruction: Single-bit SPI / Address-Option: Octal SPI / Data: Octal SPI |
9 | OCT_CMD | Instruction: Octal SPI / Address-Option: Octal SPI / Data: Octal SPI |
For detailed information on how to transfer instruction, address, and data with external memory, refer to the respective product data sheet.
Serial Flash XIP Example Using MPLAB Harmony v3
SAM-BA Installation on Windows Host
The example provided in this application note comprises the six steps detailed in the following sections.
- Download the latest version of SAM-BA tool for Windows. A link is available in 6. References.
- Unzip the file into a working directory of your choice.
- Add the SAM-BA directory path to the system environment variables.
a. Select "Edit the system environment variables" in the pull-down menu.
b. In the System Properties window, click on "Environment Variables" in the Advanced tab.
c. In the Environment Variables window, double click on "Path" in the System Variables section.
d. Add the SAM-BA directory path to the path variables.
A screenshot illustrates the process of editing environment variables in Windows.
Device Set-Up to Flash Using SAM-BA
- Open the Disable Boot jumper:
- J22 for SAMA7G54-EK Evaluation Kit
- J13 for SAM9X60-EK Evaluation Kit
- Ensure there is no SD memory card inserted.
- Press and release the start button (nSTART) on the SAMA7G54-EK. For SAM9X60-EK, this step is skipped.
- Press and hold the "BOOT_DIS" button. This disables booting from the on-board NAND and NOR (QSPI) Flash memories.
- While pressing the "BOOT_DIS" button, press and release the reset "nRST" button.
- Release the "BOOT_DIS" button.
- Confirm the MPU is set in SAM-BA monitor when RomBOOT appears on the console.
- The MPU is now set in SAM-BA monitor and the device is ready to be programmed.
Configure the First Stage Bootloader to Boot from the Serial Flash Memory
The first-stage bootloader must be configured to boot from serial Flash memory. This can be done using SAM-BA commands. To information about the boot process and first-stage boot configuration, refer to the section "Boot Strategies" of the respective data sheet.
Note: This is not a mandatory step for SAM9X60-EK.
Note: A Windows command line must be open to run the SAM-BA commands.
The user accesses a list of all applets available by entering the command:
sam-ba -p <port> -b <board> -a help
Options:
- -p, --port <port[:options:...]> where port can be j-link or serial
- -b, --board <board[:options:...]> where board can be sam9x60-ek or sama7g54-ek
The boot configuration packet (BCP) can be written either to Emulation SRAM or to OTPC (One Time Programmable Memory Controller). The user can program BCP to Emulation SRAM during the development phase and to OTPC during production phase.
The SAM-BA commands listed below can be used to program BCP to Emulation SRAM:
- Enable emulation:
sam-ba -p <port> -b <board> -a bootconfig -c writecfg:bscr:EMULATION_ENABLED
- Read bscr and verify emulation is enabled:
sam-ba -p <port> -b <board> -a bootconfig -c readcfg:bscr
- Emulation SRAM reset:
sam-ba -p <port> -b <board> -a bootconfig -c resetemul
- Refresh Emulation SRAM:
sam-ba -p <port> -b <board> -a bootconfig -c refreshcfg:emul
- Enable QSPIO as external NVM:
sam-ba -p <port> -b <board> -a bootconfig -c writecfg:bcp-emul:QSPI0_IOSET1
- Read bcp_emul and verify whether QSPI is set as external NVM:
sam-ba -p <port> -b <board> -a bootconfig -c readcfg:bcp-emul
- Reset the board by pressing and then releasing the reset button.
An example using SAMA7G54-EK is shown below. The output shows SAM-BA commands being executed and their results.
Note: Boot configuration using Emulation SRAM must to be set up every power cycle.
WARNING: Once OTPC is programmed, Emulation mode is disabled.
The steps below can be used to program BCP to OTPC:
- Disable emulation:
sam-ba -p <port> -b <board> -a bootconfig -c writecfg:bscr:EMULATION_DISABLED
- Read bscr and verify emulation is disabled:
sam-ba -p <port> -b <board> -a bootconfig -c readcfg:bscr
- Refresh OTP:
sam-ba -p <port> -b <board> -a bootconfig -c refreshcfg:otp
- Enable QSPIO as external NVM:
sam-ba -p <port> -b <board> -a bootconfig -c writecfg:bcp-otp:QSPI0_IOSET1
- Read bcp_otp and verify whether QSPI is set as external NVM:
sam-ba -p <port> -b <board> -a bootconfig -c readcfg:bcp-otp
- Reset the board by pressing and then releasing the reset button.
Configure the at91bootstrap to Enable XIP
Preparing the Build Environment
- The complete source code of at91bootstrap can be obtained by either of the following ways:
- If you have Git installed, clone the repo into the project directory by using the command:
$git clone git@https://github.com/linux4sam/at91bootstrap
- If you do not have Git installed, then download at91bootstrap from github and unzip into your project directory.
- Open the project at91bootstrap on MPLAB X IDE and set it as the main project.
- Use the XC32 compiler to build at91bootstrap.
Note: Use at91bootstrap version 4.0.7 or later.
To do this:
- Note/Copy the XC32 installation path.
- Go to Project>Properties>Makefile.
- Paste the XC32 path in the Build, Debug build and Clean command fields. E.g. Build/Debug command:
make CROSS_COMPILE="C:/ProgramFiles/Microchip/xc32/v4.30/bin/bin/pic32c-"
Clean command:make mplabclean CROSS_COMPILE="C:/ProgramFiles/Microchip/xc32/v4.30/bin/bin/pic32c-"
- Click Apply.
- Click OK.
A screenshot shows the Project Properties window with the Makefile settings configured.
Configure the at91bootstrap
The at91bootstrap can be configured to either:
- debug Harmony applications executed from serial Flash on MPLAB X IDE
- run a Harmony application executed from serial Flash by using Kconfig.
Configure at91bootstrap to Debug Harmony Applications Executed from Serial Flash on MPLAB X IDE
- Go to Project>Properties>Kconfig>load.
- Select the appropriate project directory, then select configs.
- In the configs folder, select <board>df_qspi_uboot_defconfig.
- Click Open, then Apply, then OK.
A screenshot shows the Project Properties window with Kconfig settings loaded.
Then perform the following changes:
- Under Primary Operation, select Load and Stop.
- Under Flash Memory, expand QSPI Configuration, then select eXecute In Place.
- Under Next software type, select Load 4 MB into the start of SDRAM.
- Under Demo application image storage setup:
- Flash offset is the QSPI offset where a user wants to flash the application.
- Demo app image size is the size of the app image.
- External RAM address to load Demo-App image is the QSPI starting address of the application. It should match the .text load address in your application linker file. The linker file can be found in the user application project folder, Eg: ddram.ld file)
- Click Apply, then OK.
A table lists the external QSPI addresses for the boards.
A screenshot shows the configuration for the SAMA7G54-EK board with specific settings highlighted.
Configure at91bootstrap to Run Harmony Applications Executed from Serial Flash
The configuration step is the same as described in 3.4.2.2, with a small modification:
Under Primary Operation, select Load and launch next software.
An example configuration for SAMA7G54-EK is shown below. A screenshot shows the Project Properties window with the modified Primary Operation setting.
Now clean and build at91bootstrap.
Note: The boot file (boot.bin) generated by using this Kconfig can be used to run Harmony applications executed from QSPI Flash.
Modifications Required to Execute a Harmony Application from Serial Flash
While creating a Harmony application on MPLAB X IDE, do the linker file modifications and serial Flash pin configuration described in the sections below. Then generate code and build the application, which is then executed from the serial Flash.
A link to create an application executed from the serial Flash on SAMA7G54-EK is given in 6. References.
Linker File Modifications
- Assign a text section to serial Flash memory and a data section to the relocate section. The data section is copied from the serial Flash memory to SRAM during runtime.
- bss and relocate sections should be NOLOAD sections.
- The relocate section should be loaded from serial Flash and run from SRAM.
- Remove cache aligned sections and assign _ramcode_Ima and _ramdata_Ima to SRAM.
An example linker file of SAMA7G54-EK is given in the screenshots below. The screenshots illustrate the modified linker file and the old linker file, highlighting the changes made to the text, data, and relocate sections.
Note: The text section load address should match the serial Flash jump address configured in the at91 bootstrap.
Serial Flash Pin Configuration
All the serial Flash pins must be configured properly to enable serial Flash support.
The table below provides the pin IDs to be used to connect to external Flash.
Board Name | Pin ID |
---|---|
SAM9X60-EK (DT100126) | PB19-PB24 |
SAMA7G54-EK (EV21H18A) | PB9-PB21 |
The screenshot below shows the configuration for the the SAMA7G54-EK board. The screenshot highlights the Pin Configuration settings.
The SAMA7G54-EK board features one Quad Serial Peripheral Interface (QSPI) memory MX66LM1G45GXD100.
A table shows the Octal SPI Flash Signal Description, mapping Shared PIO Signal Name to QSPI Signal Name and Description.
Debug an Application on MPLAB or Run an Application Executed from Serial Flash
Debug an Application Executed from the Serial Flash on MPLAB X IDE
Before debugging, ensure that the harmony.bin file in your project directory is flashed in the serial Flash offset. Refer to the sections 3.1 and 3.2 for initial device setup and tool installation procedure.
- Erase the serial Flash:
sam-ba -p j-link -b <board> -a qspiflash -c erase
- Program the application starting from serial Flash offset of 0x40000:
sam-ba -p j-link -b <board> -a qspiflash -c write:harmony.bin:0x40000
The screenshot below illustrates step 2 performed on the SAMA7G54-EK (
Note: Do not flash boot.bin to serial Flash memory using SAM-BA to debug the application on MPLAB X IDE.
To debug the Harmony application executed from the serial Flash on MPLAB X IDE, use either at91bootstrap.elf or boot.bin file generated in 3.4.2.1 in the Harmony application project properties. If boot.bin is used, the boot entry address and boot load address must be added in the project properties as illustrated in the following screenshot. The screenshot shows the Project Properties window with settings for loading boot.bin.
Start debugging the application on MPLAB X IDE. The user can observe the program counter and see that the Harmony application is executed from the serial Flash memory. With the serial connection established between the board and host PC, open the serial console to monitor debug messages.
Running the Harmony Application Executed from Serial Flash Memory
To run the Harmony application executed from serial Flash memory upon reset, flash the boot.bin and harmony.bin files to the serial Flash memory with the SAM-BA commands shown below.
Note: To run the Harmony application executed from serial Flash upon reset, use the boot.bin file generated in section 3.4.2.2
The SAM-BA commands to program the boot and application file to serial Flash are:
- Erase the entire serial Flash:
sam-ba -p j-link -b sam9x60-ek -a qspiflash -c erase
- Program the at91bootstrap in the starting address of the serial Flash:
sam-ba -p j-link -b sam9x60-ek -a qspiflash -c writeboot:boot.bin
- Program the application starting from serial Flash offset of 0x40000:
sam-ba -p j-link -b sam9x60-ek -a qspiflash -c write:harmony.bin:0x40000
Now press the reset button and the user application is executed from serial Flash.
A screenshot shows the console output after reset, indicating the boot process and application execution.
Note: A console serial communication can be enabled to observe the debug messages.
Performance
The QSPI allows the system to use high-performance serial Flash memories which are small and inexpensive, in place of larger and more expensive parallel Flash memories. Therefore, the performance of the QSPI plays an important role. The performance of the QSPI is bounded by the QSPI speed, Flash capabilities and other criteria.
Note: Refer to the application note “SAMA5D2 Quad SPI (QSPI) Performance" given in 6. References. Performance numbers in the document may vary with respect to compiler settings and optimization levels.
Conclusion
Developing a QSPI application in XIP requires an understanding of the QSPI protocols, at91bootstrap Kconfig settings and linker scripts. MPLAB Harmony v3 provides a flexible, abstracted and fully integrated firmware development platform for 32-bit MPUs. This document described how to use the XIP mode in the QSPI to work with external Flash memories and how to set up MPLAB X IDE to debug the application.
References
- SAM-BA In-System Programmer Download
- Application Note: SAMA5D2 Quad SPI (QSPI) Performance
- Harmony application : Blink LED QSPI-XIP application on SAMA7G54-EK
- Harmony application : Blink LED QSPI-XIP application on SAM9X60-EK
- Configure and build at91bootstrap to enable QSPI-XIP on MPLAB Harmony
- Step by Step guide to develop a Harmony application getting executed from Serial flash memory on SAM9X60-EK
Revision History
Revision A - 12/2023
This is the initial release of this document.
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