TNJ-070: Analog Electronic Circuit Design Technical Note

Introduction

I joined Analog Devices with the desire to master analog filter design. To achieve this, I purchased a considerable number of books, such as those in Figures 1 and 2 [1, 2] (though they are older, I managed to find used copies), and studied them. Through these resources, I gained a considerable understanding of active filter design, and I have published the results in this web lab article [3]. However, as mentioned in that article, while designing active filters involves calculating the filter characteristic curve equation (after performing square root calculations) and then factoring it, passive filters require an additional step – a calculation referred to as the 'PQ method' in [1] – which is even more advanced and difficult. While I understood the concept by reading [1], I was stuck without deriving the formulas for component constants.

Searching the net, I found that [4] provides specific calculation formulas. However, used copies on Amazon are priced at 15,000 yen and 18,000 yen (ouch!), making it difficult to justify the purchase in today's environment... (sigh). The author of that book, Mr. Kazushi Watanabe, according to [5], conducted research on circuit network theory and CAD at NEC Corporation, and later held positions such as General Manager, Director, and Senior Managing Director, eventually becoming a professor at Soka University (and later Dean of the Faculty of Engineering!). He apparently spent over 20 years in management roles, and it's astonishing how he transitioned to academia after such a busy career, maintaining his sharp intellect without letting his technical skills rust.

This time, I will again focus on active filter theory. Although I introduced the concept of active filters in [3], this time I will delve into the deep waters of FDNR (Frequency Dependent Negative Resistor) filters, which are high-performance but less commonly discussed. As I begin writing, I have no idea how deep this dive will be (sigh).

It seems I have a bit of a trauma with filter design, as this topic is increasingly appearing in my web lab articles. My apologies to everyone for offering similar content repeatedly...

What is an FDNR Type Filter?

FDNR type filters are fundamentally based on their configuration and demonstrate their power in special cases, such as filters requiring high Q-factors (i.e., steep transitions from passband to stopband) or high filter orders.

Let's consider a passive LPF (in this example, a Chebyshev type with 0.5dB ripple) with source resistance Rs and load resistance RL, as shown in Figure 3 [3]. The theory behind designing the prototype LC filter (shown in Figure 3) is extremely difficult. However, software tools and tables exist for calculating component constants, which are generally used.

By applying a '1/s transformation' (where s is the Laplace transform operator) to the transfer function of this LC filter, each component is transformed as shown in Figure 4: inductors become resistors, resistors become capacitors, and capacitors become FDNRs (Frequency Dependent Negative Resistors).

The 1/s transformation was invented by L. T. Bruton and is also known as the 'Bruton Transformation' [6]. The symbol for FDNR appears as shown in Figure 4 [6]. This technical note will use this notation. We will explain this FDNR in detail in this series.

Interestingly, applying the 1/s transformation to the transfer function of a passive circuit does not change the signal transmission characteristics. This is because applying 1/s to both the numerator and denominator of the transfer function effectively cancels out the 1/s, returning it to its original state.

Figure 3 Description: A schematic diagram labeled 'Passive LC LPF Circuit with Source Resistance and Load Resistance (Prototype circuit for constructing an FDNR type filter. Chebyshev type, 0.5dB ripple).' It shows a voltage source V1 connected to a series of components: Rs (1kΩ), L1 (271.5mH), L2 (404.4mH), L3 (271.5mH), and RL (1kΩ). Capacitors C1 (0.1957μF) and C2 (0.1957μF) are connected in parallel with L1 and L3 respectively. The output is VOUT. An AC analysis setup is also indicated: '.ac dec 5000 1 1meg'.

Figure 4 Description: A schematic diagram labeled 'Circuit of the passive LC LPF in Figure 3 transformed by 1/s.' It shows the conceptual transformation: Rs becomes Cs, RL becomes CL, L1 becomes R1, L2 becomes R2, L3 becomes R3, C1 becomes CFDNR1, and C2 becomes CFDNR2. The relationship between the original components and the transformed components is indicated.

Transformation to FDNR using '1/s Transformation'

Figure 5 shows the FDNR type filter derived from the LC filter in Figure 3 by applying the 1/s transformation. As will be explained later, the impedance of the circuit derived directly from Figure 3 by 1/s transformation is too low, so it has been scaled up by a factor of 1000.

Figure 5 Description: A schematic diagram labeled 'Circuit of the FDNR type filter realized from the circuit in Figure 4 (scaled by 1000 times for impedance. Op-amps used are the UniversalOpamp2 general-purpose model from LTspice, with open-loop gain Avol = 10M and gain-bandwidth product GBW = 100MHz).' This is an active circuit implementation. It shows a voltage source V1 connected to a 1MΩ resistor (R1, conceptually derived from L1). Then a capacitor C3 (1μF) is connected, followed by a capacitor C1 (0.1957μF) which represents the FDNR1. This is followed by another capacitor C2 (0.1957μF) representing FDNR2, then a 1MΩ resistor (R2, conceptually derived from L3), and finally the output VOUT. Op-amps U1 and U3 are configured as buffers or active components. Capacitors C4 (1μF), C5 (0.1957μF), C6 (1μF) and resistors R4 (1kΩ), R5 (1kΩ), R6 (1kΩ), R7 (404.4Ω), R8 (1kΩ), R9 (1kΩ), R10 (1kΩ), R11 (271.5Ω) are also part of the active filter implementation. VS1 and VS2 are power supply connections. An AC analysis setup is indicated: '.ac dec 5000 1 1meg'.

Explanation of 1/s Transformation

Let's look at how this 1/s transformation is performed. We will transform reactance and pure resistance. First, the reactance of an inductor with inductance L [H] as in Figure 3 is:

X_L(f) = j2πfL [Ω] (1)

Here, ƒ is the frequency. Expressed using the Laplace operator s (s = j2πf):

X_L(s) = sL (2)

Transforming this by 1/s:

X_L(s) / s = L [Ω] (3)

This results in a resistor with a value of L [Ω], unaffected by frequency (or the Laplace operator s). In other words, an inductor is transformed into a resistor element by the 1/s transformation.

Next, let's consider resistance. The impedance (pure resistance) of a resistor with resistance R [Ω] is:

Z_R(f) = R [Ω] (4)

Naturally, expressing this using the Laplace operator s yields:

Z_R(s) = R (5)

Transforming this by 1/s:

Z_R(s) / s = R / s (6)

This results in an element that is a function of frequency ƒ (or the Laplace operator s), with a capacitance value of CR = 1/R. In other words, a resistor is transformed into a capacitor element by the 1/s transformation.

Finally, let's consider capacitance. The reactance of a capacitor with capacitance C [F] is:

X_C(f) = 1 / (j2πfC) (7)

Expressed using the Laplace operator s:

X_C(s) = 1 / (sC) (8)

Transforming this by 1/s:

X_C(s) / s = 1 / (s²C) (9)

This results in a function inversely proportional to the square of the frequency ƒ, a seemingly strange element called a 'frequency-dependent negative resistance element'. The equivalent capacitance value is the same as the original capacitance (C = C_FDNR).

This is the FDNR (Frequency Dependent Negative Resistor). A capacitor is transformed into an FDNR by the 1/s transformation. It's quite a mysterious element, isn't it?

Now, based on the calculation procedure above, the resistances corresponding to L1 and L3 in Figure 3 are 271.5 mΩ and 404.4 mΩ, respectively. These are very low resistance values. Therefore, in Figure 5, the reference impedance has been increased by 1000 times, using 271.5 Ω and 404.4 Ω as practical component constants. Other component constants are also configured to achieve a 1000-fold increase in impedance. If we directly derive the component constants for Figure 5 from Figure 3, the resulting constants are generally inappropriate (as seen in the examples of L1, L2, L3 above).

Summarizing the calculated values (as a result of scaling impedance by 1000 times):

• Rs → Cs = 1μF
• RL → CL = 1μF
• L1 → R1 = 271.5 Ω
• L3 → R3 = 271.5 Ω
• L2 → R2 = 404.4 Ω
• C1 → C_FDNR1 = 0.1957μF / 1000
• C2 → C_FDNR2 = 0.1957μF / 1000

What unit does the FDNR element have, I wonder! (lol)

Simulation Confirmation

Figure 6 shows the frequency response of the prototype LC filter in Figure 3, and Figure 7 shows the frequency response of the FDNR type filter in Figure 5 (simulated using LTspice). The lower part of each graph shows a detailed 0.5dB step. As you can see, the results are exactly the same. However, although not visible in Figure 7, there is a slight difference around -180dB. At higher frequencies, the FDNR type filter's characteristics degrade due to the limitations of the op-amp's frequency response.

Figure 6 Description: A frequency response plot labeled 'Prototype LC filter frequency characteristics (LTspice simulation).' The X-axis is frequency from 1Hz to 1MHz (logarithmic scale). The Y-axis shows gain in dB, ranging from 0dB to -160dB. The plot shows a typical low-pass filter characteristic, with a sharp roll-off. The V(vout) label indicates the output voltage.

Figure 7 Description: A frequency response plot labeled 'FDNR type filter frequency characteristics compared to the prototype LC filter (Figure 6) (same simulation).' The X-axis is frequency from 1Hz to 1MHz (logarithmic scale). The Y-axis shows gain in dB, ranging from -4.0dB to -8.0dB. The plot shows a very similar low-pass filter characteristic to Figure 6, indicating the FDNR filter accurately replicates the LC filter's performance. The V(vout) label indicates the output voltage.

What is a GIC Circuit?

The FDNR is constructed using the GIC (Generalized Impedance Converter) circuit shown in Figure 8. A GIC circuit can construct any arbitrary impedance. It consists of multiple series element paths connected towards ground and two op-amps connected to them. The impedance seen from the input terminal Zin is obtained as:

Z_in = (Z1 * Z3 * Z5) / (Z2 * Z4) (10)

For example, if we set Z2, Z4, and Z5 as resistors R (i.e., Z2 = Z4 = Z5 = R), and use capacitors CG1 for Z1 and CG3 for Z3, we can achieve:

Z(f) = -1 / ((2πf)² * CG1 * CG3 * R) (11)

This realizes an FDNR, i.e., a frequency-dependent negative resistance. Substituting the component constants from Figure 5, we find that CG1 * CG3 * R = 0.1957E-9. This matches the constants obtained by applying the 1/s transformation to C1 and C2 in Figure 4 and scaling the impedance by 1000 times. Furthermore, the negative sign in equation (11) indicates that it is a negative resistance.

Note that Figure 10, which shows a GIC circuit, has resistor R7 connected in parallel. This corresponds to the bias resistor for the op-amp and is excluded from equation (11). It was not originally present and is not essential for the GIC circuit/FDNR itself.

From equation (11), we can see that there are four topologies for configuring a GIC circuit as an FDNR:

1. Set Z1 and Z3 as capacitors, and the rest as resistors.
2. Set Z1 and Z5 as capacitors, and the rest as resistors.
3. Set Z3 and Z5 as capacitors, and the rest as resistors.
4. Set Z2 and Z4 as inductors, and the rest as resistors.

However, option 4 is not practical. Figure 8.47 in [7] shows a circuit diagram and explains the topologies. Unfortunately, there seems to be an error in the connection point of the bottom two elements and the op-amp (though it is shown in Figure 9 for reference).

Figure 8 Description: A block diagram labeled 'Basic configuration of a GIC (Generalized Impedance Converter) circuit.' It shows a central block with five impedance elements labeled Z1, Z2, Z3, Z4, Z5 connected in a specific configuration. Two op-amps are shown connected to this network. The input impedance Zin is indicated.

Figure 9 Description: A schematic diagram labeled 'GIC circuit for constructing an FDNR [7] (Note: There is an error in the connection of the bottom two elements and the op-amp [indicated by red arrow]).' This shows a specific GIC topology using op-amps and resistors/capacitors. It appears to be a partial circuit.

Figure 10 Description: A schematic diagram labeled 'LTspice circuit for constructing an FDNR using the GIC circuit in Figure 8 (Op-amps are UniversalOpamp2, same as in Figure 5, with open-loop gain Avol = 10M and gain-bandwidth product GBW = 100MHz).' This shows an active circuit implementation using two op-amps (U1, U2) and various resistors (R7=1MΩ, R4=1kΩ, R5=1kΩ, R6=1kΩ) and capacitors (C3=0.2μF, C4=1μF). The input is AC 1, and the output is V(n001).

What is Negative Resistance?

Figure 12 illustrates the concept of negative resistance. The left side shows a 'general resistor.' When a voltage is applied in the indicated direction, current flows in the direction of the red arrow, i.e., downwards (towards the resistor).

In contrast, the right side represents a 'negative resistance.' When a voltage is applied in the indicated direction, current flows outwards from the resistor (upwards, as shown by the blue arrow), opposite to the direction of current flow in a general resistor. This is because the direction of current flow is reversed in a negative resistance. Therefore, Ohm's law can be expressed as:

V = -IR (13)

Here, the polarity of I is assumed to be the current direction in the 'general resistor' on the left. Consequently, the resistance value on the left side of the equation is R for a 'general resistor,' but the polarity resisting the applied voltage is negative, meaning it's reversed (like current 'gushing out'!). Furthermore, for an FDNR, this behavior includes a factor of f², making it a 'Frequency Dependent' negative resistance.

Figure 12 Description: A diagram illustrating the concept of resistance. On the left, labeled 'General Resistor,' a resistor symbol is shown with an arrow indicating voltage direction and a red arrow indicating current flow direction. On the right, labeled 'Negative Resistance,' a resistor symbol is shown with an arrow indicating voltage direction and a blue arrow indicating current flow direction, opposite to the voltage direction.

FDNR Type Filter Precautions

High Impedance Output:

A key consideration for FDNR type filters is that the output must be driven by a high impedance load. In Figure 5, VOUT is a voltage output. Since C2 corresponds to the load resistance of the prototype circuit, a separate load resistor cannot be connected here. R2 serves as the bias resistor for the op-amp. Therefore, this terminal must be driven by a high impedance (e.g., a voltage follower). If the load resistance is finite, the frequency characteristics will change.

Figure 13 shows simulation results when a load resistance is connected to the output of the filter in Figure 5. The .step directive in LTspice was used to vary the load resistance from 100Ω, 1kΩ, 10kΩ, 100kΩ, to 1MΩ. As you can see, the frequency characteristics differ significantly from Figure 7. Naturally, the lower the load resistance, the greater the degradation.

Figure 13 Description: A frequency response plot labeled 'Simulation of FDNR type filter with varying load resistance (frequency characteristics are significantly degraded).' The X-axis is frequency from 1Hz to 1MHz (logarithmic scale). The Y-axis shows gain in dB, ranging from 0dB to -160dB. Multiple curves are shown, representing different load resistances (100Ω, 1kΩ, 10kΩ, 100kΩ, 1MΩ). The plot clearly shows that as the load resistance decreases, the filter's response deviates from the ideal. The V(vout) label indicates the output voltage.

Low Impedance Input:

The same applies to the input side. As shown in Figure 4, the source resistance is transformed into a capacitor. This implies that the FDNR type filter is assumed to be driven by a zero output impedance from the source. Therefore, in the actual circuit, the input of the FDNR type filter must be driven by a low impedance. If we vary the source resistance and simulate it with LTspice, the change (degradation) in characteristics can be clearly confirmed.

FDNR Type Filter Amplitude

A characteristic of FDNR type filters is that the input and output amplitudes become 1/2 (-6dB). This is because the prototype LC filter in Figure 3 forms the basis. The behavior shown in Figure 6 for the prototype LC filter and Figure 7 for the FDNR type filter illustrates this.

The source resistance Rs and load resistance RL in Figure 3 are transformed into capacitors C1 and C2, respectively. In a DC circuit, an amplitude of 1/2 would correspond to a voltage division where the voltage is shared between C1 and C2. However, in reality, parasitic resistance components exist, and simple voltage division by capacitance is not achieved.

When resistors R1 and R2 are connected in parallel to capacitors C1 and C2 (which originally correspond to Rs and RL in Figure 3), this ensures that the input and output amplitudes become 1/2 (-6dB) even in the DC to low-frequency range, due to the same constants being used for the bias resistors. However, it is necessary to increase the resistance values to avoid affecting the FDNR type filter's operation.

Figure 14 Description: A personal diary entry dated December 22, 2019. The author reflects on the passage of time and describes preparing a yuzu bath (yuzu-yu) for health and peace, using eight yuzu fruits. The accompanying image shows eight yuzu fruits in a bathtub.

Conclusion

The FDNR type filter is a somewhat special filter that can be realized by applying a '1/s transformation' (where s is the Laplace operator) to an LC filter. In this installment, we covered the basic aspects of FDNR type filters, particularly their GIC circuits and negative resistance. It appears to be a filter topology that is not easily understood intuitively.

In the next installment, we will delve deeper into GIC circuits and FDNR type filters.

For further information on FDNR type filters, please refer to references [8] and [9]. Reference [9] is particularly detailed.

References

• [1] Masamitsu Kawakami; Circuit Network Configuration, Kyoritsu Shuppan
• [2] Ken Yanagisawa, Iwao Kanabayashi; Design of Active Filters, Sanpo Shuppan
• [3] Satoshi Ishii; LTspice for Salen-Key Type Filters (Parts 1-5), TNJ-044~TNJ-048, Circuit Design WEB Lab, Analog Devices
• [4] Kazushi Watanabe; Theory and Design of Transmission Networks, Ohmsha
• [5] Kazushi Watanabe, Wikipedia, https://ja.wikipedia.org/wiki/渡部和
• [6] Frequency dependent negative resistor, Wikipedia, https://en.wikipedia.org/wiki/Frequency_dependent_negative_resistor
• [7] Hank Zumbahlen; Linear Circuit Design Handbook, Chapter 8 Analog Filters, Analog Devices. https://www.analog.com/media/en/training-seminars/design-handbooks/Basic-Linear-Design/Chapter8.pdf
• [8] Satoru Imada, Takehiko Fukaya; Practical Analog Filter Design Methods [On-Demand Edition], CQ Publishing
• [9] Special Feature: Filter Design and Usage, Transistor Technology SPECIAL No. 44, CQ Publishing

Diary: December 22, 2019 (Sunday)

Today, the day I'm writing this technical note, is the winter solstice of Reiwa 1. The passage of time feels like a high-speed analog signal waveform. Nevertheless, on this winter solstice, I put 8 yuzu fruits from my garden into the bathtub, wishing for the health, safety, and peace of my family and myself, and enjoyed the yuzu bath alone (Figure 14). These are not commercially grown yuzu, so they don't look as refined, but such elegance is unnecessary. They are as nature intended. I savored it wholeheartedly with deep peace of mind.

※ This technical note TNJ-070 was published in December 2020, exactly one year after its writing, during the winter solstice season.

Figure 14 Description: A photo showing eight yuzu fruits in a bathtub, labeled 'Winter Solstice Yuzu Bath.' The author expresses wishes for family health, safety, and peace.