SmartDesign MSS
AHB Bus Matrix Configuration
Libero® IDE Software
Configuration Options
Lub SmartFusion Microcontroller Subsystem AHB Bus Matrix yog qhov tsim tau zoo heev.
MSS AHB Bus Matrix configurator tso cai rau koj los txiav txim siab tsuas yog ib qho sub-set ntawm lub npav matrix configurations. Cov kev xaiv uas tau teev tseg hauv lub configurator yuav zoo li qub rau ib daim ntawv thov thiab - thaum teeb tsa hauv lub configurator - yuav raug teeb tsa hauv SmartFusion ntaus ntawv los ntawm Actel System Boot. Lwm cov kev xaiv tsim tau xws li eNVM thiab eSRAM remapping feem ntau yuav ua rau lub sijhawm ua haujlwm thiab tsis muaj nyob rau hauv qhov kev teeb tsa no.
Hauv daim ntawv no peb muab cov lus piav qhia luv luv ntawm cov kev xaiv no. Yog xav paub ntxiv thov mus saib ntawm Actel SmartFusion Microcontroller Subsystem Tus Neeg Siv Khoom Qhia.
Configuration Options
Kev txiav txim
Slave Arbitration Algorithm. Txhua tus qhev interfaces muaj ib tug arbiter. Tus arbiter muaj ob hom kev ua haujlwm: (ntshiab) round robin thiab hnyav round robin (raws li qhia hauv daim duab 1). Txoj kev txiav txim txiav txim xaiv tau siv rau txhua tus qhev cuam tshuam. Nws yuav tsum tau muab sau tseg tias tus neeg siv yuav override lub arbitration tswvyim dynamically nyob rau hauv lawv run-time code ntawm ya.
Kev ruaj ntseg – Chaw nres nkoj nkag
Txhua tus tsis yog-Cortex-M3 masters txuas nrog AHB tsheb npav matrix tuaj yeem raug thaiv los ntawm kev nkag mus rau ib qho ntawm cov qhev chaw nres nkoj txuas nrog lub npav matrix. Fabric Master, Ethernet MAC thiab Peripheral DMA cov chaw nres nkoj tuaj yeem raug thaiv los ntawm kev khij lub npov sib thooj hauv qhov kev teeb tsa no. Nco tseg hais tias nyob rau hauv cov ntaub ntawv ntawm tus tswv ntaub, kev nkag mus yog ntxiv tsim nyog los ntawm txwv cheeb tsam xaiv tau piav qhia hauv qab no.
Kev Ruaj Ntseg – Mos Processor Memory Access
Txwv kev nkag mus rau Memory
- Disabling qhov kev xaiv no tso cai rau ib tug mos processor (los yog fabric master) nkag mus rau txhua qhov chaw hauv Cortex-M3 nco daim ntawv qhia.
- Ua kom qhov kev xaiv no txwv tsis pub muaj cov khoom siv mos (lossis tus tswv ntaub) kom nkag mus rau txhua qhov chaw hauv Cortex-M3 nco daim ntawv qhia uas txhais los ntawm Lub Chaw Nco Nco.
Kev txwv cheeb tsam Memory Loj - Qhov kev xaiv no txhais qhov loj ntawm cheeb tsam nco txwv rau tus tswv ntaub.
Restricted Memory Region Chaw Nyob – Qhov kev xaiv no txhais lub hauv paus chaw nyob ntawm qhov txwv memoregion. Qhov chaw nyob no yuav tsum tau ua raws li cov kev xaiv txwv txwv cheeb tsam loj.
Daim duab 1 • MSS AHB Bus Matrix Configurator
Chaw nres nkoj piav qhia
Table 1 • Cortex-M3 Port Description
| Chaw nres nkoj npe | Kev taw qhia | PAD? | Kev piav qhia |
| RXEV | IN | Tsis muaj | Ua rau Cortex-M3 sawv los ntawm WFE (tos rau qhov kev tshwm sim) qhia. Qhov kev tshwm sim tawm tswv yim, RXEV, tau sau npe txawm tias tsis tos ib qho kev tshwm sim, thiab yog li cuam tshuam rau WFE tom ntej. |
| TXEV | Tawm | Tsis muaj | Kev tshwm sim kis tau los ntawm Cortex-M3 SEV (xa cov xwm txheej) qhia. Qhov no yog ib lub voj voog mem tes sib npaug rau 1 FCLK lub sijhawm. |
| POM | Tawm | Tsis muaj | Cov teeb liab no tau lees paub thaum Cortex-M3 pw tsaug zog tam sim no lossis pw tsaug zog-rau-tawm hom, thiab qhia tias lub moos rau lub processor tuaj yeem nres. |
| DEEPSLEEP | Tawm | Tsis muaj | Cov teeb liab no tau lees paub thaum Cortex-M3 pw tsaug zog tam sim no lossis pw tsaug zog-rau-tawm hom thaum SLEEPDEEP me ntsis ntawm System Control Register tau teeb tsa. |
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Microsemi SmartDesign MSS AHB Bus Matrix Configuration [ua pdf] Cov neeg siv phau ntawv qhia SmartDesign MSS AHB Bus Matrix Configuration, SmartDesign MSS, AHB Bus Matrix Configuration, Matrix Configuration, Configuration |
