Tsarin Microsemi SmartDesign MSS GPIO Kanfigareshan
SmartFusion Microcontroller Subsystem (MSS) yana samar da GPIO hard peripheral (APB_1 sub bas) tare da GPIO 32 masu daidaitawa. Haƙiƙanin halayen kowane GPIO (shigarwa, fitarwa da fitarwa suna ba da damar sarrafa rijistar, yanayin katsewa, da sauransu) a matakin aikace-aikacen ta amfani da SmartFusion MSS GPIO Direba da Actel ke bayarwa. Koyaya, dole ne ku ayyana ko GPIO yana da alaƙa kai tsaye zuwa kushin waje (MSS I/O) ko zuwa masana'anta na FPGA. Ana yin wannan ɓangaren tsarin na'urar ta amfani da mai daidaitawa na MSS GPIO kuma an kwatanta shi a cikin wannan takaddar.
Don ƙarin cikakkun bayanai game da MSS GPIO mai wuya, da fatan za a koma zuwa Actel SmartFusion Microcontroller Subsystem User's Guide.
Zaɓuɓɓukan Haɗuwa
MSS I/O Pad - Zaɓi wannan zaɓi don nuna cewa zaɓaɓɓen GPIO za a haɗa shi zuwa wani keɓaɓɓen kushin waje (MSS I/O). Dole ne ku zaɓi nau'in buffer I/O - INBUF, OUTBUF, TRIBUFF da BIBUF - wanda zai ayyana yadda ake daidaita kushin MSS I/O. Lura cewa wannan zaɓi bazai samuwa ba idan MSS I/O ya riga ya yi amfani da shi ta wani yanki ko masana'anta (duba sashin raba MSS I/O don ƙarin cikakkun bayanai)
Fabric - Zaɓi wannan zaɓi don nuna cewa zaɓaɓɓen GPIO za a haɗa shi da masana'anta na FPGA. Dole ne ku zaɓi ko kuna son fitar da haɗin GPI (Input), GPO (Output) ko duka haɗin GPI da GPO (Input/Output) don haɗawa da masana'anta. Lura cewa fitarwar GPIO tana ba da damar yin rajista ba za a iya fitar da shi zuwa masana'anta ba lokacin da aka zaɓi wannan zaɓi. Hakanan, GPI's da ke da alaƙa da masana'anta na iya haifar da katsewa daga ma'anar mai amfani idan an saita katsewa da ya dace ta hanyar aikace-aikacenku (Ayyukan fara direban MSS GPIO).
MSS I/O Rarraba
A cikin tsarin gine-ginen SmartFusion ana raba MSS I/Os tsakanin mahaɗan MSS guda biyu ko tsakanin na'urar MSS da masana'anta na FPGA. MSS GPIOs maiyuwa ba za su iya haɗawa da wani MSS I/O na musamman ba idan an riga an haɗa wannan I/O zuwa na gefen MSS ko zuwa masana'anta na FPGA. Mai daidaitawa na GPIO yana ba da amsa kai tsaye game da ko ana iya haɗa GPIO zuwa MSS I/O ko a'a.
GPIO [31:16]
GPIO[31:16] an tsara su cikin ƙungiyoyi waɗanda ke nuna waɗanne keɓaɓɓun MSS suke raba MSS I/Os da su. Idan aka yi amfani da abin da ke gefe (an kunna kan zanen MSS), to, MSS I/O Pad na kasa-kasa menu ya yi launin toka don GPIO masu dacewa kuma ana nuna alamar Bayani kusa da menu na ƙasa. Alamar Bayani tana nuna cewa zaɓin MSS I/O ba za a iya zaɓar saboda an riga an yi amfani da shi ta gefen MSS ko, bisa fakitin da aka zaɓa, ba a haɗa shi ba.
Exampshafi na 1
SPI_0, SPI_1, I2C_0, I2C_1, UART_0 da UART_1 an kunna su a cikin zanen MSS.
- GPIO[31:16] ba za a iya haɗa shi da MSS I/O ba. Kula da menus masu launin toka da gumakan bayanai (Hoto 1-1).
- GPIO[31:15] ana iya haɗa shi da masana'anta na FPGA. A cikin wannan example, GPIO[31] an haɗa shi da masana'anta azaman Fitarwa da GPIO[30] azaman Input.
Exampshafi na 2
I2C_0 da I2C_1 an kashe su a cikin zanen MSS.
- GPIO[31:30] da GPIO[23:22] ana iya haɗa su zuwa MSS I/O (kamar yadda aka nuna a hoto 1-2).
- A cikin wannan example, duka GPIO[31] da GPIO[30] an haɗa su zuwa MSS I/O azaman tashoshin fitarwa.
- A cikin wannan example, GPIO[23] an haɗa shi da MSS I/O azaman tashar shigar da shigar da GPIO[22] zuwa MSS I/O azaman tashar Bidirectional.
- GPIO[29:24,21:16] ba za a iya haɗa shi da MSS I/O ba. Kula da menus masu launin toka da gumakan bayanai.
- GPIO[29:24,21:16] ana iya haɗa shi da masana'anta na FPGA. A cikin wannan example, duka GPIO[29] da GPIO[28] an haɗa su da masana'anta azaman tashoshin shigar da bayanai.
GPIO [15:0]
GPIO[15:0] raba MSS I/Os wanda za'a iya daidaita shi don haɗawa da masana'anta na FPGA (ana iya yin wannan saitin daga baya ta amfani da MSS I/O Configurator). Idan an saita MSS I/O don haɗawa da masana'anta na FPGA, to, MSS I/O Pad-down menu ya yi launin toka don GPIO ɗin da aka raba daidai kuma ana nuna alamar Bayani kusa da menu na ƙasa. Alamar Bayani tana nuna cewa zaɓin MSS I/O ba za a iya zaɓar saboda an riga an yi amfani da shi ko, bisa fakitin da aka zaɓa, ba a haɗa shi ba.
Lura cewa shuɗin rubutu a cikin mai daidaitawa yana haskaka sunan fil ɗin fakitin kowane MSS I/O mai alaƙa da GPIO. Wannan bayanin yana da amfani don tsara tsarin allo.
Example
Don nuna yadda ya kamata a nuna yadda aka haɗa daidaitawar MSS I/O da GPIO[15:0], Hoto na 1-3 yana nuna duka masu daidaitawa gefe da gefe tare da saitin mai zuwa:
- Ana amfani da MSS I/O[15] azaman tashar tashar INBUF da aka haɗa da masana'anta na FPGA. Saboda haka, GPIO[15] ba za a iya haɗa shi da MSS I/O ba.
- GPIO[5] an haɗa shi zuwa MSS I/O azaman Input. Saboda haka ba za a iya amfani da MSS I/O[5] don haɗawa da masana'anta na FPGA ba.
- GPIO[3] an haɗa shi da masana'anta na FPGA azaman fitarwa. Don haka ba za a iya amfani da MSS I/O[3] don haɗawa da masana'anta na FPGA ba.
Bayanin tashar jiragen ruwa
Tebur 2-1 • Bayanin tashar jiragen ruwa na GPIO
| Sunan tashar jiragen ruwa | Hanyar | PAD? | Bayani |
| GPIO_ _IN | In | Ee | Sunan tashar tashar GPIO lokacin da aka saita GPIO[index] azaman MSS I/O Shigarwa
tashar jiragen ruwa |
| GPIO_ _FITA | Fita | Ee | Sunan tashar tashar GPIO lokacin da aka saita GPIO[index] azaman MSS I/O Fitowa
tashar jiragen ruwa |
| GPIO_ _TRI | Fita | Ee | Sunan tashar tashar GPIO lokacin da aka saita GPIO[index] azaman MSS I/O
Tristate tashar jiragen ruwa |
| GPIO_ _BI | Ciki | Ee | Sunan tashar tashar GPIO lokacin da aka saita GPIO[index] azaman MSS I/O Bidirectional tashar jiragen ruwa |
| F2M_GPI_ | In | A'a | Sunan tashar tashar GPIO lokacin da aka saita GPIO[index] don haɗi zuwa masana'anta na FPGA azaman Shigarwa tashar jiragen ruwa (F2M yana nuna cewa siginar yana fitowa daga masana'anta zuwa MSS) |
| M2F_GPO_ | In | A'a | Sunan tashar tashar GPIO lokacin da aka saita GPIO[index] don haɗi zuwa masana'anta na FPGA azaman Fitowa tashar jiragen ruwa (M2F yana nuna cewa siginar yana fitowa daga MSS zuwa masana'anta) |
Lura:
- Ana haɓaka tashoshin jiragen ruwa na PAD kai tsaye zuwa sama a cikin tsarin ƙira.
- Dole ne a haɓaka tashoshin jiragen ruwa marasa PAD da hannu zuwa babban matakin daga zane mai daidaitawa na MSS don kasancewa a matsayin matakin matsayi na gaba.
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Tsarin Microsemi SmartDesign MSS GPIO Kanfigareshan [pdf] Manual mai amfani SmartDesign MSS GPIO, Kanfigareshan, SmartDesign Tsarin MSS GPIO, SmartDesign MSS |
