intel AN 829 PCI Express* Avalon MM DMA Reference Design

AN 829: PCI Express* Avalon®-MM DMA Reference Design

Gabatarwa

PCI Express* Avalon® Memory-Mapped (Avalon-MM) Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwararren Ƙwaƙwalwa na Ƙwaƙwalwa na Ƙwaƙwalwa na Ƙwaƙwalwa na Ƙwaƙwalwa na Ƙaƙwalwa na Ƙaƙwalwa na Ƙaƙwal ) na Intel® Arria® 10 , da Intel Cyclone 10 GX , da Intel Stratix® 10 Hard IP don PCIe * ta amfani da su. madaidaicin Avalon-MM da mai sakawa, babban mai sarrafa DMA.
Tsarin ya haɗa da direban software na Linux don saita canja wurin DMA. DMA mai karantawa tana motsa bayanai daga ƙwaƙwalwar tsarin zuwa guntu ko ƙwaƙwalwar waje. Rubutun DMA yana motsa bayanai daga ƙwaƙwalwar kan-kan-kan-kan ko ƙwaƙwalwar waje zuwa ƙwaƙwalwar tsarin. Direban software na Linux kuma yana auna aikin tsarin. Wannan ƙirar ƙira tana ba ku damar kimanta aikin ƙa'idar PCIe a cikin yin amfani da ƙirar Avalon-MM tare da sakawa, babban aiki DMA.
Hoto na 1: PCIe Avalon-MM DMA Reference Design Block zaneWannan hoton toshe yana nuna duka ƙwaƙwalwar kan-guntu da zaɓuɓɓukan ƙwaƙwalwar ajiya na waje.

Bayanan kula:

1. Rubuta Mover yana canja wurin bayanai daga yankin gida zuwa yankin mai masaukin baki
2. Read Mover yana canja wurin bayanai daga yankin mai masaukin baki zuwa yankin gida

Kamfanin Intel. An kiyaye duk haƙƙoƙi. Intel, tambarin Intel, da sauran alamun Intel alamun kasuwanci ne na Kamfanin Intel Corporation ko rassan sa. Intel yana ba da garantin aiwatar da samfuran FPGA da semiconductor zuwa ƙayyadaddun bayanai na yanzu daidai da daidaitaccen garanti na Intel, amma yana da haƙƙin yin canje-canje ga kowane samfuri da sabis a kowane lokaci ba tare da sanarwa ba. Intel ba ya ɗaukar wani nauyi ko alhaki da ya taso daga aikace-aikacen ko amfani da kowane bayani, samfur, ko sabis da aka kwatanta a nan sai dai kamar yadda Intel ya yarda da shi a rubuce. An shawarci abokan cinikin Intel su sami sabon sigar ƙayyadaddun na'urar kafin su dogara ga kowane bayanan da aka buga kuma kafin sanya oda don samfur ko ayyuka.

• Ana iya da'awar wasu sunaye da alamun a matsayin mallakin wasu.

Bayanai masu alaƙa

• Intel Stratix 10 Avalon-MM Interface don Jagorar Mai Amfani da Maganin PCIe
• Intel Arria 10 ko Intel Cyclone 10 Avalon-MM DMA Interface don Jagorar Mai Amfani da Maganin PCIe
• Bayanan Bayani na PCI Express 3.0

DMA Reference Design Hardware da Software Bukatun

Abubuwan Bukatun Hardware
Tsarin tunani yana gudana akan abubuwan haɓakawa masu zuwa:

• Intel Arria 10 GX FPGA Development Kit
• Intel Cyclone 10 GX FPGA Development Kit
• Intel Stratix 10 FPGA Development Kit
• Tsarin tunani yana buƙatar kwamfutoci biyu:
• Kwamfuta mai PCIe Gen3 x8 ko x16 Ramin da ke aiki da Linux. Wannan kwamfutar ita ce lambar kwamfuta 1.
• Kwamfuta ta biyu tare da shigar Intel Quartus® Prime software version 18.0. Wannan kwamfutar tana zazzage abubuwan FPGA SRAM File (.sof) zuwa FPGA akan kayan haɓakawa. Wannan kwamfuta ita ce lambar kwamfuta 2.

Bukatun Software

• Software na ƙira da aka sanya akan lambar kwamfuta 1. Ana samun ƙirar ƙira a cikin Shagon Zane na Intel FPGA. Taskar Platform Platform na Intel Quartus Prime Pro File (.par) ya haɗa da shawarar kira, mai dacewa, da saitunan bincike na lokaci don sigogi da aka ƙayyade a cikin ƙirar ƙira.
• Software na Intel Quartus Prime da aka sanya akan lambar kwamfuta 2. Kuna iya sauke wannan software daga Intel Quartus Prime Pro Edition Software Features/Download web shafi.
• An tsara direban Linux ɗin musamman don waɗannan ƙirar ƙira.

Bayanai masu alaƙa

• Intel Arria 10 Reference Design
  • Zazzage ƙirar tunani da software ɗin ƙira daga Shagon Zane.
• Intel Cyclone 10 GX Reference Design
  • Zazzage ƙirar tunani da software ɗin ƙira daga Shagon Zane.
• Stratix 10 Reference Design
  • Zazzage ƙirar tunani da software ɗin ƙira daga Shagon Zane.
• Cibiyar Zazzagewar Intel Quartus Prime Pro Edition

Bayanan Module Bridge Avalon-MM DMA

Ƙwararren Avalon-MM tare da DMA ya haɗa da waɗannan kayayyaki masu zuwa:
Hoto na 2. PCIe Avalon-MM DMA Reference Design Block zaneWannan hoton bock yana nuna duka ƙwaƙwalwar kan-guntu da zaɓuɓɓukan ƙwaƙwalwar ajiya na waje.

Bayanan kula:

1. Rubuta Mover yana canja wurin bayanai daga yankin gida zuwa yankin mai masaukin baki
2. Read Mover yana canja wurin bayanai daga yankin mai masaukin baki zuwa yankin gida

Karanta Data Mover
Mai karanta Data Mover yana aika žwažwalwar ajiya karanta Fakitin Layer Transaction (TLPs) sama. Bayan mai karanta Data Mover ya sami Kammalawa, Mai karanta Data Mover yana rubuta bayanan da aka karɓa zuwa ƙwaƙwalwar ajiyar kan-chip ko waje.
Rubuta Data Mover
Mai Rubutun Bayanan Rubutun yana karanta bayanai daga kan-chip ko ƙwaƙwalwar waje kuma yana aika bayanan sama ta amfani da rubutattun ƙwaƙwalwar ajiya TLPs akan hanyar haɗin PCIe.
Mai Kula da Bayanin DMA
Modul Mai Kula da Bayani yana sarrafa ayyukan karantawa da rubuta DMA. Shirye-shiryen software mai watsa shiri rajista na ciki a cikin Mai Kula da Bayani tare da wuri da girman tebur mai bayanin da ke zaune a cikin ƙwaƙwalwar tsarin runduna ta hanyar babban tashar Avalon-MM RX. Dangane da wannan bayanin, Mai Kula da Bayanin Bayani yana jagorantar Mai Rarraba Bayanai don kwafi gabaɗayan tebur zuwa FIFOs na gida don aiwatarwa. Mai Kula da Bayani yana aika matsayi na ƙarshe zuwa sama ta tashar Avalon TX bawa (TXS).
Hakanan zaka iya amfani da na'urar sarrafa bayanin waje don sarrafa Karatu da Rubutun Masu Motsa bayanai. Duk da haka, ba za ku iya canza mu'amala tsakanin mai sarrafa ku na waje da masu karantawa da Rubuce bayanai da aka saka cikin ƙirar ƙira ba.
TX Bawa
Tsarin TX Slave yana yada Avalon-MM yana karantawa kuma yana rubutawa sama. Masters Avalon-MM na waje, gami da mai sarrafa DMA, na iya samun damar ƙwaƙwalwar tsarin ta amfani da Bawan TX. Mai sarrafa DMA yana amfani da wannan hanyar don sabunta matsayin DMA a sama, ta amfani da TLPs na Saƙon Saƙo (MSI). RX Master (Tashar Cikin Gida don Sarrafa BAR0) Tsarin RX Jagora yana yada dword guda ɗaya karantawa da rubuta TLPs daga Tushen Port zuwa yankin Avalon-MM ta hanyar babban tashar Avalon-MM 32-bit. Software yana umurci Jagoran RX don aika sarrafawa, matsayi, da bayanin siffantawa ga bayi Avalon-MM, gami da bawa mai sarrafa DMA. Tashar tashar RX Master tashar jiragen ruwa ce ta ciki wacce ba a iya gani a cikin Platform Designer.

Aiki tare da Reference Design

Matsayin Ayyuka

Ƙirar ƙira tana amfani da tsarin shugabanci mai zuwa:

• top — Babban matakin module.
• top_hw- Babban-Mai tsara Platform Designer files. Idan kun canza ƙira ta amfani da Platform Designer, dole ne ku sake haɓaka tsarin don canje-canje suyi tasiri.

Saitunan sigar don PCI Express Hard IP Bambancin

Wannan ƙirar ƙira tana goyan bayan matsakaicin girman lodin byte 256. Tebur masu zuwa suna lissafin ƙimar duk sigogi.
Tebur 1. Saitunan Tsari

Siga	Daraja
Yawan hanyoyi	Intel Cyclone 10 GX: x4 Intel Arria 10, Intel Stratix 10: x8
Yawan layi	Intel Cyclone 10 GX: Gen2 (5.0 Gbps) Intel Arria 10 Intel Stratix 10: Gen3 (8.0 Gbps)
RX buffer bashi kasafi - aiki don buƙatun da aka karɓa	Intel Arria 10, Intel Cyclone 10 GX: Ƙananan Intel Stratix 10: Babu

Tebur 2.Base Address Register (BAR) Saituna

Siga	Daraja
BAR0	64-bit prefetchable ƙwaƙwalwar ajiya
BAR1	An kashe
BAR2	64-bit prefetchable ƙwaƙwalwar ajiya An kashe BAR2 don Intel Stratix 10
ci gaba…

Siga	Daraja
BAR3	An kashe
BAR4	64-bit prefetchable ƙwaƙwalwar ajiya An kashe BAR4 don Intel Arria 10 da Intel Cyclone 10 GX
BAR5	An kashe

Tebur 3. Saitunan Rajista na Gano Na'urar

Siga	Daraja
ID mai siyarwa	0 x00001172
ID na na'ura	0x0000E003 ku
ID na sake dubawa	0 x00000001
Lambar aji	0 x00000000
Subsystem ID mai siyarwa	0 x00000000
Subsystem Na'urar ID	0 x00000000

Table 4. PCI Express/PCI * Ƙarfi

Siga	Daraja
Matsakaicin girman nauyin kaya	256 Bytes
Tsawon lokacin ƙarewa	Babu
Aiwatar da Kashe Lokacin Karewa	An kunna

Tebur 5.Kuskuren Saitunan Rahoto

Siga	Daraja
Babban Rahoton Kuskure (AER)	An kunna
Tabbatar da ECRC	An kashe
Rahoton da aka ƙayyade na ECRC	An kashe

Tebur 6.Haɗin Saituna

Siga	Daraja
Lambar tashar tashar haɗin gwiwa	1
Tsarin agogon ramin	An kunna

Tebur 7. Katse Siginar Saƙo (MSI) da MSI-XSettings

Siga	Daraja
Adadin saƙonnin MSI da aka nema	4
Aiwatar da MSI-X	An kashe
Girman tebur	0
Tabarbarewar tebur	0 x0000000000000000
ci gaba…

Siga	Daraja
Table BAR nuna alama	0
Tsare-tsare mai jiran gado (PBA) biya diyya	0 x0000000000000000
Alamar PBA BAR	0

Tebur 8. Gudanar da Wuta

Siga	Daraja
Karshen L0s karbuwar jinkiri	Matsakaicin 64 ns
Ƙarshen Ƙarshen L1 karbuwar jinkiri	Matsakaicin mu 1

Tebur 9.PCIe Adireshin sarari Saitin

Siga	Daraja
Faɗin adireshi na sararin ƙwaƙwalwar ajiyar PCIe mai sauƙi	40

PCIe Avalon-MM DMA Reference Design Platform Designer Systems

Hotuna masu zuwa suna nuna tsarin Platform Designer na Intel Arria 10, Intel Cyclone 10 GX, da na'urorin Intel Stratix 10.
Hoto na 3. Intel Arria 10 GX DMA Reference Design Platform Designer System

Hoto 4.Intel Cyclone 10 GX GX DMA Reference Design Platform Designer System

Hoto 5. Intel Stratix 10 GX DMA Reference Design Platform Designer SystemZane na Intel Stratix 10 ya haɗa da abubuwan bututun bututu da dabaru na ketare agogo waɗanda babu su a cikin sauran na'urori.

Tebura 10.Bayyanawa Mai Zanen Dandali

Port	Aiki	Bayani
rxm_bar2 or rxm_bar4	Avalon-MM tashar jiragen ruwa	Wannan tashar tashar jirgin ruwa ce ta Avalon-MM. Mai watsa shiri na PCIe yana samun damar ƙwaƙwalwar ajiya ta hanyar PCIe BAR2 don Intel Arria 10 da Intel Cyclone 10 GX na'urorin. Mai watsa shiri yana samun damar ƙwaƙwalwar ajiya ta hanyar PCIe BAR4 don na'urorin Intel Stratix 10. Waɗannan BARs suna haɗi zuwa duka akan guntu da ƙwaƙwalwar ajiyar waje. A cikin aikace-aikace na yau da kullun, software na tsarin yana sarrafa wannan BAR don fara bazuwar bayanai a cikin ƙwaƙwalwar waje. Software kuma yana karanta bayanan baya don tabbatar da aiki daidai.
tx	TX Avalon-MM Bawan	Wannan tashar bawan Avalon-MM ce. A cikin aikace-aikace na yau da kullun, maigidan Avalon-MM yana sarrafa wannan tashar jiragen ruwa don aika ƙwaƙwalwar karantawa da rubutu zuwa yankin PCIe. Lokacin da DMA ta gama aiki, Mai Gudanar da Bayani yana amfani da wannan tashar jiragen ruwa don rubuta matsayin DMA baya zuwa tebur mai kwatanta a cikin yankin PCIe. Mai Kula da Bayanin kuma yana amfani da wannan tashar jiragen ruwa don aika MSI yana katsewa sama.
dma_rd_master	Karanta Data Mover	Wannan tashar tashar jirgin ruwa ce ta Avalon-MM. Mai karanta Data Mover yana amfani da wannan maigidan Avalon-MM don motsa bayanai daga yankin PCIe zuwa ko dai akan-guntu ko ƙwaƙwalwar waje. Mai karanta bayanan da aka karanta shima yana amfani da wannan tashar jiragen ruwa don debo masu siffantawa daga yankin PCIe kuma a rubuta su zuwa FIFO a cikin Mai Kula da Bayani. Ƙirar ta haɗa da tebur mai siffa daban don karantawa da rubuta bayanan. Saboda haka, tashar dma_rd_master ta haɗa zuwa wr_dts_slave don rubutaccen bayanin DMA FIFO da rd_dts_slave don karanta DMA siffanta FIFO.
dma_wr_master	Rubuta Data Mover	Wannan tashar tashar jirgin ruwa ce ta Avalon-MM. Mai Rubutun Bayanan Yana amfani da wannan Avalon-MM master don karanta bayanai daga ko dai akan guntu ko ƙwaƙwalwar waje sannan kuma rubuta bayanai zuwa yankin PCIe. Mai sarrafa ƙwaƙwalwar ajiya na waje RAM mai tashar jiragen ruwa guda ɗaya ne. Saboda haka, Rubutun Data Mover da Read Data Mover dole ne su raba wannan tashar jiragen ruwa don tantance ƙwaƙwalwar ajiyar waje.
wr_dts_bawa rd_dts_bawa	FIFO a cikin Mai Gudanar da Bayani	Waɗannan su ne tashoshin bayi na Avalon-MM don FIFOs a cikin Mai Kula da Bayani. Lokacin da Read Data Mover ya debo masu siffantawa daga ƙwaƙwalwar tsarin, Mai karanta Data Mover yana rubuta bayanan zuwa FIFO ta amfani da tashar wr_dts_slave da rd_dts_slave.
wr_dcm_master rd_dcm_master	Tsarin sarrafawa a cikin Mai Kula da Bayani	Tsarin sarrafa Mai Bayanin Bayani ya haɗa da aikawa ɗaya da ɗaya karɓar tashar jiragen ruwa don karantawa da rubuta DMAs. Tashar tashar karɓa tana haɗi zuwa RXM_BAR0. Tashar tashar watsawa tana haɗi zuwa txs. Hanyar karɓa daga RXM_BAR0 tana haɗa ciki. RXM_BAR0 ba a nuna shi a cikin rukunin haɗin da Mai tsara Platform Designer. Don hanyar watsawa, duka karantawa da rubuta tashoshin DMA suna haɗi zuwa txs a waje. Ana iya ganin waɗannan tashoshin jiragen ruwa a cikin ginshiƙan haɗin gwiwar Mai tsara Platform.
Haɗin ciki, ba a nuna ba	Avalon-MM tashar jiragen ruwa	Wannan tashar tashar jiragen ruwa ta Avalon-MM tana ba da damar ƙwaƙwalwar ajiya daga mai masaukin PCIe zuwa PCIe BAR0. Mai watsa shiri yana amfani da wannan tashar jiragen ruwa don tsara Mai Kula da Bayani. Saboda wannan ƙirar ƙira ta haɗa da Mai Kula da Bayani a matsayin ƙirar ciki, Mai tsara Platform baya nuna wannan tashar jiragen ruwa a kan babban matakin haɗin gwiwa.
onchip_memory2_0	64 KB Dual Port RAM	Wannan 64-KB dual-port on-chip memory. Kewayon adireshin shine 0x0800_0000-0x0800_FFFF akan motar Avalon-MM. Wannan adireshin shine tushen adireshin rubuta DMAs ko adireshin wurin da aka karanta DMAs. Don hana ɓarna bayanai, software tana rarraba ƙwaƙwalwar ajiya zuwa yankuna daban-daban don karatu da rubutu. Yankunan ba sa zoba.
Intel DDR3 ko DDR4 mai sarrafawa	DDR3 ko DDR4 Mai Gudanarwa	Wannan tashar tashar tashar DDR3 ce ko DDR4 mai sarrafawa.

Matakan Tsarin DMA

Software da ke gudana akan mai watsa shiri yana kammala matakai masu zuwa don fara DMA da tabbatar da sakamakon:

1. Software yana keɓance ƙwaƙwalwar tsarin don tebur mai kwatanta.
2. Software yana keɓance žwažwalwar ajiyar tsarin don canja wurin bayanai na DMA.
3. Software yana rubuta masu siffantawa zuwa tebur mai kwatanta a cikin ƙwaƙwalwar tsarin. DMA tana goyan bayan karantawa har zuwa 128 da 128 rubuta bayanan. Teburin siffantawa ya rubuta bayanan masu zuwa:
   1. ID mai siffantawa, daga 0-127
   2. Adireshin tushe
   3. Adireshin zuwa
   4. Girman
4.  Don DMA mai karantawa, software tana ƙaddamar da sararin ƙwaƙwalwar ajiyar tsarin tare da bayanan bazuwar. Mai karanta Data Mover yana motsa wannan bayanan daga ƙwaƙwalwar tsarin zuwa ko dai akan-chip ko ƙwaƙwalwar waje. Don rubuta DMA, software ɗin tana fara kunna guntu ko ƙwaƙwalwar waje tare da bayanan bazuwar. Mai Motsa Bayanan Rubutu yana motsa bayanai daga guntu ko ƙwaƙwalwar waje zuwa ƙwaƙwalwar tsarin.
5. Software yana shirye-shiryen yin rijistar a cikin tsarin sarrafawa na Descriptor Controller ta hanyar BAR0. Shirye-shiryen yana ƙayyadaddun adireshin tushe na tebur mai kwatanta a cikin ƙwaƙwalwar tsarin da adireshin tushe na FIFO wanda ke adana masu siffantawa a cikin FPGA.
6. Don fara DMA, software tana rubuta ID na mai siffantawa na ƙarshe zuwa dabarar sarrafawar Mai Bayani. DMA ta fara debo bayanan. DMA tana farawa da ID na mai siffata 0 kuma ta ƙare da ID na mai siffantawa na ƙarshe.
7. Bayan canja wurin bayanai don bayanin ƙarshe na ƙarshe, Mai Kula da Bayanin ya rubuta 1'b1 zuwa Done bit a cikin shigarwar tebur mai kwatanta wanda ya dace da mai siffa ta ƙarshe a cikin yankin PCIe ta amfani da tashar txs.
8. Software yana yin zaɓin An yi bit a cikin shigarwar tebur mai kwatanta daidai da mai siffantawa na ƙarshe. Bayan Mai Kula da DMA ya rubuta abin da aka yi bit, Mai Kula da DMA yana ƙididdige abin da aka samu. Software yana kwatanta bayanai a cikin ƙwaƙwalwar tsarin zuwa guntu ko ƙwaƙwalwar waje. Gwajin ya wuce idan babu kurakurai.
9. Don karantawa da rubutu lokaci guda, software tana fara aikin karanta DMA kafin rubuta aikin DMA. DMA tana cika lokacin da duk karantawa da rubuta DMAs suka ƙare.

Saita Hardware

1. Sauke lambar kwamfuta 1.
2. Toshe katin FPGA Development Kit a cikin ramin PCIe wanda ke goyan bayan Gen2 x4 ko Gen3 x8.
3. Don Intel Stratix 10 10 FPGA Development Kit, masu haɗin J26 da J27 suna kunna katin. Bayan shigar da katin a cikin ramin PCIe da ke akwai, haɗa 2×4- da 2×3-pin PCIe igiyoyin wutar lantarki daga wutar lantarki na lambar kwamfuta 1 zuwa J26 da J27 na katin PCIe, bi da bi.
4. Haɗa kebul na USB daga lambar kwamfuta 2 zuwa FPGA Development Kit. Kit ɗin Haɓakawa ya haɗa da kebul ɗin saukar da Intel FPGA don shirye-shiryen FPGA.
5. Don kunna FPGA Development Kit ta hanyar PCIe slot, iko akan lambar kwamfuta 1. A madadin, za ku iya kunna FPGA Development Kit ta amfani da adaftar wutar lantarki na waje wanda ke jigilar kaya tare da kit.
6. Don Kit ɗin Ci gaban Cyclone 10 GX FPGA, oscillator mai shirye-shirye akan allo shine tushen agogo don abubuwan kayan masarufi. Bi umarnin a Saitin Intel Cyclone 10 GX FPGA Programmable Oscillator don tsara wannan oscillator.
7. A lambar kwamfuta 2, kawo Intel Quartus Prime programmer kuma saita FPGA ta hanyar Intel FPGA Download Cable.
   Lura: Dole ne ku sake saita FPGA a duk lokacin da FPGA Development Kit ya rasa iko.
8. Don tilasta ƙidayar tsarin gano na'urar PCIe, sake kunna kwamfuta 1. Idan kana amfani da Intel Stratix 10 GX FPGA Development Kit, za ka iya samun saƙon kuskure mai zuwa yayin fara BIOS idan ƙwaƙwalwar taswirar I/O ta kasance 4 GB kawai: Rashin isa An Gano Albarkatun PCI. Don aiki akan wannan batu, kunna Sama 4G Decoding a cikin BIOS Boot menu.

Bayanai masu alaƙa

Shirya Intel Cyclone 10 GX FPGA Oscillator akan shafi na 12

• Shirya Intel Cyclone 10 GX FPGA Oscillator
• Kit ɗin Ci gaban Cyclone 10 GX na Intel ya haɗa da oscillator mai shirye-shirye wanda dole ne ku saita kafin ku iya aiwatar da ƙirar ƙira don na'urorin Intel Cyclone 10 GX. A ClockController GUI yana ba ku damar shigo da saitunan daidai.

1. Nemo hanyar haɗin Kit ɗin Lantarki (zip) a cikin Fannin Takardun Takaddun Kayan Aikin Haɓaka na Intel Cyclone 10 GX FPGA web shafi.
2. Yi amfani da wannan hanyar haɗin don zazzage cyclone-10-gx-kit-collateral.zip
3. Cire cyclone-10-gx-kit-collateral.zip zuwa kundin aiki akan lambar kwamfuta 2.
4. Don kawo akwatin magana mai sarrafa agogo, rubuta umarni masu zuwa: % cd /cyclone-10-gx-collateral/examples/board_test_system/% ./ClockController.sh
   Hoto 6.Clock Controller GUI a Jiha ta Farko
5. A cikin Clock Controller GUI, danna Shigo.
6. Yi lilo zuwa ga /cyclone-10-gx-collateral/examples/board_test_system/ directory kuma zaɓi U64-Registers.txt.
7. Don shigo da saitunan rajista, danna Buɗe.
   An shigo da saƙon, Taswirar Rajista Si5332 cikin nasara nuni. Ya kamata ku ga saitunan agogo da aka nuna a ƙasa.

Hoto 7. Saitunan agogo don Intel Cyclone 10 GX FPGA Development Kit

Bayanai masu alaƙa

Saita Hardware a shafi na 11

Shigar da Direban Gwajin DMA da Gudanar da Software na Linux DMA

1. A cikin taga tasha akan kwamfuta 1, canza zuwa directory directory DMA kuma cire AN829_driver.tar ta hanyar buga umarni masu zuwa: cd % / /_PCI DMA_ _project/driver% tar -xvf AN829_driver.tar
2. Don shigar da direban Linux don dangin na'urar da ta dace, rubuta umarnin:% sudo./install Ingantattun ƙimomi don sune aria10, cyclone10, da stratix10.
3. Don gudanar da aikace-aikacen DMA, rubuta umarni mai zuwa: %/gudu Aikace-aikacen yana buga umarnin da ke akwai don tantance zirga-zirgar DMA. Ta hanyar tsoho, software ɗin yana ba da damar karanta DMA, DMA ya rubuta, da DMA na lokaci ɗaya karantawa da rubutu. Tebu mai zuwa yana lissafin abubuwan da ke akwai:

Table 11.DMA Gwajin Umarnin

Lambar Umurni	Aiki
1	Fara DMA.
2	Kunna ko kashe karanta DMA.
3	Kunna ko kashe rubuta DMA.
4	Kunna ko kashe karantawa da rubuta DMA lokaci guda.
5	Saita adadin dwords kowane mai siffantawa. Matsakaicin doka shine 256-4096 dwords.
6	Saita adadin masu siffantawa. Kewayon doka shine masu siffantawa 1-127.
7	Ta hanyar tsoho, ƙirar ƙira tana zaɓar ƙwaƙwalwar ajiyar guntu. Idan zaɓi wannan umarni a jere yana gudana canzawa tsakanin guntu da ƙwaƙwalwar ajiyar waje.
8	Gudanar da DMA a cikin madauki mai ci gaba.
10	Fita

Don misaliample, rubuta waɗannan umarni masu zuwa don ƙayyade 4096 dwords kowane mai siffantawa da masu siffantawa 127: % 5 4096 % 6 127 % 8

Alkaluman da ke gaba suna nuna abin da aka fitar don karanta DMA, DMA ta rubuta, da kuma karantawa da rubutawa DMA lokaci guda:

Hoto 8. Ƙaddamarwar Intel Arria 10 DMA

Hoto 9. Intel Cyclone 10 GX DMA Abun WutaHoto 10. Intel Stratix 10 DMA Abun Wuta

Fahimtar Taimakon PCI Express

Abubuwan da aka samar a cikin tsarin PCI Express ya dogara da abubuwa masu zuwa:

• Ƙa'idar yarjejeniya
• Girman kaya
• Latency na ƙarshe
• Latency sabunta sarrafa kwarara
• Na'urorin da ke samar da hanyar haɗin gwiwa

Tsare-tsare na Protocol
Haɓaka ƙa'idar yarjejeniya ta ƙunshi abubuwa uku masu zuwa:

• 128b/130b Encoding da Decoding-Haɗin haɗin gwiwar Gen3 suna amfani da rufaffiyar 128b/130b. Wannan rufaffiyar tana ƙara ragowa guda biyu na aiki tare (daidaitawa) zuwa kowane canja wurin bayanai 128-bit. Sakamakon haka, faifan coding da yankewa sama da ƙasa kaɗan ne a 1.56%. Ingantacciyar ƙimar hanyar haɗin yanar gizo ta Gen3 x8 kusan gigabytes 8 ne a sakan daya (GBps).
• Fakitin Layer Data Link (DLLPs) da Fakitin Layer na Jiki (PLPs) -Haɗin haɗin gwiwa kuma yana watsa DLLPs da PLPs. PLPs sun ƙunshi saitin SKP da aka yi oda waɗanda suke
  16-24 bytes. DLLPs dwords biyu ne. DLLPs suna aiwatar da sarrafa kwarara da ka'idar ACK/NAK.
• TLP Packet Overhead - Babban abin da ke da alaƙa da TLP guda ɗaya ya fito daga 5-7 dwords idan ba a haɗa ECRC na zaɓi ba. Babban kuɗin ya haɗa da filayen masu zuwa:
  • Alamomin Farawa da Ƙarshe
  • ID ɗin Sequence
  • A 3- ko 4-dword TLP taken
  • Dubawa na Cyclic Redundancy Check (LCRC)
  • 0-1024 dwords na biya data
• Hoto 11. Tsarin Fakitin TLP

Fara 1 Byte

jeri 2 Bytes

Hoton TLP 3-4 DW

Kudin Data 0-1024 DW

Farashin ICRC 1 DW

Farashin LCRC 1 DW

Ƙarshe 1 Byte

Ƙaddamarwa don Rubutun da aka Buga

Matsakaicin ƙididdige abin da ake samu na ka'idar yana amfani da dabara mai zuwa: Abin da ake buƙata = girman abin biya / (girman kayan aiki + sama) * ƙimar bayanan haɗin gwiwa

Hoto 12. Matsakaicin Abubuwan Wuta don Rubutun Ƙwaƙwalwa

Jadawalin yana nuna matsakaicin abin da ake samarwa tare da taken TLP daban-daban da masu girman kaya. An cire DLLPs da PLPs daga wannan lissafin. Don matsakaicin girman nauyin kaya 256-byte da kan 3-dword kan sama dwords biyar ne. Saboda mahaɗin yana da 256 bits, taken 5-dword yana buƙatar zagayowar bas guda ɗaya. Matsakaicin nauyin 256-byte yana buƙatar hawan bas 8.

Ƙididdigar Ƙididdigar Ƙididdigar Ƙididdigar Ƙididdigar Ƙididdiga (x1)

Ma'auni mai zuwa yana nuna matsakaicin yawan kayan aikin ka'idarMatsakaicin fitarwa = 8 hawan keke/9 hawan keke = 88.88% * 8 GBps = 7.2 GBps

Ƙayyadaddun Girman Matsakaicin Matsakaicin Biyan Kuɗi

Rijistar Kula da Na'ura, ragowa [7:5], tana ƙayyadad da matsakaicin girman nauyin TLP na tsarin yanzu. Matsakaicin Girman Girman Biyan Kuɗi na rijistar Ƙarfin Na'urar, bits [2:0], yana ƙayyadad da matsakaicin ƙimar da aka halatta don ɗaukar kaya. Ka ƙididdige wannan siga-karanta-kawai, ana kiranta Matsakaicin Girman Ƙimar Biyan Kuɗi, ta amfani da editan siga. Bayan kayyade matsakaicin matsakaicin nauyin TLP na tsarin yanzu, software tana yin rikodin ƙimar hakan a cikin rajistar Kula da Na'ura. Wannan ƙimar dole ne ta zama ƙasa da matsakaicin nauyin da aka ƙayyade a cikin Matsakaicin Girman Girman Biyan kuɗi na rijistar Ƙarfin Na'urar.
Fahimtar Kulawar Yawo don PCI Express
Gudanar da kwarara yana ba da tabbacin cewa ba a watsa TLP sai dai idan mai karɓa yana da isasshen sarari don karɓar TLP. Akwai ƙididdiga daban-daban don masu kai da bayanan biyan kuɗi. Na'urar tana buƙatar isassun abin kai da kiredit na biya kafin aika TLP. Lokacin da Layer ɗin aikace-aikacen da ke cikin cikar ya karɓi TLP, yana 'yantar da sararin ajiyar RX a cikin Layer's Transaction Layer. Mai kammalawa yana aika fakitin sabuntawar gudana (FC Update DLLP) don cika kiredit ɗin da aka cinye ga mai farawa. Lokacin da na'ura ke cinye duk kiredit ɗin ta, ƙimar FC Sabunta DLLPs don sake cika kan kai da ƙididdige ƙimar ƙididdigewa. Sabuntawar sarrafa kwararar ya dogara da matsakaicin girman nauyin kaya da latencies na na'urori biyu da aka haɗa.

Kayan aiki don Karatu

PCI Express tana amfani da samfurin mu'amala mai tsaga don karantawa. Kasuwancin karantawa ya ƙunshi matakai masu zuwa:

1. Mai nema ya aika buƙatar karanta ƙwaƙwalwar ajiya.
2. Mai kammalawa yana aika ACK DLLP don amincewa da buƙatar karanta ƙwaƙwalwar ajiya.
3. Mai kammala yana dawo da Kammala da Bayanai. Mai kammalawa zai iya raba Kammala zuwa fakitin kammalawa da yawa.

Abubuwan da ake karantawa galibi suna ƙasa da abin da aka rubuta saboda karantawa yana buƙatar ma'amaloli biyu maimakon rubutu ɗaya don adadin bayanai iri ɗaya. Har ila yau, abin da ake karantawa ya dogara da jinkirin tafiya tsakanin lokacin da Application Layer ya ba da Buƙatar karanta Ƙwaƙwalwar ajiya da lokacin da bayanan da aka nema ke dawowa. Don haɓaka abubuwan da ake samarwa, aikace-aikacen dole ne ya fitar da isassun buƙatun karantawa don rufe wannan jinkiri.

Hoto 13. Karanta Buƙatar Lokaci

Hotunan da ke ƙasa suna nuna lokacin Buƙatun Karanta Ƙwaƙwalwar Ƙwaƙwalwa (MRD) da Kammalawa tare da Bayanai (CplD). Adadin farko ya nuna mai nema yana jiran kammalawa kafin ya ba da buƙatun na gaba. Sakamakon jira yana haifar da ƙananan kayan aiki. Adadi na biyu ya nuna mai buƙatar yin buƙatun karantawa da yawa don kawar da jinkiri bayan dawo da bayanan farko. Kawar da jinkiri yana haifar da mafi girma kayan aiki.

Don kiyaye iyakar abin da aka samar don cikakkun fakitin bayanai, mai nema dole ne ya inganta saitunan masu zuwa:

• Adadin kammalawa a cikin ma'ajin RX
• Adadin abin da Layer Application ya fitar yana karanta buƙatu da sarrafa bayanan kammalawa

Girman Buƙatar karantawa
Wani abin da ke shafar kayan aiki shine girman buƙatar karantawa. Idan mai nema yana buƙatar bayanan 4 KB, mai buƙatar na iya ba da buƙatun karantawa huɗu, 1 KB ko buƙatun karantawa KB guda 4. Buƙatun 4 KB yana haifar da mafi girma kayan aiki fiye da huɗu, 1 KB yana karantawa. Matsakaicin Girman Girman Buƙatar karantawa a cikin rijistar Kula da Na'ura, bits [14:12], yana ƙayyadadden girman buƙatar karantawa.
Bukatun Karatu Na Musamman
Abu na ƙarshe wanda zai iya rinjayar abin da ake samarwa shine yawan fitattun buƙatun karantawa. Idan mai nema ya aika buƙatun karantawa da yawa don inganta kayan aiki, adadin da ke akwai tags yana iyakance adadin fitattun buƙatun karantawa. Don cimma babban aiki, Intel Arria 10 da Intel Cyclone 10 GX karanta DMA na iya amfani da kai har zuwa 16. tags. Intel Stratix 10 karanta DMA na iya amfani da kai har zuwa 32 tags.

Fahimtar Ma'aunin Ma'auni

Don auna kayan aiki, direban software yana ɗaukar sau biyuamps. Software yana ɗaukar lokaci na farkoamp jim kadan bayan ka buga umarnin ./run. Software yana ɗaukar lokaci na biyuamp bayan DMA ta kammala kuma ta dawo da matsayin da ake buƙata, EPLAST. Idan karanta DMA, rubuta DMA kuma karanta da rubuta lokaci guda DMAs duk an kunna su, direban yana ɗaukar sau shida.amps don yin ma'auni uku.

Bambance-bambancen kayan aiki don Kan-Chip da Ƙwaƙwalwar Waje

Wannan ƙirar ƙira tana ba da zaɓi tsakanin ƙwaƙwalwar kan-chip da aka aiwatar a cikin masana'anta na FPGA da ƙwaƙwalwar waje da ake samu akan PCB. Ƙwaƙwalwar kan guntu tana goyan bayan karantawa da rubuta tashoshi daban-daban. Saboda haka, wannan ƙwaƙwalwar ajiyar tana goyan bayan karantawa da rubuta DMAs lokaci guda. Ƙwaƙwalwar ajiyar waje tana goyan bayan tashar jiragen ruwa guda ɗaya. Saboda haka, ƙwaƙwalwar ajiyar waje baya goyan bayan karanta DMA lokaci guda da rubuta damar shiga DMA. Bugu da kari, latency na waje ƙwaƙwalwar ajiya ya fi latency na on-chip memory. Waɗannan bambance-bambancen guda biyu tsakanin guntu da ƙwaƙwalwar waje suna haifar da ƙananan kayan aiki don aiwatar da ƙwaƙwalwar ajiyar waje. Don kwatanta abin da ake fitarwa don on-chip da ƙwaƙwalwar waje, zaɓi umarni 7 don gudana a jere don canzawa tsakanin kunna-chip da ƙwaƙwalwar waje.

Tarihin Bita na Takardu don AN 829: PCI Express Avalon-MM DMA Reference Design

Sigar Takardu	Intel Quartus Prime Version	Canje-canje
2018.06.11	18.0	Sakin farko.

AN 829: PCI Express* Avalon®-MM DMA Reference Design 22

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intel AN 829 PCI Express* Avalon MM DMA Reference Design [pdf] Jagorar mai amfani AN 829 PCI Express Avalon MM DMA Reference Design, AN 829, PCI Express Avalon MM DMA Reference Design, Express Avalon MM DMA Design Design

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