Intel Manuals & User Guides

intel oneAPI Base Toolkit Helps SonoScape Optimize the Performance of its S-Fetus 4.0 Obstetric Screening Assistant User Guide

December 13, 2022

Solution Brief Health & Life Sciences oneAPI Base Toolkit Helps SonoScape Optimize the Performance of its S-Fetus 4.0 Obstetric Screening Assistant User Guide oneAPI Base Toolkit Helps SonoScape Optimize the…

intel Optane Persistent Memory and SAP HANA Platform Configuration on VMware ESXi User Guide

December 13, 2022

intel Optane Persistent Memory and SAP HANA Platform Configuration on VMware ESXi overview Technology overview and deployment guidelines for using Intel Optane persistent memory with the SAP HANA platform on…

intel MAX 10 Power Management User Guide

December 12, 2022

intel MAX 10 Power Management The value of the transient current is based on the zero decoupling capacitance on the characterization board. The observed value will be less than the…

F-Tile Interlaken Intel FPGA IP Design Example User Guide

December 11, 2022

F-Tile Interlaken Intel FPGA IP Design Example Quick Start Guide The F-Tile Interlaken Intel® FPGA IP core provides a simulation testbench. A hardware design example that supports compilation and hardware…

intel Migration Guidelines from Arria 10 to Stratix 10 for 10G Ethernet Subsystem User Guide

December 9, 2022

intel Migration Guidelines from Arria 10 to Stratix 10 for 10G Ethernet Subsystem Migration Guidelines from Intel® Arria® 10 to Intel® Stratix® 10 for 10G Ethernet Subsystem The Low Latency…

intel F-Tile Interlaken FPGA IPDesign Example User Guide

December 9, 2022

intel F-Tile Interlaken FPGA IPDesign Example User Guide   Updated for Intel® Quartus® Prime Design Suite: 21.4 IP Version: 3.1.0 1. Quick Start Guide The F-Tile Interlaken Intel® FPGA IP…

intel Erasure Decoder Reference Design Instructions

December 8, 2022

intel Erasure Decoder Reference Design Updated for Intel® Quartus® Prime Design Suite: 17.0 ID: 683099 Version: 2017.05.02 About the Erasure Decoder Reference Design The Erasure Decoder is a particular type…

intel Interlaken 2nd Gen FPGA IP Release Notes Instructions

December 8, 2022

intel Interlaken 2nd Gen FPGA IP Release Notes Interlaken (2nd Generation) Intel® FPGA IP Release Notes If a release note is not available for a specific IP core version, the…

intel Nios II Embedded Design Suite Release Notes Instructions

December 8, 2022

intel Nios II Embedded Design Suite Release Notes Nios II Embedded Design Suite Release Notes These release notes cover versions 13.1 through 15.0 of the Altera® Nios® II Embedded Design…

intel FPGA Programmable Acceleration Card N3000 User Guide

December 8, 2022

intel FPGA Programmable Acceleration Card N3000 User Guide Introduction Background The Intel FPGA Programmable Acceleration Card N3000 in a virtualized radio access network (vRAN) requires support for the IEEE1588v2 as…

F-Tile Serial Lite IV Intel FPGA IP

User Guide

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F tile Architecture and PMA and FEC Direct PHY IP

User Guide

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SDI II FPGA IP Core

User Guide

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Quartus Prime Pro Edition Timing Analyzer

User Guide

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SDI II Arria 10 FPGA IP

User Guide

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UG-OCL009 FPGA SDK for OpenCL

User Guide

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SDI II Cyclone 10 GX FPGA IP Design Example

User Guide

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F-Tile Avalon Streaming FPGA IP for PCI Express

User Guide

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SDI II Stratix 10 FPGA IP Design Example

User Guide

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Agilex Hard Processor System Remote System

User Guide

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Stratix 10 Hard Processor System Remote System

User Guide

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Video and Vision Processing Suite Intel FPGA IP

User Guide

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