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Qorvo PAC5556AEVK2 Evaluation

Qorvo-PAC5556AEVK2-Evaluation-Module-PRODUCT

Specifications:

  • Model: PAC5556AEVK2
  • Manufacturer: Qorvo
  • Power Input: 110-220 VAC Nominal (Max 240 VAC, 450 VDC)
  • LEDs: D2 for VSYS (5V) status
  • Connectors: J1 for SWD Debugging, J4 for Communications, J15/J5 for Hall Sensor

Product Usage Instructions:

  • Power Input:
    Apply power to the J6 terminal block connector. Ensure power does not exceed 240 VAC or 450 VDC.
  • LED’s:
    When operational voltage is applied, LED D2 will indicate the VSYS (5V) rail is active.
  • SWD Debugging:
    Use connector J1 for SWD port line access. Refer to the pinout for proper connections.
  • Communications:
    Connector J4 provides access to the UART port lines for communication purposes.
  • Hall Sensor:
    J15 terminal block and J5 header offer access to hall sensor resources on PORTE for commutation purposes.

Overview

Qorvo’s PAC5556AEVK2 development platform is a complete hardware solution enabling users not only to evaluate the PAC5556A device, but also develop power applications revolving around this powerful and versatile ARM® Cortex®-M4F based microcontroller. The module contains a PAC5556A Power Application Controller® (MCU) and all the necessary circuitry to properly energize the MCU and its internal peripherals once power is applied. The PAC5556AEVK2 features new GaN power switches as offered by Cambridge GaN Devices ICeGaN power transistor. ICeGaN HEMT power transistors enjoy easy-to-drive MOSFET compatible gate drive, integrated Miller Clamp, and integrated current sense function, eliminating the need for expensive and bulky, separate current sense resistors. To aid in the application development, the PAC5556AEVK2 offers access to every one of the PAC5556A device’s signals using a series of male header connectors.

The PAC5556AEVK2 also contains access to an external USB to UART module enabling users to connect the evaluation module to a PC through a conventional Virtual COM Port which can then be used in the communication efforts by taking advantage of the PAC5556A’s UART interface. Graphical User Interface (GUI) software suites can be employed to externally control particular application features. Finally, the PAC5556AEVK2 module gives access to the PAC5556A’s SWD and JTAG ports allowing users to both program the application into the device’s FLASH memory, as well as debug the application in real-time. The provided 4-pin connector is compatible with a decent variety of SWD based debugger/programmer modules, widely available. In parallel, a MIPI20 connector is made available that provides SWD, JTAG, and TRACE functionality, greatly expanding the existing debugging capabilities.

Qorvo’s PAC5556AEVK2 evaluation kit consists of the following:•

  • PAC5556AEVK2 evaluation module
  • PAC5556AEVK2 User’s Guide
  • Schematics, BOM, and Layout DrawingsQorvo-PAC5556AEVK2-Evaluation-Module-FIG (2)

Solution Benefits:

  • Ideal for High Voltage (110/220 VAC nominal, up to 450VDC Abs Max) general-purpose power applications and controllers
  • Single-IC PAC5556A with PWM outputs, ADC inputs, I2C, UART, SPI and GPIO.
  • The gate driving for up to three half-HH Bridge (tri-phase) inverters.
  • Three PWM DACs for real-time debugging.
  • Hall Sensor Interface for sensored applications.
  • Current and Voltage sensing for sensorless applications.
  • Schematics, BOM, and Layout drawings are available

The following sections provide information about the hardware features of Qorvo’s PAC5556AEVK2 turnkey solution.

Pinout and Signal Connectivity

The following diagram shows the male header pinout for the PAC5556AEVK2 evaluation module, as seen above:

Qorvo-PAC5556AEVK2-Evaluation-Module-FIG (1)

Power Input

Power to the PAC5556AEVK2 evaluation module can be applied to the J6 three-position terminal block connector. Power to the PAC5556AEVK2 evaluation module should not exceed 240 VAC (450 VDC Abs Max). The PAC5556AEVK2 is optimized to operate with voltages ranging from 110 VAC to 220 VAC Nominal. When the rectified input voltage (VM) goes above around 85 VDC, the system’s High Voltage Buck Converter is powered up and the device exits UVLO protection. At this time all subsystems, including internal voltage regulators, analog front end, and microcontroller, are enabled.

LED’s

When an operational voltage is applied, LED D2 will light up. This is the LED that notifies the VSYS (5V) rail is up and running. VP (15V gate drive), 3.3V (for analog circuitry), and 1.2V (for CPU core) regulators will also be operating at this point. The module is ready for use. The following table shows the provided LED and its associated diagnostic function.

LED Description
D2 VSYS (5V). Light up when the PAC5556A device is successfully powered up by VM.

SWD Debugging

 Connector J1 offers access to the PAC5556A SWD port lines.

J1 Pin Terminal Description
1 + VCCIO (3.3V)
2 SD SWD Serial Data (PF1)
3 CL SWD Serial Clock (PF0)
4 GND (System Ground)

Communications

 Connector J4 offers access to the PAC5556A UART port lines.

J4 Pin Terminal Description
1 + VCCIO (default is 5V)
2 RX MCU Receive Line (PE3)
3 TX MCU Transmit Line (PE2)
4 GND (System Ground)

Hall Sensor

Terminal Block J15 offers access to the PAC5556A resources on PORTE utilized for hall sensor-based commutation. Mimicking the same signal structure, 0.100” spacing header J5 offers quick access to the hall sensor inputs.

J15/J5 Pin Terminal Description
1 + VCCIO (3.3V)
2 Hall Sensor U PORTE4
3 Hall Sensor V PORTE5
4 Hall Sensor W PORTE6
5 GND GND (System Ground)

SET UP

The setup for the PAC5556AEVK2 evaluation module requires up to four simple connections.

  1. Connect the 3 Phase BLDC/PMSM motor via space tab connectors PHASE U, PHASE V, and PHASE W.
  2. If Serial Communications are desired, connect the USB to the UART module 4-pin connection to J4.
  3. For debugging/programming, connect a suitable USB SWD module to J1 by using a standard 4-wire cable.
  4. Connect rectified DC voltage to screw terminals VM and GND.
    NOTE: Due to the high voltage nature of this board, it is highly recommended for all connections to be made before applying power. Once the rectified input voltage goes above 85VDC, the PAC5556A’s Multi-Mode Power Manager will be engaged and the VSYS (5V) regulator will be enabled. This event will result in LED D2 lighting up.
  5. PAC5556AEVK2 Evaluation Module ConnectionsQorvo-PAC5556AEVK2-Evaluation-Module-FIG (3)
  6. NOTE IDE Debugger not included. EVK module will vary.Qorvo-PAC5556AEVK2-Evaluation-Module-FIG (4)

INCLUDED COMPONENTS

Qorvo-PAC5556AEVK2-Evaluation-Module-FIG (5)

REVISION HISTORY

Revision Description
Rev 1.0 Initial release

Contact Information

For the latest specifications, additional product information, worldwide sales and distribution locations:

Important Notice

The information contained herein is believed to be reliable; however, Qorvo makes no warranties regarding the information contained herein and assumes no responsibility or liability whatsoever for the use of the information contained herein. All information contained herein is subject to change without notice. Customers should obtain and verify the latest relevant information before placing orders for Qorvo products. The information contained herein or any use of such information does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any other intellectual property rights, whether about such information itself or anything described by such information.

THIS INFORMATION DOES NOT CONSTITUTE A WARRANTY CONCERNING THE PRODUCTS DESCRIBED HEREIN, AND QORVO HEREBY DISCLAIMS ANY AND ALL WARRANTIES CONCERNING SUCH PRODUCTS WHETHER EXPRESS OR IMPLIED BY LAW, COURSE OF DEALING, COURSE OF PERFORMANCE, USAGE OF TRADE, OR OTHERWISE, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
Without limiting the generality of the foregoing, Qorvo products are not warranted or authorized for use as critical components in medical, life-saving, or life-sustaining applications, or other applications where a failure would reasonably be expected to cause severe personal injury or death.

FAQS

  • Q: What is the maximum power input for the PAC5556AEVK2?
    A: The maximum power input should not exceed 240 VAC or 450 VDC.
  • Q: How can I tell if the device is powered up?
    A: LED D2 will light up when the device is successfully powered up by VM

Documents / Resources

Qorvo PAC5556AEVK2 Evaluation Module [pdf] User Guide
PAC5556AEVK2 Evaluation Module, PAC5556AEVK2, Evaluation Module, Module

References

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