4D RADAR - S32R41+TEF82XX DEVELOPMENT PLATFORM OVERVIEW
Introduction
Presented by: Vincent Guan, Senior Application Engineer
Date: April 2023
Status: PUBLIC
Disclaimer: NXP, the NXP logo, and NXP Secure Connections for a Smarter World are trademarks of NXP B.V. All other product or service names are the property of their respective owners. © 2023 NXP B.V.
S32R41 - Automotive 4D Radar Processor
The S32R41 is a radar microprocessor unit (MPU) dedicated to advanced 77 GHz radar applications. Its architecture features Arm® Cortex®-A53 and Cortex-M7 cores, combined with dedicated radar processing accelerators to create an optimal radar processing chain. It is designed for automotive, industrial, and consumer radar applications.
The comprehensive feature set enables the S32R41 family to meet the requirements of advanced high-resolution corner and front radar applications. High-performance processing, coupled with Dual MIPI CSI interfaces and 8MB of local SRAM, supports high-resolution radar systems required for L2 Autonomous driving applications and beyond. The S32R41's architecture is part of NXP's scalable radar portfolio, facilitating scalable software reuse and reduced development complexity.
Key Specifications:
Feature | Specification |
---|---|
High Performance Safe Compute | Arm Cortex-A53 @800 MHz; 2x Arm Cortex-M7 @400 MHz with lockstep core configuration (ASIL D capable) |
Radar Processing Acceleration | SPT 3.5 @600 MHz with integrated DSP |
Integration with NXP Radar MMIC's | 2x MIPI CSI2 to connect to NXP TEF82xx |
Memory Capacity | 8 MB SRAM with ECC |
Future Proof Security | ISO21434 compliant product development; In-field updatable Hardware Security Engine (HSE) with comprehensive feature set |
Designed with Safety in Mind | ISO26262 SEooC ASIL B(D) |
Connected and Scalable | 2x Ethernet interfaces: 1x RGMII (1000 Mbit/s), 1x RMII (100 Mbit/s); 2x FlexCAN with FD |
Full Grade1 Temperature Range Operation | -40 °C to 150 °C (Tj) AEC-Q100 Grade-1 |
Other Features | 1x SAR ADC with 8 channels |
Product Longevity Program | Ensures a stable supply of products for embedded designs |
S32R41 Architecture Overview:
The S32R41 processor integrates multiple core components: a high-performance Arm Cortex-A53 core and two Arm Cortex-M7 cores (with lockstep configuration for ASIL D capability). It includes a dedicated SPT 3.5 radar processing accelerator with an integrated DSP. Connectivity is provided via dual MIPI CSI2 interfaces for NXP TEF82xx integration, two Ethernet interfaces (RGMII and RMII), and two FlexCAN with FD ports. Memory includes 8 MB of SRAM with ECC. Security features are handled by an in-field updatable Hardware Security Engine (HSE) compliant with ISO21434 and ISO26262 SEooC ASIL B(D). It also features a SAR ADC with 8 channels and operates across a wide temperature range (-40 °C to 150 °C Tj) as per AEC-Q100 Grade-1. The product is part of NXP's Product Longevity program.
TEF82XX - Fully Integrated 77 GHz RFCMOS Automotive Radar Transceiver
The TEF82xx RFCMOS automotive radar transceiver is a high-performance, single-chip, low-power automotive FMCW radar transceiver covering the full automotive radar frequency band from 76 GHz to 81 GHz. Entry NCAP sensor applications up to autonomous driving L2+ and beyond are enabled by this 2nd generation scalable transceiver, supporting short, medium, and long-range radar applications, including cascaded high-resolution imaging radar. This fully integrated RFCMOS chip contains 3 transmitters, 4 receivers, ADC conversion, a phase rotator, and a low-phase-noise VCO.
The TEF82xx is an ISO 26262 compliant device targeting ASIL Level B, which is optimized for fast chirp modulation and is fully compatible with NXP S32R29x, S32R41x, and S32R45x radar microcontrollers and processors.
Key Specifications:
Feature | Specification |
---|---|
Highly Integrated Transceiver | Integrates up to 3 transmit and 4 receive channels; Integrates VCO, PLL, and ADCs; Supports BPSK and QPSK; 6-bit phase rotator; MIMO Radar operation; Optimized for Fast Chirp Modulation. |
Wide Frequency Range | Operates in 76 GHz to 81 GHz band |
Wide Bandwidth | Flexible chirp bandwidth up to 5 GHz; Effective bandwidth up to 4 GHz |
High Performance | Enhanced RF performance with power output of 13.5 dBm; Low Noise figure: 11.5 dB; Low phase noise: -95 dBc/Hz at 1 MHz |
Very Low Power | 1.5 W power dissipation for a 2Tx channel, 50% duty cycle operation |
Scalable Applications | Supports short to long range applications; Cascaded imaging radar supported |
Small Package | e-WLB exposed die package for excellent thermal performance; Very small footprint of 7.5 mm x 7.5 mm |
Flexible Host Interfaces | CSI-2-DPHY and LVDS MCU interface for data transfer; Full-duplex SPI for control and monitoring |
ASIL B Functional Safety | Developed in accordance with ISO26262 SEooC methodology; Built-in functional safety monitoring circuit |
Automotive Quality | AEC-Q100 |
Wide Automotive Temperature Range | -40 °C to 135 °C junction temperature |
TEF82xx MMIC Architecture Overview:
The TEF82xx MMIC features an integrated transceiver with up to 3 transmit (Tx) and 4 receive (Rx) channels. It includes ADCs for signal conversion, a phase rotator, a low-phase-noise VCO, and a serializer/LVDS CSI2 interface. A Phase Rotator block is shown, along with a Timing Engine, Waveform Generator, and Functional Safety block. It supports Xtal Osc. and has an Expansion Interface with SPI. The device is designed for ASIL B functional safety and is AEC-Q100 qualified.
Software Enablement for S32R41 and TEF82XX
Tools:
- S32 Design Studio for S32 Platform (includes Pin MUX tool, Clock tool, peripheral tool, Configuration tool, S32Debugger)
- Radar extension package
- BBE Add-on package
- SPT Model-based Design Tool
- S32 Flash Tool
Software Categories:
Standard SW:
- RADAR SDK: Enablement for radar signal acquisition and processing
- Real Time Drivers (RTD) for AUTOSAR/Non-AUTOSAR applications (including SBC devices like PMIC, CAN trcv, ETH trcv)
- Security FW
- Safety Peripheral Drivers (SPD)
- Inter-Platform Communication Framework (IPCF)
- NXP RTOS
Reference SW:
- TCP/IP Stack
- NXP Platform Integration SW Examples
- Zephyr OS
- S32R41+TEF82xx Development Platform
Premium SW:
- Premium Radar SDK: Advanced radar processing algorithms
- Premium Security FW: Custom OEM FW available on request
- Premium Safety SW: Safety Software Framework (SAF), Structural Core Self Test (SCST A53)
- SPT Assembler Safety Qualification Kit
S32R41+TEF82XX Development Platform Overview
The S32R41+TEF82xx Development Platform is designed to help users start Radar development quickly and easily. It provides a hardware platform and an example software project integrating NXP software components:
- S32R41 A53 Zephyr BSP
- S32R41 Radar SDK (RSDK)
- S32R41 Real Time Drivers (RTD)
- Inter-Platform Communication Framework (IPCF)
- Safety Software Framework (SAF)
- NXP Real Time Operation System (RTOS)
Hardware Components:
The platform consists of the S32R41 Evaluation Board (EVB) and the TEF82xx Customer Antenna Board. The EVB features Ethernet, LED, Micro-USB, and JTAG connectors, along with power input. The TEF82xx board is the customer antenna board.
Block Diagram – V1.1 Release
This diagram illustrates the system architecture and software flow for the S32R41 EVB + TEF82xx CAB. It shows the interaction between PC Tools (Terminal emulator, MATLAB, Trace32 scripts), the S32R41 processor cores (A53, CM7_0, CM7_1), and various software components like Radar SDK, Zephyr BSP, RTD, IPCF, SAF/SPD, and NXP RTOS. The diagram categorizes software into S32R41 Standard Software, S32R41 Premium Software, Release contents, and 3rd Party components. It highlights connections via USB, GB ETH, and JTAG.
Key Features
- Single and dual-cascaded TEF82XX initialization, configuration, and control.
- Standard Radar signal processing chain for 512s*128c*4ch/8ch configurations.
- Zephyr BSP, RSDK, and IPCF integration on A53; SAF integration on CM7.
- Radar data dumping via GB ETH and MATLAB-based visualizer.
- A command-line Shell for user interaction via UART.
- Lauterbach Trace32 scripts and NXP S32 Debug Probe configurations for deployment, running, and debugging.
Software Requirements
Title | Version | Description | Download |
---|---|---|---|
S32 Design Studio | SW32R41_S32DS_3.5_D2207 | Eclipse-based IDE with GCC, GDB for building and debugging projects. | S32R41 Radar Processor | NXP Semiconductors |
S32R41 support in S32 Design Studio | SW32R41_S32DS_3.5_D2207 | Development Package with gcc toolchain and generic S32R41 processor support. | |
SW32SAF85xx_S32R41_RTD_4.4_0.9.0_HF01_D2211 | S32R41 Real Time Drivers, includes IVT Tool for S32R41. | ||
SW32R41_S32DS_RADAR_1.0.0.EAR5_D2208 | Radar Extension package, contains SPT assembler for S32R41. | ||
SW32R41_S32DS_BBE32_1.0.0.EAR5_D2208* | BBE32 DSP Add-On Package, contains Xtensa BBE32 toolchain for S32R41. | ||
S32R41 ZEPHYR BSP | S32R41_SPD_0.9.0 (or S32R41_SAF_0.9.0) | Safety Peripheral Drivers (Safety Software Framework) for S32R41. | |
SW32SAF85_S32R41_XJA11XX_ETH_PHY_4.4_1.0.1_D2211 | NXP XJA11XX Ethernet PHY Real Time Drivers for S32R41. | ||
S32R41_IPCF_0.9.1_D2301 | Inter-Platform Communication Framework (IPCF) for S32R1. | ||
SW32R41_RTOS_4_4_CD2_0_8_1_HF2_D2212 | NXP RTOS (AUTOSAR compliant) for S32R41. | ||
SW32R41_AZ_2.7.2_0.9.0_HF01_D2302 | NXP Zephyr RTOS BSP for S32R41. | ||
S32R41 Radar SDK | SWS32R41_Radar_SDK_0_9_0_D2211 | Radar SDK software for S32R41. | |
Trace32 | Software Version: N.2021.09.000140094; Trace32 PowerView Update 150201 or later | Lauterbach software for debugging. | www.lauterbach.com |
TeraTerm or PuTTY | Any | Serial terminal emulator program for host PC. | www.teraterm.org, www.putty.org |
MATLAB | R2021a equipped with Instrument Control Toolbox | Radar Visualizer scripts are only tested on MATLAB R2021a. | www.mathworks.com |
*The BBE32 DSP toolchain is added to the S32 Design Studio by installing this add-on. The S32DS BBE32 DSP add-on package is available from NXP software portal upon request. The package integrates the Xtensa Software Developers Toolkit (Certified ISO 26262 Compliant Compiler Toolchain). The license for the toolkit is available to order from NXP.
Supported Debugger
Debugger Options | Version | Description | Download/Order |
---|---|---|---|
Lauterbach | Host interface module: LA3500; Debug cable: LA7843; LA-3743: license for Cortex-A/R (ARMv8 32/64-bit); LA-7844: license for Cortex-M (ARMv7/8 32-bit) | Host PC software to control Lauterbach debugger. Licensing requirements: ARMv8-A/R, Cortex-M, XTENSA. | www.lauterbach.com |
NXP S32 Debug Probe | N/A | Enables NXP target system debugging via a standard debug port connected to a developer's workstation via Ethernet or USB. May be referred to as a probe, JTAG probe, JTAG emulator, or target probe. | S32 Debug Probe | NXP Semiconductors |
Lauterbach Highlights: USB3.0 interface, connects to target via TRACE32 Debug Cable or CombiProbe, supports various core architectures (ARC, Arm Cortex, Power Architecture, RISC-V, TriCore, Xtensa), trigger connector. Debugger for Cortex-A/R (Armv7 32-bit), supports 5-pin standard JTAG, CJTAG, and Serial Wire Debug Port (0.4 V-5V). Includes software for Windows, Linux, and MacOSX. Requires Power Debug Module. CJTAG and SWD require Power Debug Interface USB 2.0/USB 3.0, Power Debug Ethernet, PowerTrace, Power Debug II, or PowerDebug PRO.
NXP S32 Debug Probe Highlights: Supports Armv7-A/R based Cortex-A and Cortex-R 32-bit cores. Supports CJTAG and SWD.
Live Demonstration
Hardware Setup:
The hardware setup involves connecting the NXP evaluation board (S32R41 EVB) to a PC. Power is supplied via a +12V connection. Communication between the board and the PC is established using an Ethernet Cable and a UART-USB Cable. The PC is used for visualizing radar data via MATLAB and interacting with the radar board via a terminal emulator.
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NXP, the NXP logo, and NXP Secure Connections for a Smarter World are trademarks of NXP B.V. All other product or service names are the property of their respective owners. © 2023 NXP B.V.