NXP FS26 Safety System Basis Chip with Low Power for ASIL D / ASIL B

Rev. 3 - 14 March 2023

1 About this document

This Product brief provides an overview and summary for evaluating the FS26 product for design suitability. It is intended for quick reference and not as a source of detailed, full information. Content is extracted from the product's full data sheet, which prevails in case of any inconsistency or conflict. For comprehensive details, refer to the FS26 full data sheet available via the NXP Secure Files content interface.

2 General description

The FS26 automotive safety System Basis Chip (SBC) family is designed to support entry and mid-range safety microcontrollers, such as those in the S32K3 series. These devices offer multiple power supplies and flexibility for integration with microcontrollers used in automotive electrification. Applications include power train, chassis, safety, and low-end gateway technologies.

The FS26 family comprises pin-to-pin and software-compatible versions supporting Automotive Safety Integrity Levels (ASIL) B or D. Options include variations in output rails, voltage settings, operating frequencies, power-up sequencing, and integrated system features.

Key features include multiple switch-mode regulators and low-dropout (LDO) voltage regulators to supply the microcontroller, sensors, peripherals, and communication interfaces. It provides a high-precision reference voltage supply and two independent tracking regulators. Additional functionalities include an analog multiplexer, General Purpose Input/Outputs (GPIOs), and selectable wake-up events via I/O, long duration timer, or Serial-Peripheral Interface (SPI).

Developed in compliance with the ISO26262 standard, the FS26 incorporates enhanced safety features with multiple fail-safe outputs. It utilizes on-demand latent fault monitoring and can be part of a safety-oriented system partitioning scheme for both ASIL B and ASIL D safety integrity levels.

3 Features and benefits

Operating range

Maximum input voltage: 40 V DC
Support for operating voltage down to 3.2 V with VBST
Support for operating voltage down to 6 V without VBST
Low Power OFF mode: 30 µA quiescent current
Low Power Standby mode: 29 µA quiescent current with VPRE active. LDO1 or LDO2 activation selectable via OTP configuration; GPIO1 or GPIO2 activation selectable via SPI communication.

Power supplies

VPRE: Synchronous buck converter with integrated FETs. Configurable output voltage and switching frequency, up to 1.5 A DC current, and PFM mode for Low Power Standby.
VCORE: Synchronous buck converter with integrated FETs for microcontroller core supply. Output DC current up to 0.8 A or 1.65 A (part number dependent), with output voltage range from 0.8 V to 3.35 V.
VBST: Asynchronous boost controller with external components. Configurable as a front-end supply for low-voltage cranking profiles or a back-end supply with configurable output voltage and scalable DC current.
LDO1: LDO regulator for microcontroller I/O, with selectable output voltage (3.3 V or 5.0 V) and up to 400 mA current capability.
LDO2: LDO regulator for system peripherals, with selectable output voltage (3.3 V or 5.0 V) and up to 400 mA current capability.
VREF: High-precision reference voltage with 0.75% accuracy for External ADC reference and internal tracking.
TRK1 and TRK2: Voltage tracking regulators with selectable output voltage (VREF, LDO2, or Internal LDO reference). Support high-voltage protection for ECU off-board operation. Each tracker has up to 150 mA current capability.

System support

Two wake-up inputs with high-voltage support.
Two programmable GPIO with wake-up capability or HS/LS driver.
Programmable long duration timer (LDT) for system shutdown and wake-up control.
System voltage monitoring (including Battery voltage) via analog multiplexer.
Selectable wake-up sources: WAKE/GPIO pins, LDT, or SPI activity.
Device control via 32-bit SPI interface with cyclic redundancy checks (CRC).

Compliance

Electromagnetic compatibility (EMC) optimization techniques for switching regulators (spread spectrum, slew rate control, manual frequency tuning).
Electromagnetic interference (EMI) robustness supporting automotive EMI test standards.

Functional safety

Scalable portfolio from ASIL B to ASIL D.
Independent monitoring circuitry, dedicated interface for microcontroller monitoring, and simple/challenger watchdog functions.
Analog Built-In Self-Test (ABIST) and Logical Built-In Self-Test (LBIST) at startup.
Analog Built-In Self-Test (ABIST) on demand.
Safety outputs with latent fault detection mechanism (RSTB, FS0B, FS1B).

Configuration and enablement

LQFP48 package with exposed pad for optimized thermal management.
Permanent device customization via one-time programmable (OTP) fuse memory.
OTP Emulation mode for hardware development and evaluation.
Debug mode for software development, MCU programming, and debugging.

4 Applications

xEV and powertrain market

Inverter
Onboard charger (OBC), DCDC
Battery management system (BMS)
Belt starter generator (BSG)

Body market

Gateway
Zonal control
Body controller
Smart junction box

Safety and chassis

Suspension
Power steering

MCU attach

NXP S32K3 family
Infineon AURIX family (TC2xx and TC3xx)
Renesas RH850 family
Cypress Traveo family

5 Ordering information

This section details available part numbers, their differences, and the part number construction.

5.1 Part number definition

The FS26xyz part number structure defines the available feature set for each device. The numbering scheme includes fields for Release Type, Family, Product Core, Release Version, Temperature, Functional/Parametric Variant, ASIL level, PMIC Solution, FS1b/LDT features, and Package.

Figure 2. Part number breakdown: Illustrates the structure of the part number, showing how each character or group of characters corresponds to specific features like ASIL level (B or D), FS1b/LDT presence (0-3), and PMIC solution (0-3 indicating Vcore current and number of trackers).

Figure 3. Part number mapping versus features set: A table mapping specific FS26 part numbers (e.g., FS2600B, FS2610D) to their corresponding features, including Vcore current, number of trackers, and ASIL level.

5.2 Part number list

Table 1. Device segmentation: Lists various FS26 part numbers with their corresponding DEV_ID, Tracker 2 Capability, Core Current, Long Duration Timer, FS1B, ABIST, Watchdog Type, Fault Recovery, FCCU Monitoring, and LBIST features. This table provides a detailed breakdown of feature sets across different part numbers.

Table 2. Orderable part numbers: Lists specific orderable part numbers, their descriptions (e.g., evaluation boards, reference designs, supersets), and package type (LQFP48). Empty OTP samples are available using part number PFS2630AMDA0AD.

6 Simplified application diagram

The FS26 can be integrated into automotive systems to provide power management and safety features. The diagrams illustrate typical system configurations.

Figure 4. Example of application diagram (with VBST as a front-end regulator): Shows the FS26 connected to a battery (VBAT) via the VBST input. The FS26 provides power rails (VCORE, VDDIO) to a microcontroller (MCU). Wake-up sources (GPIO, WAKE, SPI, LDT) are connected to the FS26. Safety outputs (RSTb, FS0b, FS1b) are shown connecting to actuators for safe state. Analog sensors connect to the MCU via ADC.

Figure 5. Example of application diagram (with VBST as a back-end regulator): Similar to Figure 4, this diagram depicts the FS26 in a system, with VBST acting as a back-end regulator. The overall system architecture includes the MCU, FS26, power sources, and actuators for safety functions.

7 Block diagram

Figure 6. Block diagram of the FS26: This detailed block diagram illustrates the internal architecture of the FS26. It shows the interconnected functional blocks including power management (VBST, VPRE, VCORE, LDOs, TRKs, VREF), control logic, safety monitoring units (Fail-Safe Logic, Watchdog, FCCU, ABIST), and various input/output interfaces (SPI, GPIO, WAKE, Analog MUX). The diagram highlights the complex integration of power, control, and safety functions within a single chip.

8 Pinning Information

8.1 Pinning

Figure 7. Pin assignment in LQFP48 package with exposed pad: This diagram shows the pinout for the 48-pin LQFP package. Pins are numbered 1 through 48, with an exposed pad. Pins are categorized by function: Power management, Communication, Safety, and Other.

8.2 Pin descriptions

Table 3. Pin descriptions: Provides a comprehensive list of each pin on the FS26, including its symbol, pin number, type (Digital input/output, Analog input/output), and a brief description of its function. This table is essential for understanding the interface and capabilities of each pin.

9 Maximum ratings

Table 4. Maximum ratings: Lists the absolute maximum voltage ratings for various pins and groups of pins on the FS26. Exceeding these ratings can cause malfunction or permanent damage to the device. It also specifies the maximum reverse current for certain input pins.

10 Electrostatic discharge

Table 5. ESD: Details the Electrostatic Discharge (ESD) ratings for the FS26, including Human Body Model (HBM) and Charged Device Model (CDM) values, as well as Gun Test specifications (IEC61000-4-2, ISO10605.2008). These ratings are critical for handling and assembly processes to prevent damage.

11 Thermal ratings

Table 6. Temperatures ranges: Specifies the operating temperature ranges for the FS26, including Ambient temperature (TA), Junction temperature (TJ), Storage temperature (TSTG), and a Temperature warning threshold (TWARN).

Table 7. Thermal resistance (per JEDEC JESD51-2): Provides thermal resistance values, including Junction to Ambient (RJA), Junction to Case Bottom (RJCBOTTOM), Junction to Case Top (RJCTOP), and a thermal characterization parameter (ΨJT). These values are important for thermal management and design.

12 Packaging

12.1 Package mechanical dimensions

Table 8. Package mechanical dimensions: Describes the mechanical specifications for the 7.0 x 7.0 mm, 48-pin LQFP package with an exposed pad. It includes the suffix and the package outline drawing number (98ASA00945D).

12.2 Package outline

Figure 8, 9, 10: These figures provide detailed visual representations of the SOT1571-6 package outline, including dimensions, lead configurations, and notes relevant to package handling and PCB mounting.

Figures 11, 12, 13: These figures offer PCB design guidelines for the SOT1571-6 package, covering solder mask opening patterns, I/O pads and solderable areas, and solder paste stencil layouts. These are essential for successful PCB assembly and manufacturing.

13 References

Table 9. References: Lists various documents, tools, and enablement resources related to the FS26, along with their corresponding URLs. These resources include functional safety manuals, FMEDA data, product guidelines, calculators, graphical user interfaces, product overviews, evaluation boards, and socket boards.

14 Revision history

This section details the revisions made to the document, including dates and a summary of changes for each revision, starting from the initial version.

15 Legal information

This section contains important legal information, including definitions, disclaimers regarding warranty and liability, rights to make changes, application suitability, limiting values, terms and conditions of commercial sale, export control, translations, security, suitability for automotive applications (functional safety), and trademarks.

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