UNI-T USB 2.0 Compliance Tests User Manual
Model: MSO7000X, MSO8000HD Series
Revision: 1.0
Date: July 2025
1 USB 2.0 Compliance Analysis Overview
USB (Universal Serial Bus) 2.0 is a mature external connection standard. Its plug-and-play design simplifies computer board assembly and disassembly, offering advantages such as ease of use, functional flexibility, and efficient data transmission.
For USB 2.0 designers, comprehensive compliance testing is mandatory before product launch to ensure adherence to industry standards. Only certified devices are permitted to display the USB-IF logo. Key tests include eye diagram analysis and parametric checks for low-speed, full-speed, and high-speed devices/hubs.
2 Test Items
The USB 2.0 compliance tests are categorized into Signal Quality Tests and Non-Signal Quality Tests. Power tests are noted as not supported by this particular setup.
Signal Quality Tests:
- Eye Diagram
- End-of-Packet Width
- Signal Rate
- Edge Monotonicity
- Consecutive Jitter
- JK Pair Jitter
- KJ Pair Jitter
- Edge Rise Rate
- Edge Fall Rate
- Rise Time
- Fall Time
Non-Signal Quality Tests:
- Chirp Test
- Suspend Test
- Resume Test
- High-Speed Reset
- Suspend Reset
- Packet Parameter Test
- Undriven J/K Voltage Values, Voltage Value in SE0 State
3 Test Equipment
3.1 Requirements
- Oscilloscope: Minimum 2GHz bandwidth, minimum 5GSa/s sample rate, with USB 2.0 compliance software.
- USB 2.0 Compliance Test Fixture: Provides signal access points.
- Probes: Active Differential Probe and Active Single-ended Probe with minimum 2GHz bandwidth.
- Packet Generation Software: [HSETT] or [XHSETT] (USB-IF official).
3.2 Configuration
Component | Configuration/Recommendation |
---|---|
Oscilloscope | ≥ 2GHz bandwidth, recommended: MSO7000X, MSO8000HD series |
Active Differential Probe | ≥ 2GHz, recommended: UT-PD2500 |
Active Single-ended Probe | ≥ 2GHz, recommended: UT-PA2000 (≥2 sets) |
Test Fixture | UNI-T USB 2.0 Test Fixture (USB20-SQ-HD) or equivalent recommended by association. |
USB Compliance Analysis Software | UNI-T CTS-USB20 |
USB-IF Packet Generation Software | Official Association Packet Generation Software [HSETT] or [XHSETT] |
3.3 Equipment Introduction
UNI-T offers high-bandwidth oscilloscopes, specifically the MSO8000HD and MSO7000X series, providing bandwidths from 1GHz to 8GHz and sampling rates up to 20GSa/s. The MSO8000HD features a 12-bit ADC for accurate measurement data crucial for compliance testing, boasting excellent signal integrity characteristics like a low noise floor (below 800µV at 50mV/div), high ENOB (>7 bits across full bandwidth), and low intrinsic jitter (150fs RMS). The MSO7000X series provides a cost-effective testing solution.
Recommended Oscilloscope Models:
- MSO8804HD | 8GHz | 20GSa/s | 55ps
- MSO8504HD | 5GHz | 20GSa/s | 88ps
- MSO7000X | 2GHz | 10GSa/s | 175ps
Active Probes:
To ensure accurate compliance analysis, probes with a bandwidth of at least 1.5GHz are required. UNI-T provides the UT-PD2500 (2.5GHz) active differential probe and the UT-PA2000 (2GHz) active single-ended probe, both designed to support USB 2.0 compliance testing and provide reliable DUT connections.
Test Fixture:
The USB 2.0 test fixture (UT-USB20-SQ-HD) comprises a Host test fixture, a Device test fixture, a 10cm communication USB 2.0 cable, and a 20cm power supply USB 2.0 cable. This fixture supports most signal quality and non-signal quality tests, excluding receiver sensitivity. Power tests are not supported.
Fixture Layout Introduction
High-Speed Device Signal Quality Test Fixture
No. | Interface | Description |
---|---|---|
1 | DUTCONN | DUT Connection Port, USB-A Female |
2 | EXT POW | Fixture Power Supply Interface, USB-B Female |
3 | SW1 | Test Mode Switch: Toggles between Init mode and Test mode |
4 | HOST CONN | Host Connection Interface (connects to PC running test software), USB-B Female |
5 | J7 | USB 2.0 Far-End Test Point |
6 | J1 | USB Signal Differential Negative Voltage Output (connect to scope via SMA) |
7 | J3 | USB Signal Differential Positive Voltage Output (connect to scope via SMA) |
8 | J6 | USB 2.0 Near-End Test Point |
High-Speed Host Signal Quality Test Fixture
No. | Interface | Description |
---|---|---|
1 | J1 | Connects to PC running test software (acting as Host), USB-A Male |
2 | J4 | VBUS Voltage Test Point (use single-ended probe) |
3 | J3 | USB Signal Differential Negative Voltage Output (connect to scope via SMA) |
4 | J2 | USB Signal Differential Positive Voltage Output (connect to scope via SMA) |
Software Overview
Packet Generation Software: [HSETT] and [XHSETT] are USB signal packet generation software provided by the USB-IF Association. More information is available at https://www.usb.org/document-library/xhsett. For configuration details, refer to the "USB 2.0 Signal Quality Test Fixture User Manual REV.1.0".
Compliance Analysis Software: UNI-T's CTS-USB20 is a USB 2.0 compliance analysis software that automates all compliance tests via scripting, significantly reducing execution time. Key features include automatic pass/fail determination, parameter editing, report generation, intuitive user interface, automated testing processes, detailed reports, and configurable test parameters. It supports single or multiple test runs.
To launch the compliance test function, click the compliance icon in the Start Menu.
Test Setup:
- DUT: Supports Device, Host, Hub. Other options can be selected as needed.
- Note: For local testing, oscilloscope model selection is not required.
DUT Settings
Test Items: The software supports Low-Speed Signal Quality, Full-Speed Signal Quality, High-Speed Signal Quality, High-Speed Non-Signal Quality, and Power Tests (currently unsupported). Available test items vary based on the selected DUT type.
Users can expand/collapse measurement sub-items by clicking the [+] or [-] icons. Individual sub-items can be configured by selecting the corresponding checkbox, allowing customization of probe types based on signal type.
Waveform Acquisition:
Select the appropriate analog input channel(s) for differential/single-ended probes based on specific test requirements.
Limits Editor:
Users can view and customize compliance standards for selected test items within the Limit Editor.
Test Status:
The Test Status interface displays the progress of selected test items (Pending, In Progress, Completed, Skipped). The Log interface provides detailed test logs with timestamps.
Test Result and Saving
Test Result:
After testing, results for executed items are displayed in the Test Results interface. The table includes Name, Speed, Lower Limit, Upper Limit, Unit, Measured Value, Margin, Description, and Result.
Save Settings:
The Save Settings option allows configuration of screenshot capture settings, including Capture Area (Screen, Grid), Screenshot Color (Standard, B&W, Inverted), Image Type (.png/.bmp/.tiff/.gif/.jpeg), and Save Location.
Test Report:
Clicking "Test Report" opens the Report Settings window for configuring report details such as Report Update, Contents, Type, Name, Save Location, and options for auto-incrementing report names and auto-opening reports.
Upon completion, a comprehensive report is generated, including Pass/Fail results, data tables, and screenshots.
4 Compliance Analysis Test Items
4.1 Signal Quality Tests
4.1.1 Eye Diagram
The USB 2.0 signal eye diagram test verifies compliance against the standard eye diagram template provided by the USB-IF association. The eye diagram is crucial for assessing signal integrity, including jitter and rise speed. The test should be performed multiple times for accuracy. The software automatically plots the eye diagram and compares it to the standard template.
Test Procedure:
- Open the compliance software. Navigate to
Test Setup
→Test Items
, then click[+]
to expand sub-items and selectEye Diagram
. - In the
Waveform Acquisition
interface, select the appropriate analog channel underDifferential
. - In the
Limit Editor
, set the test standard or use the default Compliance standard. - Click
Start
. - Set up the test environment as per the connection diagram provided by the software. Click
Continue
to begin the test.
Connection Diagram Description (Device-HS-Eye Diagram):
1. Connect two 500Ω loads to the [J1] and [J3] interfaces of the fixture. 2. Insert the DUT into the [J2] interface. 3. Connect the [USB-A] port of the provided [USB-A to USB-B] cable to the PC's packet sending port and the [USB-B] port to the fixture's [J4] interface. 4. Connect the [USB-B] port of another [USB-A to USB-B] cable to the fixture's [J5] interface, and the [USB-A] port to any USB interface for power supply. 5. Insert a differential probe into the fixture's [J6] [D+ & D-] pins and connect the other end to the oscilloscope.
Note: If a connection or waveform error occurs, the log will display a timeout and re-show the connection diagram. Follow prompts to correct the connection, resend the waveform, and click Continue
.
6. Follow prompts for packet software and fixture operation: Open the [HSET] package tool, click [Enumerate Bus]
, select the port, then click [Execute]
to send the [TEST_PACKET]
pattern. If the DUT is a Device, set the fixture switch to [TEST]
mode. Click Continue
after operations are complete.
7. The oscilloscope verifies test signals, configures acquisition, performs measurements, and records results. A report with results and waveform images is generated.
Eye Diagram Test Results: The results table shows Speed, Measure Value, Unit, Lower Limit, Upper Limit, Margin, and Comments. The waveform display shows the eye diagram and associated data.
4.1.2 End-of-Packet Width
All USB packets conclude with an End-of-Packet (EOP) domain, measured in bit times. For Start-of-Frame (SOF) packets, the EOP width should be between 39.5 and 40.5 bits. For non-SOF packets, it should be between 7.5 and 8.5 bits.
Test Procedure:
- Open compliance software:
Test Setup
→Test Items
, click[+]
, selectEnd-of-Packet Width
. - In the
Waveform Acquisition
interface, select the analog channel underDifferential
. - In the
Limit Editor
, set the test standard or use the default Compliance standard. - Click
Start
. - Setup environment per diagram, click
Continue
.
Note: If a connection or waveform error occurs, follow prompts to correct and click Continue
.
6. Follow prompts: Open [HSET] package tool, click [Enumerate Bus]
, select port, click [Execute]
to send [TEST_PACKET]
. For Device DUT, set fixture switch to [TEST]
mode. Click Continue
.
7. Oscilloscope verifies signals, acquires data, measures, and records results. A report is generated.
End-of-Packet Width Test Results: The results table shows Speed, Measure Value, Unit, Lower Limit, Upper Limit, Margin, and Comments. The waveform display shows the EOP width measurement.
4.1.3 Signal Rate
High-Speed Data Rate (THSDRAT): Nominal 480.00Mb/s, accuracy ±0.05% (500ppm).
Full-Speed Data Rate (TFDRATE): Nominal 12.000Mb/s, accuracy ±0.25% (2,500ppm).
Low-Speed Data Rate (TLDRATE): Nominal 1.50Mb/s, accuracy ±1.5% (15,000ppm).
Test Procedure:
- Open compliance software:
Test Setup
→Test Items
, click[+]
, selectSignal Rate
. - In the
Waveform Acquisition
interface, select the analog channel underDifferential
. - In the
Limit Editor
, set the test standard or use the default Compliance standard. - Click
Start
. - Setup environment per diagram, click
Continue
.
Note: If a connection or waveform error occurs, follow prompts to correct and click Continue
.
6. Follow prompts: Open [HSET] package tool, click [Enumerate Bus]
, select port, click [Execute]
to send [TEST_PACKET]
. For Device DUT, set fixture switch to [TEST]
mode.
7. Oscilloscope verifies signals, acquires data, measures, and records results. A report is generated.
Signal Rate Test Results: The results table shows Speed, Measure Value, Unit, Lower Limit, Upper Limit, Margin, and Comments. The waveform display shows the signal rate measurement.
4.1.4 Edge Monotonicity
Edge monotonicity must be verified for every edge in each upstream/downstream data packet. For this test, as well as edge rise/fall time and rate tests, careful attention is needed. To capture 500ps edge information, at least 10 sample points on the edge are required. The system rise time should be below 180ps, sampling rate at least 10GSa/s, and error percentage less than 10% for accuracy.
Test Procedure:
- Open compliance software:
Test Setup
→Test Items
, click[+]
, selectEdge Monotonicity
. - In the
Waveform Acquisition
interface, select the analog channel underDifferential
. - In the
Limit Editor
, set the test standard or use the default Compliance standard. - Click
Start
. - Setup environment per diagram, click
Continue
.
Note: If a connection or waveform error occurs, follow prompts to correct and click Continue
.
6. Follow prompts: Open [HSET] package tool, click [Enumerate Bus]
, select port, click [Execute]
to send [TEST_PACKET]
. For Device DUT, set fixture switch to [TEST]
mode.
7. Oscilloscope verifies signals, acquires data, measures, and records results. A report is generated.
Edge Monotonicity Test Results: The results table shows Speed, Measure Value, Unit, Lower Limit, Upper Limit, Margin, and Comments. The waveform display shows the edge monotonicity measurement.
4.1.5 Consecutive Jitter
Test Procedure:
- Open compliance software:
Test Setup
→Test Items
, click[+]
, selectConsecutive Jitter
. - In the
Waveform Acquisition
interface, select the analog channel underDifferential
. - In the
Limit Editor
, set the test standard or use the default Compliance standard. - Click
Start
. - Setup environment per diagram, click
Continue
.
Note: If a connection or waveform error occurs, follow prompts to correct and click Continue
.
6. Follow prompts: Open [HSET] package tool, click [Enumerate Bus]
, select port, click [Execute]
to send [TEST_PACKET]
. For Device DUT, set fixture switch to [TEST]
mode.
7. Oscilloscope verifies signals, acquires data, measures, and records results. A report is generated.
Consecutive Jitter Test Results: The results table shows Sub Name, Speed, Result, Measure Value, Unit, Lower Limit, Upper Limit, Margin, and Comments. The waveform display shows the jitter measurement.
4.1.6 JK Pair Jitter
Test Procedure:
- Open compliance software:
Test Setup
→Test Items
, click[+]
, selectJK Pair Jitter
. - In the
Waveform Acquisition
interface, select the analog channel underDifferential
. - In the
Limit Editor
, set the test standard or use the default Compliance standard. - Click
Start
. - Setup environment per diagram, click
Continue
.
Note: If a connection or waveform error occurs, follow prompts to correct and click Continue
.
6. Follow prompts: Open [HSET] package tool, click [Enumerate Bus]
, select port, click [Execute]
to send [TEST_PACKET]
. For Device DUT, set fixture switch to [TEST]
mode.
7. Oscilloscope verifies signals, acquires data, measures, and records results. A report is generated.
JK Pair Jitter Test Results: The results table shows Sub Name, Speed, Result, Measure Value, Unit, Lower Limit, Upper Limit, Margin, and Comments. The waveform display shows the JK pair jitter measurement.
4.1.7 KJ Pair Jitter
Test Procedure:
- Open compliance software:
Test Setup
→Test Items
, click[+]
, selectKJ Pair Jitter
. - In the
Waveform Acquisition
interface, select the analog channel underDifferential
. - In the
Limit Editor
, set the test standard or use the default Compliance standard. - Click
Start
. - Setup environment per diagram, click
Continue
.
Note: If a connection or waveform error occurs, follow prompts to correct and click Continue
.
6. Follow prompts: Open [HSET] package tool, click [Enumerate Bus]
, select port, click [Execute]
to send [TEST_PACKET]
. For Device DUT, set fixture switch to [TEST]
mode.
7. Oscilloscope verifies signals, acquires data, measures, and records results. A report is generated.
KJ Pair Jitter Test Results: The results table shows Sub Name, Speed, Result, Measure Value, Unit, Lower Limit, Upper Limit, Margin, and Comments. The waveform display shows the KJ pair jitter measurement.
4.1.8 Edge Rise Rate
Test Procedure:
- Open compliance software:
Test Setup
→Test Items
, click[+]
, selectEdge Rise Rate
. - In the
Waveform Acquisition
interface, select the analog channel underDifferential
. - In the
Limit Editor
, set the test standard or use the default Compliance standard. - Click
Start
. - Setup environment per diagram, click
Continue
.
Note: If a connection or waveform error occurs, follow prompts to correct and click Continue
.
6. Follow prompts: Open [HSET] package tool, click [Enumerate Bus]
, select port, click [Execute]
to send [TEST_PACKET]
. For Device DUT, set fixture switch to [TEST]
mode.
7. Oscilloscope verifies signals, acquires data, measures, and records results. A report is generated.
Edge Rise Rate Test Results: The results table shows Speed, Measure Value, Unit, Lower Limit, Upper Limit, Margin, and Comments. The waveform display shows the edge rise rate measurement.
4.1.9 Edge Fall Rate
Test Procedure:
- Open compliance software:
Test Setup
→Test Items
, click[+]
, selectEdge Fall Rate
. - In the
Waveform Acquisition
interface, select the analog channel underDifferential
. - In the
Limit Editor
, set the test standard or use the default Compliance standard. - Click
Start
. - Setup environment per diagram, click
Continue
.
Note: If a connection or waveform error occurs, follow prompts to correct and click Continue
.
6. Follow prompts: Open [HSET] package tool, click [Enumerate Bus]
, select port, click [Execute]
to send [TEST_PACKET]
. For Device DUT, set fixture switch to [TEST]
mode.
7. Oscilloscope verifies signals, acquires data, measures, and records results. A report is generated.
Edge Fall Rate Test Results: The results table shows Speed, Measure Value, Unit, Lower Limit, Upper Limit, Margin, and Comments. The waveform display shows the edge fall rate measurement.
4.1.10 Rise Time
Test Procedure:
- Open compliance software:
Test Setup
→Test Items
, click[+]
, selectRise Time
. - In the
Waveform Acquisition
interface, select the analog channel underDifferential
. - In the
Limit Editor
, set the test standard or use the default Compliance standard. - Click
Start
. - Setup environment per diagram, click
Continue
.
Note: If a connection or waveform error occurs, follow prompts to correct and click Continue
.
6. Follow prompts: Open [HSET] package tool, click [Enumerate Bus]
, select port, click [Execute]
to send [TEST_PACKET]
. For Device DUT, set fixture switch to [TEST]
mode.
7. Oscilloscope verifies signals, acquires data, measures, and records results. A report is generated.
Rise Time Test Results: The results table shows Speed, Measure Value, Unit, Lower Limit, Upper Limit, Margin, and Comments. The waveform display shows the rise time measurement.
4.1.11 Fall Time
Test Procedure:
- Open compliance software:
Test Setup
→Test Items
, click[+]
, selectFall Time
. - In the
Waveform Acquisition
interface, select the analog channel underDifferential
. - In the
Limit Editor
, set the test standard or use the default Compliance standard. - Click
Start
. - Setup environment per diagram, click
Continue
.
Note: If a connection or waveform error occurs, follow prompts to correct and click Continue
.
6. Follow prompts: Open [HSET] package tool, click [Enumerate Bus]
, select port, click [Execute]
to send [TEST_PACKET]
. For Device DUT, set fixture switch to [TEST]
mode.
7. Scope verifies signals, acquires data, measures, and records results. A report is generated.
Fall Time Test Results: The results table shows Speed, Measure Value, Unit, Lower Limit, Upper Limit, Margin, and Comments. The waveform display shows the fall time measurement.
4.2 Non-Signal Quality Tests
4.2.1 Chirp Test
Chirp testing identifies high-speed devices during host-device negotiation. If negotiation fails, the device reverts to full-speed (12 Mbits). It checks timing and voltage of upstream/downstream ports during speed detection; hubs require testing on both ports. Upon hot-plugging, a device enumerates to capture the chirp handshake. Chirp-K duration is measured (1.0 ms to 7.0 ms). After the K-J sequence, high-speed termination is enabled (amplitude drops from 800 mV to 400 mV). The time between the last J start and termination activation must be ≤ 500 μs. Chirp testing also measures suspend/resume/reset timing and K/J amplitudes.
Test Procedure:
- Open compliance software:
Test Setup
→Test Items
, click[+]
, selectChirp Test
. - In the
Waveform Acquisition
interface, select the analog channel underSingle-Ended
. - In the
Limit Editor
, set the test standard or use the default Compliance standard. - Click
Start
. - Setup environment per diagram, click
Continue
.
Note: If a connection or waveform error occurs, follow prompts to correct and click Continue
.
6. Follow prompts: Open [HSET] package tool, set fixture switch to [INIT]
mode, click [Enumerate Bus]
.
7. Scope verifies signals, acquires data, measures, and records results. A report is generated.
Chirp Test Results: The results table shows Sub Name, Speed, Result, Measure Value, Unit, Lower Limit, Upper Limit, Margin, and Comments. The waveform display shows the chirp test results.
4.2.2 Suspend Test
Test Procedure:
- Open compliance software:
Test Setup
→Test Items
, click[+]
, selectSuspend Test
. - In the
Waveform Acquisition
interface, select the analog channel underSingle-Ended
. - In the
Limit Editor
, set the test standard or use the default Compliance standard. - Click
Start
. - Setup environment per diagram, click
Continue
.
Note: If a connection or waveform error occurs, follow prompts to correct and click Continue
.
6. Follow prompts: Open [HSET] package tool, set fixture switch to [INIT]
mode, click [Enumerate Bus]
.
7. Oscilloscope verifies signals, acquires data, measures, and records results. A report is generated.
Suspend Test Results: The results table shows Speed, Measure Value, Unit, Lower Limit, Upper Limit, Margin, and Comments. The waveform display shows the suspend test results.
4.2.3 Resume Test
Test Procedure:
- Open compliance software:
Test Setup
→Test Items
, click[+]
, selectResume Test
. - In the
Waveform Acquisition
interface, select the analog channel underSingle-Ended
. - In the
Limit Editor
, set the test standard or use the default Compliance standard. - Click
Start
. - Setup environment per diagram, click
Continue
.
Note: If a connection or waveform error occurs, follow prompts to correct and click Continue
.
6. Follow prompts: Open [HSETT], set fixture switch to [INIT]
mode, click [Enumerate Bus]
, select port, choose [SUSPEND]
mode and click [Execute]
, then choose [RESUME]
and click [Execute]
.
7. Oscilloscope verifies signals, acquires data, measures, and records results. A report is generated.
Resume Test Results: The results table shows Speed, Measure Value, Unit, Lower Limit, Upper Limit, Margin, and Comments. The waveform display shows the resume test results.
4.2.4 High-Speed Reset
Test Procedure:
- Open compliance software:
Test Setup
→Test Items
, click[+]
, selectHigh-Speed Reset
. - In the
Waveform Acquisition
interface, select the analog channel underSingle-Ended
. - In the
Limit Editor
, set the test standard or use the default Compliance standard. - Click
Start
. - Setup environment per diagram, click
Continue
.
Note: If a connection or waveform error occurs, follow prompts to correct and click Continue
.
6. Follow prompts: Open [HSETT], set fixture switch to [INIT]
mode, click [Enumerate Bus]
, select port, click [Execute]
, then choose [RESUME]
and click [Execute]
.
7. Oscilloscope verifies signals, acquires data, measures, and records results. A report is generated.
High-Speed Reset Test Results: The results table shows Sub Name, Speed, Result, Measure Value, Unit, Lower Limit, Upper Limit, Margin, and Comments. The waveform display shows the high-speed reset test results.
4.2.5 Suspend Reset
Test Procedure:
- Open compliance software:
Test Setup
→Test Items
, click[+]
, selectSuspend Reset
. - In the
Waveform Acquisition
interface, select the analog channel underSingle-Ended
. - In the
Limit Editor
, set the test standard or use the default Compliance standard. - Click
Start
. - Setup environment per diagram, click
Continue
.
Note: If a connection or waveform error occurs, follow prompts to correct and click Continue
.
6. Follow prompts: Open [HSETT], set fixture switch to [INIT]
mode, click [Enumerate Bus]
, select port, choose [SUSPEND]
mode and click [Execute]
, then choose [RESUME]
and click [Execute]
.
7. Oscilloscope verifies signals, acquires data, measures, and records results. A report is generated.
Suspend Reset Test Results: The results table shows Sub Name, Speed, Result, Measure Value, Unit, Lower Limit, Upper Limit, Margin, and Comments. The waveform display shows the suspend reset test results.
4.2.6 Packet Parameter Test
Test Procedure:
- Open compliance software:
Test Setup
→Test Items
, click[+]
, selectPacket Parameter Test
. - In the
Waveform Acquisition
interface, select the analog channel underDifferential
. - In the
Limit Editor
, set the test standard or use the default Compliance standard. - Click
Start
. - Setup environment per diagram, click
Continue
.
Note: If a connection or waveform error occurs, follow prompts to correct and click Continue
.
6. Follow prompts: Open [HSET], set fixture to [INIT]
mode, click [Enumerate Bus]
, select target port, click [Execute]
to send [SINGLE STEP SET FEATURE]
for Device DUT or [SINGLE STEP GET DEV DESC]
for Host DUT.
7. Oscilloscope verifies signals, acquires data, measures, and records results. A report is generated.
Packet Parameter Test Results: The results table shows Sub Name, Speed, Result, Measure Value, Unit, Lower Limit, Upper Limit, Margin, and Comments. The waveform display shows packet parameter test results.
4.2.7 Undriven J/K Voltage Values, Voltage Value in SE0 State
Test Procedure:
- Open compliance software:
Test Setup
→Test Items
, click[+]
, selectUndriven J Voltage Value EL8
andUndriven K Voltage Value EL8
. - In the
Waveform Acquisition
interface, select the analog channel underSingle-Ended
. - In the
Limit Editor
, set the test standard or use the default Compliance standard. - Click
Start
. - Setup environment per diagram, click
Continue
.
Note: If a connection or waveform error occurs, follow prompts to correct and click Continue
.
6. Follow prompts: Open [HSET], click [Enumerate Bus]
, select target port, click [Execute]
to send TEST_J]
pattern, set fixture switch to [TEST]
mode.
7. Oscilloscope verifies signals, acquires data, measures, and records results. A report is generated.
Undriven J/K Voltage Values, Voltage Value in SE0 State Results: The results tables show Speed, Measure Value, Unit, Lower Limit, Upper Limit, Margin, and Comments for Undriven J Voltage, Undriven K Voltage, and Undriven SE0_NAK Voltage.
Notes
- Signal/non-signal quality test items differ between Device and Host. Strictly follow the compliance software's guidance for cabling, packet software, and fixture operation to ensure test validity. This example demonstrates Device high-speed signal/non-signal quality tests. For Host testing, select Host as the test object in the packet software and follow the TEST prompts.
- These examples show single-item testing. For multi-item testing, simply select the required test items, configure the probe type, and click Start.
Limited Warranty and Liability
UNI-T guarantees that the Instrument product is free from defects in material and workmanship for three years from the purchase date. This warranty does not cover damages from accident, negligence, misuse, modification, contamination, or improper handling. For warranty service, contact the seller directly. UNI-T is not responsible for any special, indirect, incidental, or subsequent damage or loss caused by using this device. Probes and accessories have a one-year warranty. Full warranty information is available at instruments.uni-trend.com.
Learn more: Visit www.instrument.uni-trend.com.
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