Theory of Operation
This section provides a detailed understanding of the FT-227R transceiver's circuitry. Refer to the schematic diagrams for specific circuit details.
Transmitter Section
The transmitter generates a Frequency Modulated (FM) signal. The audio input from the microphone is processed by VR201 and amplified by Q201, Q202, and Q203 (2SC372Y). The audio output from Q202 feeds the Instantaneous Deviation Control (IDC) circuit, where diodes D201 and D202 (1S1555) clip positive and negative peaks. The amplified audio from Q203 passes through a low-pass filter, attenuating frequencies above the speech range, with deviation controlled by VR202 (nominally 5 kHz).
The speech signal then modulates a varactor diode, D401 (1SV50), which varies the frequency of the 10.7 MHz crystal-controlled oscillator, Q401 (2SC372Y). This FM 10.7 MHz signal is amplified by buffer Q402 (2SC372Y) and fed to a balanced mixer (Q403 and Q404, 2SK19GR). Here, it mixes with the 133.3-137.3 MHz signal from the Voltage Controlled Oscillator (VCO) to produce a 144-148 MHz signal.
The output from the balanced mixer passes through tuned circuits (T404-T407) to amplifier Q405 (3SK40M). These circuits are tuned to the transmitting frequency by varactor diodes D403-D406, whose capacitance changes based on the DC output voltage from the PLL circuit. The 144-148 MHz signal is then amplified by stages Q204 (2SC535A), Q206 (2SC2053), Q207 (2SC730), and Q208 (MRF212), delivering 10 Watts of RF energy through a diode switch and low-pass filter into a 50 ohm load.
Diodes D205 and D211 (1S188FM) rectify a portion of the RF output, providing a DC voltage to the meter for relative power output indication. This DC output also drives lamp drivers Q209 and Q210 (2SC372Y), illuminating the ON AIR lamp during transmission.
Protection and Control Circuits
If the transmitter is keyed without an antenna or with high VSWR, reflected power is detected via T202 and diode D208 (1S188FM), generating a DC voltage. Q211 (2SC372Y) conducts, reducing Q212's collector current. This drops Q213's (2SA496) collector voltage, causing Q11 (2SD235) to decrease current and supply voltage to the PA amplifier, preventing damage. VR205 sets the threshold level. This circuit also switches output power to 1 Watt when the HI-LOW switch is set to LOW, with power reduction adjustable via VR206.
The antenna change-over circuit uses switching diodes D206 and D207 (M1301).
Tone Burst Circuit
The tone burst circuit includes a timing generator and a gated multivibrator. When the BURST switch is ON, a DC voltage is applied. Keying the transmitter causes Q214 (2SC372Y) to conduct, triggering the one-shot multivibrator Q215 (MC14011B). The other half of Q215 generates a tone signal, amplified by buffer Q216 (2SC372Y) and applied to the microphone circuit. Tone frequency is adjustable by VR207, output level (deviation) by VR209, and burst duration by VR208.
Receiver Section
The input signal from the antenna passes through a low-pass filter (L1, L214, L213, C1, C243-C245) and a diode change-over switch (D206, D207, L212) to the FET amplifier Q101 (3SK51). The amplified signal then goes through four high-Q coax resonators to the first mixer Q102 (3SK51). The dual-gate FET RF amplifier and coax resonators minimize cross-modulation and spurious responses, ensuring a low noise figure for the receiver front end.
The 144 to 148 MHz signal is heterodyned with the first local oscillator (from the PLL VCO) to produce a 10.7 MHz first IF signal. This IF signal is fed through crystal filter XF101 (pass band -7.5 kHz) to the second mixer Q103 (3SK40M), which produces a 455 kHz second IF signal by heterodyning with the 10.245 MHz output of the second local oscillator Q104 (2SC372Y). Q105 (2SA564) acts as a switch, disconnecting supply voltage to Q104 when the PLL circuit is unlocked.
Second IF and Squelch Circuits
The second IF circuit comprises Q106, Q107, Q108 (2SC372Y), and Q109 (µPC577H). Cascade-connected ceramic filters CF101 and CF102 provide narrow-band selectivity, and Q109's limiting action removes amplitude variations before the ceramic discriminator (CD101, D106, D107, 1S188FM).
The discriminator produces an audio output corresponding to frequency shifts in the IF signal. This audio is amplified by Q113, Q114 (2SC372Y) and applied across VOLUME control VR1 to the audio amplifier Q116 (µPC575C2). Q116's output is routed through the ACC socket to the internal speaker. A low-pass filter between Q113 and Q114 attenuates audio frequencies above 3 kHz, improving readability.
A portion of the 455 kHz IF signal is rectified by D103, D104 (1S188FM) for S-meter indication, with sensitivity adjusted by VR101.
When no carrier is present in the 455 kHz IF, high-frequency noise from the discriminator output is amplified by Q110 and Q111 (2SC372Y), then detected by D108 and D109 (1S188FM) to produce a DC voltage. This voltage turns on Q112 (2SC372Y), grounding Q113's base to squelch the audio amplifier. When a carrier is present, noise is removed, and the audio amplifier recovers normal operation.
The squelch circuit opening causes Q113 to conduct, drawing current through lamp driver Q115 (2SC372Y) to light the BUSY LAMP. SQUELCH controls VR2 and VR102 set the threshold level.
Heterodyne Oscillator (PLL)
The heterodyne signal is generated by the PLL circuit, which includes a VCO, reference crystal oscillator, programmable divider, and phase comparator. The VCO oscillator, Q301 (2SK19GR), generates 133.3-137.3 MHz signals. Its frequency is controlled by varactor diode D301 (1S2209), which varies the capacitance of a tuned circuit (L301, TC301, C302, C304) based on a DC voltage from phase comparator Q309 (TC5081P).
The output from Q301 is amplified by buffer Q302 (3SK40M) and Q303 (2SC535A), then fed through diode switch D302 and D303 (1S1555) to the receiver or transmitter mixers.
A portion of Q303's output feeds buffer Q304 (3SK40M) to a PLL mixer, Q305 (2SC535A), which produces a 1-5 MHz PLL IF signal by mixing with the PLL heterodyne signal.
The PLL heterodyne signal is generated by overtone crystal-controlled oscillator Q310 (2SC373). The crystal frequencies are detailed in the table below:
| X-Tal | Frequency | PLL Het. Freq. | Remarks |
|---|
| X301 | 44.10000 MHz | 132.300 | Simplex |
| X302 | 43.90000 | 131.700 | TX-600 kHz shift |
| X303 | 44.30000 | 132.900 | TX+600 kHz shift |
| X304 | 44.10166 | 132.305 | Simplex 5 kHz up |
| X305 | 43.90166 | 131.705 | TX-600 kHz 5kHz up |
| X306 | 44.30166 | 132.905 | TX+600 kHz 5kHz up |
Diode switch D315-D320 (1S1555) selects the appropriate crystal based on the FUNCTION switch and 5kHz up switch. Q310's output feeds tripler Q311 (2SC710), which generates the PLL heterodyne signal.
The PLL IF signal passes through a low-pass filter (L305, C331, C332) to amplifiers Q306 and Q307 (2SC372Y). The amplified signal then feeds programmable divider Q308 (µPD857C). Crystal oscillator Q312 (2SC373) generates a 10.24 MHz signal, whose output feeds scaler/divider Q308 (µPD857C) to generate a 10 kHz reference signal.
Digital phase comparator Q309 (TC5081P) compares the PLL IF signal's phase with the reference signal, converting any phase difference into an error-correcting voltage. This voltage feeds varactor diode D301, changing its output signal phase to lock with the reference signal.
When the VCO is locked, a constant voltage from pin 4 of Q309 is applied to Q316 (MPSA13) to conduct, cutting off Q315 (2SC372Y). The "H" voltage at Q315's collector causes Q205 (2SC372Y) to conduct, supplying DC voltage to exciter stages Q204 and Q206. If the VCO is unlocked, Q205's emitter DC voltage drops, preventing normal operation of Q204 and Q206.
Q315's output voltage is polarity-reversed by Q314 (2SC372Y) and applied to Q606 (2SC372Y), maintaining its collector at "H" level to drive Q601-Q603 for channel frequency display. This voltage also applies to Q105 (2SA564), supplying DC voltage to second heterodyne oscillator Q104 (2SC372Y).
If the VCO is unlocked, the collector DC voltage drops, turning off the LEDs and stopping the second heterodyne oscillator, muting the receiver until VCO lock is achieved.
PLL Control Section
The optical coupling system uses two photo-interrupters, Q2 and Q3 (PS-4001), to generate signals for the PLL counter unit. The signal to the CK terminal passes through waveshaper Q710 (MC14049B) to BCD up/down counters Q707 (10 kHz), Q708 (100 kHz), and Q709 (1 MHz), using MC14510B as a clock signal.
The signal to the U/D terminal is inverted by Q710 and controls the up/down counter. The output from Q707-Q709 feeds a 4-bit data selector (Q701-Q703, MC1451B) and Quad latch (Q704-Q706, MC14042B), used for memory when the MEMORY switch is pressed. The output from Q701-Q703 feeds programmable divider Q308 (µPD857C).
Q711 (MC14081B) for high end and Q712 (MC14028B) for low end cut off Q713 (2SC735Y) to prevent transmission outside amateur bands. BCD signals to the programmable divider also feed LED drivers Q601-Q603 (MSM561) to drive LEDs D601-D603 (TLR 312). A 4-bit full adder, Q604 (MC14008B), produces a 4-8 display for the MHz range. LED D604 (TLR312) displays 0 or 5 via the 5 UP switch. The display LED turns off when an unlocked signal is received, controlled by Q605 (2SC372Y).
Power Supply
A DC 13.8 Volt supply powers the audio power amplifier Q116, relays, and lamps. The driver and final power amplifier receive supply voltage through voltage regulator Q11 (2SD235D), controlled by the HI/LOW switch and automatic final protection circuit.
Voltage regulator Q605 (µPC14305) regulates the supply voltage at 5 Volts for Q308 and the display unit Q313 (2SC372Y) and D301 (RD68EB). A zener diode D3 (WZ050) regulates the 5 Volts supply for the PLL control unit, connected directly to retain memory when the power switch is off and the M switch is pressed. A regulated 8 Volt supply from Q117 (µPC14308) powers other circuits. When the function switch is at MEM position, D4 (WZ050) supplies 5 Volts to the receiver, and D5 (WZ050) supplies 5 Volts to the transmitter.
Circuit Diagrams and Physical Layouts
The document includes detailed circuit diagrams (pages 2, 3, 4, 5) illustrating the interconnections of various components such as transistors (e.g., 2SC372Y, 3SK51, 2SK40M, 2SA564, MRF212), diodes (e.g., 1S1555, 1S188FM), integrated circuits (e.g., µPC577H, MC14011B, TC5081P, µPD857C), resistors, capacitors, and inductors across different functional blocks like RF, IF, AF, and PLL sections. These diagrams are essential for understanding the signal flow and component roles within the transceiver.
A block diagram (page 6) provides a high-level overview of the FT-227R Memorizer, showing the main functional units such as the PB-1659 Main Unit, PB-1757 PLL Unit, PB-1758/1759 Display Unit, PB-1773 PLL Control Unit, and the optional Tone Squelch unit, along with their interconnections and signal paths (e.g., RX ANT, TX, SP, MIC, AF IN/OUT, BUSY, METER, ON AIR).
Physical layouts of the PLL Unit (page 7), PLL Control Unit (page 8), and Alignment Points (page 9) are provided, showing the arrangement of components on the circuit boards. These visual guides are crucial for service and maintenance, indicating the location of specific transistors, capacitors, inductors, and test points (e.g., TP1, TC points, VR points).
Transistor & IC Connections (page 18) illustrates common pinout configurations for various semiconductor devices used in the transceiver, including different types of transistors (e.g., 2SK19Y, 3SK40M, 2SC535A, MPSA13, MRF212) and integrated circuits (e.g., µPC577H, TC5081, MC14011B, MSM561, µPD857C). This information is vital for component identification and replacement.
The Programmable Divider Code table (page 19) for Q308 (µPD857C) details the binary input pin states (P0-P11) corresponding to specific frequencies (e.g., 144.00 MHz to 147.99 MHz) and their respective programmable divider ratios (e.g., 1/100 to 1/499). This table is fundamental for programming and understanding the frequency synthesis within the PLL system, with notes indicating HIGH LEVEL (5V) and LOW LEVEL (0V) logic states.
The Optional Tone Squelch Circuit diagram (page 17) provides a detailed schematic of this add-on feature, showing components like Q502 (NE567), Q501 (MC3403), and associated resistors and capacitors that enable private communications by disabling audio until a preset tone signal is received.
