ADP1614: 650 kHz/1.3 MHz, 4 A, Step-Up, PWM, DC-to-DC Switching Converter

Features

• Adjustable and fixed current-limit options (up to 4 A, fixed 3 A)
• 2.5 V to 5.5 V input voltage range
• 650 kHz or 1.3 MHz fixed frequency option
• Adjustable output voltage, up to 20 V
• Adjustable soft start
• Undervoltage lockout
• Thermal shutdown
• 3 mm × 3 mm, 10-lead LFCSP package
• Supported by ADIsimPower design tool

Applications

• TFT LCD bias supplies
• Portable applications
• Industrial/instrumentation equipment

General Description

The ADP1614 is a step-up, DC-to-DC switching converter with an integrated power switch, capable of providing an output voltage as high as 20 V. The ADP1614 is available with a pin-adjustable current limit that is set via an external resistor, with the boost switching frequency fixed to either 650 kHz or 1.3 MHz. Alternatively, the ADP1614 is also available with a fixed 3 A current limit and a pin-selectable frequency. With a package height of 0.8 mm, the ADP1614 is optimal for space-constrained applications, such as portable devices or thin-film transistor (TFT) liquid crystal displays (LCDs).

The ADP1614 operates in current-mode pulse-width modulation (PWM) with up to 94% efficiency. Adjustable soft start prevents inrush currents when the part is enabled. The PWM current-mode architecture allows excellent transient response, easy noise filtering, and the use of small, cost-saving external inductors and capacitors. Other key features include undervoltage lockout (UVLO), thermal shutdown (TSD), and logic-controlled enable.

The ADP1614 is available in a Pb-free, 10-lead lead frame chip scale package (LFCSP).

Typical Applications Circuits

Figure 1. Step-Up Regulator Configuration for Adjustable Current-Limit Options

This circuit shows the typical application for the ADP1614 with adjustable current-limit options. Key components include the ADP1614 IC, inductor (L1), input capacitor (CIN), output capacitor (COUT), feedback resistors (R1, R2), compensation components (RCL, CCOMP), and soft start capacitor (CSS).

Figure 2. Step-Up Regulator Configuration for Fixed Current-Limit Options

This circuit illustrates the typical application for the ADP1614 with fixed current-limit options. It includes the ADP1614 IC, inductor (L1), input capacitor (CIN), output capacitor (COUT), feedback resistors (R1, R2), compensation components (RCOMP), and soft start capacitor (CSS). The frequency is set via the FREQ pin.

Specifications

All specifications are at VIN = 3.6 V, unless otherwise noted. Minimum and maximum values are guaranteed for TJ = -40°C to +125°C. Typical values are at TJ = 25°C.

Thermal Shutdown (TSD)

The ADP1614 includes TSD protection. If the die temperature exceeds 150°C (typical), TSD turns off the NMOS power device, significantly reducing power dissipation in the device and preventing output voltage regulation. The NMOS power device remains off until the die temperature is reduced to 130°C (typical). The soft start capacitor is discharged during TSD to ensure low output voltage overshoot and inrush currents when regulation resumes.

Undervoltage Lockout (UVLO)

If the input voltage is below the UVLO threshold, the ADP1614 automatically turns off the power switch and places the part into a low power consumption mode. This prevents potentially erratic operation at low input voltages and prevents the power device from turning on when the control circuitry cannot operate it. The UVLO levels have ~100 mV of hysteresis to ensure glitch-free startup.

Shutdown Mode

The EN pin turns the ADP1614 regulator on or off. Drive EN low to shut down the regulator and reduce the input current to 0.25 µA (typical). Drive EN high to turn on the regulator.

When the converter is in shutdown mode (EN ≤ 0.3 V), there is a dc path from the input to the output through the inductor and output rectifier. This causes the output voltage to remain slightly below the input voltage by the forward voltage of the rectifier, preventing the output voltage from dropping to ground when the regulator is shut down.

Regardless of the state of the EN pin, when a voltage is applied to the VIN pin, a large current spike occurs due to the non-isolated path through the inductor and diode between VIN and VOUT. The high current is a result of the output capacitor charging. The peak value is dependent on the inductor, output capacitor, and any load active on the output of the regulator.

Typical Performance Characteristics

Figure 4. Efficiency vs. Load Current, VIN = 3.6 V, fsw = 650 kHz

This graph shows the efficiency of the ADP1614 at different load currents for VIN = 3.6 V and fsw = 650 kHz, with various output voltages (5 V, 10 V, 15 V).

Figure 5. Efficiency vs. Load Current, VIN = 3.6 V, fsw = 1.3 MHz

This graph displays the efficiency of the ADP1614 at different load currents for VIN = 3.6 V and fsw = 1.3 MHz, with various output voltages (5 V, 10 V, 15 V).

Figure 6. Efficiency vs. Load Current, VIN = 5 V, fsw = 650 kHz

This graph illustrates the efficiency of the ADP1614 at different load currents for VIN = 5 V and fsw = 650 kHz, with various output voltages (10 V, 15 V, 20 V).

Figure 7. Efficiency vs. Load Current, VIN = 5 V, fsw = 1.3 MHz

This graph shows the efficiency of the ADP1614 at different load currents for VIN = 5 V and fsw = 1.3 MHz, with various output voltages (10 V, 15 V, 20 V).

Figure 8. Typical Maximum Continuous Output Current vs. RCL, VOUT = 5 V

This graph plots the maximum continuous output current against the current-limit set resistor (RCL) for VOUT = 5 V, with different input voltages (2.5 V, 3.5 V, 4.5 V).

Figure 9. Typical Maximum Continuous Output Current vs. RCL, VOUT = 15 V

This graph shows the maximum continuous output current against the current-limit set resistor (RCL) for VOUT = 15 V, with different input voltages (2.5 V, 3.5 V, 4.5 V).

Figure 10. Peak Current Limit of Switch vs. RCL, VOUT = 5 V

This graph illustrates the peak current limit of the switch versus the current-limit set resistor (RCL) for VOUT = 5 V, with different input voltages (2.5 V, 3.5 V, 4.5 V).

Figure 11. Peak Current Limit of Switch vs. VIN Over Temperature, VOUT = 5 V

This graph shows the peak current limit of the switch versus input voltage (VIN) over temperature for VOUT = 5 V.

Figure 12. Peak Current Limit of Switch vs. RCL, VOUT = 15 V

This graph displays the peak current limit of the switch versus the current-limit set resistor (RCL) for VOUT = 15 V, with different input voltages (2.5 V, 3.5 V, 4.5 V, 5.5 V).

Figure 13. Peak Current Limit of Switch vs. VIN over Temperature, VOUT = 15 V

This graph shows the peak current limit of the switch versus input voltage (VIN) over temperature for VOUT = 15 V.

Figure 14. Switch On Resistance vs. Input Voltage

This graph plots the switch on resistance against input voltage (VIN) at different temperatures (-40°C, +25°C, +125°C).

Figure 15. Maximum Duty Cycle vs. Input Voltage

This graph shows the maximum duty cycle against input voltage (VIN) at different temperatures (-40°C, +25°C, +125°C).

Figure 16. Nonswitching Quiescent Current vs. Input Voltage

This graph illustrates the nonswitching quiescent current versus input voltage (VIN) at different temperatures (-40°C, +25°C, +125°C).

Figure 17. Switching Quiescent Current vs. Input Voltage, fsw = 650 kHz

This graph shows the switching quiescent current versus input voltage (VIN) for fsw = 650 kHz at different temperatures (-40°C, +25°C, +125°C).

Figure 18. Switching Quiescent Current vs. Input Voltage, fsw = 1.3 MHz

This graph displays the switching quiescent current versus input voltage (VIN) for fsw = 1.3 MHz at different temperatures (-40°C, +25°C, +125°C).

Figure 19. EN Pin Current vs. EN Pin Voltage

This graph plots the EN pin current versus the EN pin voltage at different temperatures (-40°C, +25°C, +125°C).

Figure 20. SS Pin Current vs. Temperature

This graph shows the SS pin current versus temperature for different input voltages (2.5 V, 3.6 V, 5.5 V).

Figure 21. Startup, Css = 68 nF

This oscillograph shows the startup behavior of the ADP1614 with a 68 nF soft start capacitor, demonstrating output voltage, switch voltage, inductor current, and EN pin voltage over time.

Figure 22. 50 mA to 150 mA Load Transient, VIN = 3.6 V, VOUT = 5 V, fsw = 650 kHz

This oscillograph displays the load transient response for a change from 50 mA to 150 mA with VIN = 3.6 V, VOUT = 5 V, and fsw = 650 kHz.

Figure 23. 50 mA to 150 mA Load Transient, VIN = 3.6 V, VOUT = 5 V, fsw = 1.3 MHz

This oscillograph shows the load transient response for a change from 50 mA to 150 mA with VIN = 3.6 V, VOUT = 5 V, and fsw = 1.3 MHz.

Figure 24. 50 mA to 150 mA Load Transient, VIN = 5 V, VOUT = 15 V, fsw = 650 kHz

This oscillograph displays the load transient response for a change from 50 mA to 150 mA with VIN = 5 V, VOUT = 15 V, and fsw = 650 kHz.

Figure 25. 50 mA to 150 mA Load Transient, VIN = 5 V, VOUT = 15 V, fsw = 1.3 MHz

This oscillograph shows the load transient response for a change from 50 mA to 150 mA with VIN = 5 V, VOUT = 15 V, and fsw = 1.3 MHz.

Figure 26. Efficiency vs. Load Current, VIN = 5 V, fsw = 650 kHz

This graph illustrates the efficiency of the ADP1614 at different load currents for VIN = 5 V and fsw = 650 kHz, with output voltages of 8 V and 12 V.

Figure 27. Efficiency vs. Load Current, VIN = 5 V, fsw = 1.3 MHz

This graph shows the efficiency of the ADP1614 at different load currents for VIN = 5 V and fsw = 1.3 MHz, with output voltages of 8 V and 12 V.

Figure 28. Typical Maximum Continuous Output Current vs. VIN

This graph plots the maximum continuous output current against input voltage (VIN) for the ADP1614ACPZ-R7, with output voltages of 8 V and 12 V.

Figure 29. Peak Current Limit of Switch vs. VIN Over Temperature, VOUT = 12 V

This graph shows the peak current limit of the switch versus input voltage (VIN) over temperature for the ADP1614ACPZ-R7 and VOUT = 12 V.

Figure 30. Frequency vs. Input Voltage, fsw = 650 kHz

This graph illustrates the switching frequency versus input voltage (VIN) at different temperatures (-40°C, +25°C, +125°C) for fsw = 650 kHz.

Figure 31. Frequency vs. Input Voltage, fsw = 1.3 MHz

This graph shows the switching frequency versus input voltage (VIN) at different temperatures (-40°C, +25°C, +125°C) for fsw = 1.3 MHz.

Theory of Operation

The ADP1614 current-mode, step-up switching converter boosts a 2.5 V to 5.5 V input voltage to an output voltage as high as 20 V. The internal switch allows a high output current, and the 650 kHz/1.3 MHz switching frequency allows the use of tiny external components. The switch current is monitored on a pulse-by-pulse basis to limit the current to the value set by the RCL resistor on the CLRES pin on the adjustable current-limit version or to 3 A typical on the fixed current-limit version.

Figure 32. Block Diagram with Step-Up Regulator Application Circuit

This block diagram illustrates the internal workings of the ADP1614, including the error amplifier, PWM comparator, oscillator, current sensing, and driver. It also shows the external components required for a typical step-up regulator application circuit.

Current-Mode PWM Operation

The ADP1614 utilizes a current-mode PWM control scheme to regulate the output voltage over all load conditions. The output voltage is monitored at FB through a resistive voltage divider. The voltage at FB is compared with the internal 1.245 V reference by the internal transconductance error amplifier to create an error voltage at COMP. The current of the switch is internally measured and added to the stabilizing ramp. The resulting sum is compared with the error voltage at COMP to control the PWM modulator. This current-mode regulation system allows fast transient response while maintaining a stable output voltage. By selecting the proper resistor-capacitor network from COMP to GND, the regulator response is optimized for a wide range of input voltages, output voltages, and load conditions.

Adjustable Current Limit

A key feature of the ADP1614ACPZ-650-R7 and ADP1614ACPZ-1.3-R7 is a pin-adjustable peak current limit of up to 4 A. This adjustable current limit allows the other external components to be selected specifically for the application. The current limit is set via an external resistor connected from Pin 9 (CLRES) to ground. For the ADP1614ACPZ-R7, the current limit is fixed at 3 A.

Figure 33. Peak Current Limit of Switch vs. RCL

This graph shows the peak current limit of the switch versus the current-limit set resistor (RCL) for VOUT = 5 V and VOUT = 15 V, with VIN = 3.5 V.

Frequency Selection

The adjustable current-limit versions of the ADP1614 are internally programmed to operate at either 650 kHz or 1.3 MHz. Operation of the ADP1614 at 650 kHz (ADP1614ACPZ-650-R7) optimizes the efficiency of the device, whereas operation of the ADP1614 at 1.3 MHz (ADP1614ACPZ-1.3-R7) enables the device to be used with smaller external components. For the fixed current-limit version (ADP1614ACP-R7), the frequency is pin-selectable via the FREQ Pin (Pin 9). Connect FREQ to GND for 650 kHz operation or connect FREQ to VIN for 1.3 MHz operation. Do not leave the FREQ pin floating.

Soft Start

To prevent input inrush current to the converter when the part is enabled, connect a capacitor from SS to GND to set the soft start period. After the ADP1614 is turned on, SS sources 5 µA (typical) to the soft start capacitor (Css) until it reaches 1.23 V at startup. As the soft start capacitor charges, it limits the peak current allowed by the part to prevent excessive overshoot at startup. When the ADP1614 is disabled, the SS pin is internally shorted to GND to discharge the soft start capacitor.

Thermal Shutdown (TSD)

The ADP1614 includes TSD protection. If the die temperature exceeds 150°C (typical), TSD turns off the NMOS power device, significantly reducing power dissipation in the device and preventing output voltage regulation. The NMOS power device remains off until the die temperature is reduced to 130°C (typical). The soft start capacitor is discharged during TSD to ensure low output voltage overshoot and inrush currents when regulation resumes.

Undervoltage Lockout (UVLO)

If the input voltage is below the UVLO threshold, the ADP1614 automatically turns off the power switch and places the part into a low power consumption mode. This prevents potentially erratic operation at low input voltages and prevents the power device from turning on when the control circuitry cannot operate it. The UVLO levels have ~100 mV of hysteresis to ensure glitch-free startup.

Shutdown Mode

The EN pin turns the ADP1614 regulator on or off. Drive EN low to shut down the regulator and reduce the input current to 0.25 µA (typical). Drive EN high to turn on the regulator.

When the converter is in shutdown mode (EN ≤ 0.3 V), there is a dc path from the input to the output through the inductor and output rectifier. This causes the output voltage to remain slightly below the input voltage by the forward voltage of the rectifier, preventing the output voltage from dropping to ground when the regulator is shut down.

Regardless of the state of the EN pin, when a voltage is applied to the VIN pin, a large current spike occurs due to the non-isolated path through the inductor and diode between VIN and VOUT. The high current is a result of the output capacitor charging. The peak value is dependent on the inductor, output capacitor, and any load active on the output of the regulator.

Applications Information

ADIsimPOWER Design Tool

The ADP1614 is supported by the ADIsimPower™ design toolset. ADIsimPower is a collection of tools that produce complete power designs that are optimized for a specific design goal. The tools enable the user to generate a full schematic and bill of materials and to calculate performance in minutes. ADIsimPower can optimize designs for cost, area, efficiency, and parts count while taking into consideration the operating conditions and limitations of the IC and the external components. For more information about the ADIsimPower design tools, visit www.analog.com/ADIsimPower. The toolset is available from this website, and users can request an unpopulated board.

Setting the Output Voltage

The ADP1614 features an adjustable output voltage range of VIN to 20 V. The output voltage is set by the resistor voltage divider, R1 and R2 (see Figure 32), from the output voltage (VOUT) to the 1.245 V feedback input at FB. Use the following equation to determine the output voltage:

VOUT = 1.245 × (1 + R1/R2)

Choose R1 based on the following equation:

R1 = R2 × (VOUT / 1.245) - 1.245

Inductor Selection

The inductor is an essential part of the step-up switching converter. It stores energy during the on time of the power switch and transfers that energy to the output through the output rectifier during the off time. To balance the trade-offs between small inductor current ripple and efficiency, inductance values in the range of 4.7 µH to 22 µH are recommended. In general, lower inductance values have higher saturation current and lower series resistance for a given physical size. However, lower inductance values result in higher peak current, which can lead to reduced efficiency and greater input and/or output ripple and noise. A peak-to-peak inductor ripple current close to 30% of the maximum dc input current typically yields an optimal compromise.

For determining the inductor ripple current in continuous operation, the input (VIN) and output (VOUT) voltages determine the switch duty cycle (D) as follows:

D = (VOUT - VIN) / VOUT

The duty cycle and switching frequency (fsw) can be used to determine the on time:

tON = D / fsw

The inductor ripple current (ΔIL) in steady state is calculated by:

ΔIL = (VIN × tON) / L

Solve for the inductance value (L) as follows:

L = (VIN × tON) / ΔIL

Ensure that the peak inductor current (the maximum input current plus half the inductor ripple current) is below the rated saturation current of the inductor. Likewise, make sure that the maximum rated rms current of the inductor is greater than the maximum dc input current to the regulator.

For continuous current-mode (CCM) duty cycles greater than 50% that occur with input voltages less than one-half the output voltage, slope compensation is required to maintain stability of the current-mode regulator. For stable current-mode operation, ensure that the selected inductance is equal to or greater than the minimum calculated inductance, LMIN, for the application parameters in the following equation:

L > LMIN = (VOUT - 2 × VIN) / (8 × fsw)

Inductors smaller than the 4.7 µH to 22 µH recommended range can be used as long as Equation 7 is satisfied for the given application. For input/output combinations that approach the 90% maximum duty cycle, doubling the inductor is recommended to ensure stable operation. Table 5 suggests a series of inductors for use with the ADP1614.

Choosing the Input and Output Capacitors

The ADP1614 requires input and output bypass capacitors to supply transient currents while maintaining constant input and output voltages. Use low equivalent series resistance (ESR) capacitors of 10 µF or greater to prevent noise at the ADP1614 input. Place the capacitor between VIN and GND, as close as possible to the ADP1614. Ceramic capacitors are preferable because of their low ESR characteristics. Alternatively, use a high value, medium ESR capacitor in parallel with a 0.1 µF low ESR capacitor, placed as close as possible to the ADP1614.

The output capacitor maintains the output voltage and supplies current to the load while the ADP1614 switch is on. The value and characteristics of the output capacitor greatly affect the output voltage ripple and stability of the regulator. A low ESR ceramic dielectric capacitor is preferable. The output voltage ripple (ΔVOUT) is calculated as follows:

ΔVOUT = (IOUT × tON) / COUT

where:

Qc is the charge removed from the capacitor.

COUT is the output capacitance.

IOUT is the output load current.

tON is the on time of the switch.

The on time of the switch is determined as follows:

tON = D / fsw

The input (VIN) and output (VOUT) voltages determine the switch duty cycle (D) as follows:

D = (VOUT - VIN) / VOUT

Choose the output capacitor based on the following equation:

COUT ≥ (IOUT × (VOUT - VIN)) / (fsw × VOUT × ΔVOUT)

Multilayer ceramic capacitors are recommended for this application.

Diode Selection

The output rectifier conducts the inductor current to the output capacitor and load while the switch is off. For high efficiency, minimize the forward voltage drop of the diode. For this reason, using Schottky rectifiers is recommended. However, for high voltage, high temperature applications, where the Schottky rectifier reverse leakage current becomes significant and can degrade efficiency, use an ultrafast junction diode.

Many diode manufacturers derate the current capability of the diode as a function of the duty cycle. Verify that the output diode is rated to handle the average output load current with the minimum duty cycle. The minimum duty cycle in CCM of the ADP1614 is:

DMIN = VIN(MAX) / VOUT

where VIN(MAX) is the maximum input voltage.

The following are suggested Schottky diode manufacturers:

• ON Semiconductor
• Diodes, Inc.
• Toshiba
• ROHM Semiconductor

Loop Compensation

The ADP1614 uses external components to compensate the regulator loop, allowing optimization of the loop dynamics for a given application.

The step-up converter produces an undesirable right-half plane zero in the regulation feedback loop. This requires compensating the regulator such that the crossover frequency occurs well below the frequency of the right-half plane zero. The right-half plane zero is determined by the following equation:

Fz(RHP) = (VIN × RLOAD) / (2π × L)

where:

Fz(RHP) is the right-half plane zero.

RLOAD is the equivalent load resistance or the output voltage divided by the load current.

To stabilize the regulator, ensure that the regulator crossover frequency is less than or equal to one-fifth of the right-half plane zero.

The regulator loop gain is:

|AVL| = (VFB / VIN) × (VOUT / VOUT) × AVL

where:

AVL is the loop gain.

AVL = (VFB / VIN) × (VOUT / VOUT) × GMEA × ROUT || ZCOMP × GCS × ZOUT

VFB is the feedback regulation voltage, 1.245 V.

VOUT is the regulated output voltage.

VIN is the input voltage.

GMEA is the error amplifier transconductance gain.

ROUT = 67 MΩ.

ZCOMP is the impedance of the series RC network from COMP to GND.

GCS is the current sense transconductance gain (the inductor current divided by the voltage at COMP), which is internally set by the ADP1614.

ZOUT is the impedance of the load in parallel with the output capacitor.

To determine the crossover frequency, it is important to note that at the crossover frequency, the compensation impedance (ZCOMP) is dominated by a resistor, and the output impedance (ZOUT) is dominated by the impedance of an output capacitor. Therefore, when solving for the crossover frequency, the equation (by definition of the crossover frequency) is simplified to:

|AVL| = (VFB / VIN) × (VOUT / VOUT) × GMEA × RCOMP × GCS × (1 / (2π × fc × COUT))

where:

RCOMP is the compensation resistor.

fc is the crossover frequency.

Solve for RCOMP as follows:

RCOMP = (2π × fc × COUT × (VOUT)²) / (VFB × VIN × GMEA × GCS)

where:

VFB = 1.245 V.

GMEA = 150 µA/V.

GCS = 7 A/V.

Therefore,

RCOMP = (4806 × fc × COUT × (VOUT)²) / VIN

After the compensation resistor is known, set the zero formed by the compensation capacitor and resistor to one-fourth of the crossover frequency, or:

CCOMP = 2 / (π × fc × RCOMP)

Capacitor C2 is chosen to cancel the zero introduced by the ESR of the output capacitor.

Solve for C2 as follows:

C2 = (ESR × COUT) / RCOMP

If a low ESR, ceramic output capacitor is used for COUT, C2 is optional. For optimal transient performance, RCOMP and CCOMP might need to be adjusted by observing the load transient response of the ADP1614. For most applications, the compensation resistor should be within the range of 1 kΩ to 100 kΩ, and the compensation capacitor should be within the range of 100 pF to 10 nF.

Soft Start Capacitor

Upon startup (EN ≥ 1.6 V) or fault recovery, the voltage at SS ramps up slowly by charging the soft start capacitor (Css) with an internal 5.5 µA current source (Iss). As the soft start capacitor charges, it limits the peak current allowed by the part to prevent excessive overshoot at startup. Use the following equation to determine the necessary value of the soft start capacitor (Css) for a specific overshoot and start-up time when the part is at the current limit with maximum load:

Css = (Iss × Δt) / VSS

where:

Iss = 5.5 µA (typical).

Δt is the start-up time at the current limit.

VSS = 1.23 V (typical).

If the applied load does not place the part at the current limit, the value of Css can be reduced. A 68 nF soft start capacitor results in negligible input current overshoot at startup and, therefore, is suitable for most applications. If an unusually large output capacitor is used, a longer soft start period is required to prevent input inrush current.

However, if fast startup is required, the soft start capacitor can be reduced or removed, which allows the ADP1614 to start quickly but with greater peak switch current.

PCB Layout Guidelines

For high efficiency, good regulation, and stability, a well designed PCB layout is required.

Use the following guidelines when designing PCBs (see Figure 32 for a block diagram and Figure 3 for a pin configuration).

• Keep the low ESR input capacitor (CIN), which is labeled as C4 in Figure 35, close to VIN and GND. This minimizes noise injected into the part from board parasitic inductance.
• Keep the high current path from CIN through the L1 inductor to SW and GND as short as possible.
• Keep the high current path from VIN through the inductor (L1), the rectifier (D1), and the output capacitor (COUT), which is labeled as C7 in Figure 35, as short as possible.
• Keep high current traces as short and as wide as possible.
• Place the feedback resistors as close to FB as possible to prevent noise pickup. Connect the ground of the feedback network directly to an AGND plane that makes a Kelvin connection to the GND pin.
• Place the compensation components as close as possible to COMP. Connect the ground of the compensation network directly to an AGND plane that makes a Kelvin connection to the GND pin.
• Connect the soft start capacitor (Css), which is labeled as C1 in Figure 35, as close as possible to the device. Connect the ground of the soft start capacitor to an AGND plane that makes a Kelvin connection to the GND pin.
• Connect the current-limit set resistor (RCL), which is labeled as R4 in Figure 35, as close as possible to the device. Connect the ground of the CL resistor to an AGND plane that makes a Kelvin connection to the GND pin.
• The PCB must be properly designed to conduct the heat away from the package. This is achieved by adding thermal vias to the PCB, which provide a thermal path to the inner or bottom layers. Thermal vias should be placed on the PCB underneath the exposed pad of the LFCSP and in the GND plane around the ADP1614 package to improve thermal performance of the package.
• Avoid routing high impedance traces from the compensation and feedback resistors near any node connected to SW or near the inductor to prevent radiated noise injection.

Figure 35. ADP1614 Recommended Top Layer Layout for the Adjustable Current-Limit Boost Application

This figure shows a recommended top layer PCB layout for the ADP1614 with an adjustable current limit boost application.

Figure 36. ADP1614 Recommended Bottom Layer Layout for the Adjustable Current-Limit Boost Application

This figure displays a recommended bottom layer PCB layout for the ADP1614 with an adjustable current limit boost application.

Outline Dimensions

Figure 37. 10-Lead Lead Frame Chip Scale Package [LFCSP_WD] 3 mm x 3 mm Body, Very Very Thin, Dual Lead (CP-10-9)

This diagram shows the outline dimensions of the 10-lead LFCSP_WD package in millimeters.

Ordering Guide

¹ Z = RoHS Compliant Part.