Texas Instruments TPS3306 Dual-Processor Supervisory Circuits with Power-Fail

Features

Applications

Description

The TPS3306 family is a series of supervisory circuits designed for circuit initialization which require two supply voltages, primarily in DSP and processor-based systems. The product spectrum of the TPS3306-xx is designed for monitoring two independent supply voltages of 3.3 V/1.5 V, 3.3V/1.8 V, 3.3 V/2 V, 3.3 V/2.5 V, or 3.3 V/5 V.

During power-on, RESET is asserted when the supply voltage VDD becomes higher than 1.1 V. Thereafter, the supervisory circuits monitor the SENSEn inputs and keep RESET active as long as SENSEn remains below the threshold voltage VIT.

An internal timer delays the return of the RESET output to the inactive state (high) to ensure proper system reset. The delay time, td(typ) = 100 ms, starts after SENSE1 and SENSE2 inputs have risen above the threshold voltage VIT. When the voltage at SENSE1 or SENSE2 input drops below the threshold voltage VIT, the output becomes active (low) again.

The integrated power-fail (PFI) comparator with separate open-drain (PFO) output can be used for low-battery detection, power-fail warning, or for monitoring a power supply other than the main supply.

The TPS3306-xx devices integrate a watchdog timer that is periodically triggered by a positive or negative transition of WDI. When the supervising system fails to retrigger the watchdog circuit within the time-out interval, tt(out) = 0.50 s, RESET becomes active for the time period td. This event also reinitializes the watchdog timer. Leaving WDI unconnected disables the watchdog.

The TPS3306-xx devices are available in either 8-pin MSOP or standard 8-pin SO packages, and are characterized for operation over a temperature range of –40°C to +85°C.

Typical Operating Circuit

A typical operating circuit diagram shows the TPS3306-15 connected to a TMS320 VC5441 DSP. The circuit includes resistors R1, R2, R3, and R4, with voltage inputs SENSE1 and SENSE2, a watchdog input WDI, a power-fail input PFI, and outputs RESET and PFO. VDD and GND are the power supply connections.

Functional Block Diagram

The functional block diagram illustrates the internal components of the TPS3306. It includes Sense inputs (SENSE1, SENSE2) connected through resistors to voltage dividers, a reference voltage of 1.25 V, a RESET logic and timer block, an oscillator, a watchdog logic and timer block, and a power-fail comparator (PFI) with a power-fail output (PFO).

Timing Diagram

The timing diagram shows the relationship between SENSEn voltage, WDI input, and the RESET output during power-up, power-down, and watchdog events. It illustrates delay times (td) and watchdog time-out (tt(out)).

Table 1. Supply Voltage Monitoring

DEVICE NOMINAL SUPERVISED VOLTAGE THRESHOLD VOLTAGE (TYP)
SENSE1 SENSE2 SENSE1 SENSE2
TPS3306-15 3.3 V 1.5 V 2.93 V 1.4 V
TPS3306-18 3.3 V 1.8 V 2.93 V 1.68 V
TPS3306-20 3.3 V 2 V 2.93 V 1.85 V
TPS3306-25 3.3 V 2.5 V 2.93 V 2.25 V
TPS3306-33 5 V 3.3 V 4.55 V 2.93 V

Table 4. Terminal Functions

TERMINAL NAME NO. I/O DESCRIPTION
GND 4 Ground
PFI 3 I Power-fail comparator input
PFO 6 O Power-fail comparator output, open-drain
RESET 5 O Active-low reset output, open-drain
SENSE1 1 I Sense voltage input 1
SENSE2 2 I Sense voltage input 2
WDI 7 I Watchdog timer input
VDD 8 I Supply voltage

Detailed Description

Watchdog

In a microprocessor- or DSP-based system, it is important to ensure correct program execution. The watchdog timer ensures that the program is not stalled in an indefinite loop. The microprocessor, microcontroller, or DSP typically has to toggle the watchdog input (WDI) within 0.8 seconds to avoid a time-out. Either a low-to-high or a high-to-low transition resets the internal watchdog timer. If WDI is unconnected or tied with a high impedance driver, the watchdog is disabled and will be retriggered internally.

Saving Current While Using the Watchdog

The watchdog input is internally driven low during the first 7/8 of the watchdog time-out period, then momentarily pulses high, resetting the watchdog counter. For minimum watchdog input current, leave WDI low for the majority of the watchdog time-out period, pulsing it low-high-low once within 7/8 of the watchdog time-out period to reset the watchdog timer. If instead WDI is externally driven high for the majority of the time-out period, a current of 5 V/40 kΩ = 125 µA can flow into WDI.

Power-Fail Comparator (PFI and PFO)

An additional comparator is provided to monitor voltages other than the nominal supply voltage. The power-fail-input (PFI) will be compared with an internal voltage reference of 1.25 V. If the input voltage falls below the power-fail threshold (VPFI) of typ. 1.25 V, the power-fail output (PFO) goes low. If it goes above 1.25 V plus about 10 mV hysteresis, the output returns to high. By connecting two external resistors, it is possible to supervise any voltages above 1.25 V. The sum of both resistors should be about 1 MΩ, to minimize power consumption and also to assure that the current in the PFI pin can be neglected compared with the current through the resistor network. The tolerance of the external resistors should be not more than 1% to ensure minimal variation of sensed voltage. If the power-fail comparator is unused, connect PFI to ground and leave PFO unconnected.

Electrical Characteristics

This section details the electrical characteristics of the TPS3306 family, including low-level output voltage, power-up reset voltage, input threshold voltages, hysteresis, input currents, supply current, and input capacitance.

Timing Requirements

This section outlines the timing requirements for the TPS3306 devices, including pulse width for SENSEn and WDI, and propagation delay times for RESET and PFO outputs.

Switching Characteristics

This section provides switching characteristics such as watchdog time-out, delay time, and propagation delay times for various transitions.

Typical Characteristics

This section includes graphs illustrating typical characteristics, such as normalized sense threshold voltage versus free-air temperature, supply current versus supply voltage, low-level output voltage versus low-level output current, and minimum pulse duration at sense versus threshold overdrive.

Package Option Addendum

The package option addendum provides details on available orderable devices, their status, package type, package drawing, quantity, eco plan, lead/ball finish, MSL peak temp, operating temperature, and device marking.

Package Materials Information

This section details tape and reel information, including reel dimensions and tape dimensions, as well as tape and reel box dimensions for various package types.

Mechanical Data

This section provides mechanical data for the DGK (S-PDSO-G8) and D (R-PDSO-G8) plastic small-outline packages, including linear dimensions and notes on tolerances and variations.

Land Pattern Data

This section provides land pattern data for the D (R-PDSO-G8) plastic small-outline package, including example board layout and stencil openings.

Important Notice

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