AP66200FVBW-EVM: 3.8V to 60V Input, 2A Low IQ Sync Buck Converter Evaluation Board

Description

The AP66200 is an adjustable switching frequency, internally compensated, synchronous DC-DC Buck converter with a default internal frequency of 500kHz. The device fully integrates a 185mΩ high-side power MOSFET and an 80mΩ low-side power MOSFET to provide highly efficient step-down DC-DC conversion.

The AP66200 enables a continuous load current of up to 2A with as high as 95% efficiency in enhanced bias. It features current mode control operation, which enables easy loop stabilization while supporting a wide range of output capacitive loads.

With its high level of integration and minimal need for external components, the AP66200 simplifies board layout and reduces space requirements. This makes it ideal for distributed power architectures.

The AP66200 is available in the standard Green U-QFN4040-16/SWP (Type UXB) package.

Features

• VIN: 3.8V to 60V
• 2A Continuous Output Current
• VOUT Adjustable from 0.8V to 50V
• Enhanced Efficiency Mode with Bias
• Adjustable Switching Frequency (500kHz Default)
• Start-up with Pre-biased Output
• External Soft-Start with Tracking (Sequential, Ratiometric, or Absolute) - Default Internal Soft-Start of 2ms
• Enable Pin with 5% tolerance
• Soft Discharge
• ±5% Power Good Detection with Internal Pull-up Resistor
• Overcurrent Protection (OCP) with Hiccup
• Totally Lead-Free & Fully RoHS Compliant
• Halogen and Antimony Free ("Green" Device)
• An automotive-compliant part is available under separate datasheet (AP66200Q)

Applications

• General Purpose Point-of-load DC-DC Power Conversion
• Telecommunications systems
• Distributed Power Supplies
• Home Audio Devices
• Consumer Electronics
• Network Systems
• FPGA, DSP and ASIC Supplies
• Green Electronics

Typical Applications Circuit

Description: The typical application circuit shows the AP66200 integrated circuit connected with external components including input capacitor (CIN), output capacitors (COUT), inductor (L1), feedback resistors (R1, R2), and various control pins (VIN, EN, SS/TR, MSYNC, FS, FB, VOUT, BIAS, VCC, GND, PGND). The circuit illustrates a standard buck converter configuration.

Absolute Maximum Ratings

Recommended Operating Conditions

Ordering Information

Evaluation Board

Description: A photograph of the AP66200FVBW-EVM evaluation board shows the physical layout of components. Key connectors and test points are labeled, including VIN, VOUT, PGND, EN, SW, MSYNC, FS, and JP connectors for configuration. The main IC (U1) and passive components like inductors, capacitors, and resistors are visible.

Quick Start Guide

The AP66200 EVM board offers a simple layout for evaluating the AP66200. Follow these steps:

1. Insert jumpers to configure EVM settings as per the Application Information section of the datasheet.
2. Use jumper JP3 (100kΩ to VIN) to set the device as enabled.
3. Alternatively, remove jumpers JP3 and connect an external voltage source to the EN pin.
4. Use jumper JP5 to set FS to default 500kHz (VCC) or 2.5MHz (GND).
5. Use jumper JP1 to set MSYNC to forced PWM (VCC) or PFM (GND) operation.
6. For synchronization with a positive edge trigger and PWM, remove jumper JP1 and force an external clock source on the MSYNC pin.
7. Use jumper JP6 for the default external soft start (C7) of 2ms.
8. To use the internal soft start of 1.7ms, remove jumper JP6 and use jumper JP7 (VCC).
9. Use jumper JP4 to connect the BIAS pin to PGND.
10. Use jumper JP2 to connect the BIAS pin to VOUT.
11. To connect an external voltage source to the BIAS pin (<15V), remove JP2 and JP4.
12. Connect a 12V power supply between the VIN and PGND terminals. Ensure the power supply is turned off before connecting.
13. Connect an adjustable current or resistive load to the VOUT and PGND terminals.
14. Turn on the power supply only after all connections are completed and checked.
15. The EVM board should power up with a 5V output voltage.
16. Increase the load current and observe the output voltage change.
17. Check for stable operation of the SW and VOUT signals on the oscilloscope.
18. Measure the switching frequency on the SW probe jack in the EVM board.
19. Measure the output ripple on the VOUT probe jack in the EVM board.

Measurement/Performance Guidelines:

1. When measuring output voltage ripple, use the shortest possible ground lengths on the oscilloscope probe. Long ground leads can inject high-frequency noise into the measured ripple.

Evaluation Board Schematic

Description: The schematic diagram illustrates the detailed internal connections of the AP66200FVBW-EVM. It shows the AP66200 IC (U1) with all its pins connected to external components such as capacitors (C1-C10), resistors (R1-R4), inductor (L1), and jumper headers (JP1-JP7). The diagram includes power input (VIN), output (VOUT), control signals (EN, MSYNC, FS), and ground (PGND, GND).

PCB Layout

Description: The PCB layout figures show the physical arrangement of components and traces on different layers of the evaluation board.

• Top Layer (Figure 4): Displays the placement of major components like the AP66200 IC (U1), inductor (L1), capacitors (C1-C10), resistors (R1-R4), and jumper headers (JP1-JP7) on the top surface of the PCB. Traces connecting these components are also visible.
• Layer 2 (Figure 5): Shows the internal routing of traces on the second layer of the PCB, including power and ground planes.
• Layer 3 (Figure 6): Depicts the internal routing on the third layer of the PCB.
• Bottom Layer (Figure 7): Illustrates the component placement and trace routing on the bottom surface of the PCB, including mounting holes and ground pads.

Bill of Materials for AP66200 EVM

Typical Performance Characteristics

The document includes graphs illustrating the efficiency of the AP66200 converter under various conditions:

• Figure 8: PFM Efficiency vs. IOUT, VOUT=5V, L=10μH: Shows efficiency curves for different input voltages (VIN=12V, 24V, 48V, 60V) as a function of output current (IOUT) in PFM mode.
• Figure 9: PWM Efficiency vs. IOUT, VOUT=5V, L=10μH: Displays efficiency curves for different input voltages (VIN=12V, 24V, 48V, 60V) as a function of output current (IOUT) in PWM mode.
• Figure 10: PFM Efficiency vs. IOUT, VOUT=3.3V, L=8.2μH: Presents efficiency curves for different input voltages (VIN=12V, 24V, 48V, 60V) as a function of output current (IOUT) in PFM mode.
• Figure 11: PWM Efficiency vs. IOUT, VOUT=3.3V, L=8.2μH: Shows efficiency curves for different input voltages (VIN=12V, 24V, 48V, 60V) as a function of output current (IOUT) in PWM mode.

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