Intel Nios II and Embedded IP Release Notes

About This Document

This document provides essential information regarding the Intel® Quartus® Prime software version, focusing on:

Nios® II Embedded Design Suite (EDS)
Nios II Processor IP
Embedded IP cores

It covers Nios II release information from version 16.1 onwards. For earlier release details, consult the Nios II Embedded Design Suite Release Notes (Archived).

Nios II Embedded Design Suite (EDS)

This section details the release information for the Nios II Embedded Design Suite (EDS) across various Intel Quartus Prime software versions, including updates to toolchains and licensing information.

For specific toolchain versions, refer to the detailed tables provided within the document.

Nios II Processor IP Core

Explore the release history and key updates for the Nios II Processor IP core. This includes information on device support and changes related to Platform Designer integration.

For more in-depth information, refer to the Nios II Processor Reference Guide.

Embedded IP Cores

Discover the release information for various Embedded IP cores, including added support for new IP cores, parameter updates, and bug fixes across different Intel Quartus Prime software versions.

For more details on specific IP cores, consult the Embedded Peripherals IP User Guide.

Document Revision History

Review the history of document updates, noting the Intel Quartus Prime software versions covered in each revision.

	Intel Nios V Processor FPGA IP Release Notes: Version History and Updates Comprehensive release notes for Intel's Nios V Processor FPGA IP, detailing updates, bug fixes, and new features across various versions (Nios V/m, Nios V/g) compatible with Intel Quartus Prime Design Suite.
	Intel Nios V/m Processor Quick Start Guide This Intel Nios V/m Processor Quick Start Guide (UG-20345) provides a comprehensive introduction to developing embedded systems on Intel FPGAs. It covers hardware and software setup for version 21.3 of Intel Quartus Prime, generating example designs, software development, programming, simulation, and debugging for the RISC-V based Nios V/m processor.
	Nios II Gen2 Migration Guide: Migrating Embedded Systems from Classic to Gen2 Processors A comprehensive guide for migrating embedded systems from the Altera Nios II Classic processor to the Nios II Gen2 processor, detailing hardware and software changes, feature enhancements, and migration steps.
	英特尔® FPGA 产品目录 (22.4 版本) - 全面指南探索英特尔® FPGA 产品目录 22.4 版本，了解英特尔广泛的 FPGA、SoC、结构化 ASIC 和 CPLD 产品组合，包括 Agilex™、Stratix®、Arria®、Cyclone® 和 MAX® 系列，以及相关的设计工具和解决方案。
	25G Ethernet Intel FPGA IP Release Notes Comprehensive release notes detailing updates, bug fixes, and new features for Intel's 25G Ethernet FPGA IP across Intel Agilex, Stratix 10, and Arria 10 device families, including versioning information and compatibility with Intel Quartus Prime software.
	Scalable Switch Intel FPGA IP for PCI Express User Guide \| Intel User guide for Intel's Scalable Switch FPGA IP for PCI Express. Features include a configurable switch architecture, upstream and downstream port connectivity, Hot Plug support, and integration with Intel P-Tile Avalon Streaming IP for PCIe Gen3 x16. Compatible with Intel Stratix 10 DX and Agilex FPGAs.
	Intel Quartus Prime Standard Edition v20.1 Software and Device Support Release Notes Comprehensive release notes for Intel Quartus Prime Standard Edition version 20.1, covering new features, software behavior updates, operating system compatibility, memory requirements, device support status, EDA tool integration, resolved issues, software patches, and revision history for FPGA design.
	Intel Agilex FPGA IP: Triple-Speed Ethernet Design Example User Guide This user guide from Intel provides detailed instructions for generating, simulating, and compiling design examples for the Triple-Speed Ethernet Intel Agilex FPGA IP. It covers essential steps for Ethernet MAC functionality, including simulation scripts, hardware testing, and functional descriptions for developers.