Instruction Manual for NXP models including: i.MX 8M Mini Applications Processor, Mini Applications Processor, Applications Processor, Processor
i.MX 8M Mini Applications Processor Reference Manual
19 ago 2022 — The i.MX 8M Mini Media Applications Processor is built to achieve both high performance and low power consumption and relies on a powerful fully coherent ...
File Info : application/pdf, 10 Pages, 1.66MB
DocumentDocumentPreview of i.MX 8M Mini Applications Processor Reference Manual Get entire Reference Manual (5319 pages, PDF) Document Number: IMX8MMRM Rev. 3, 11/2020 Section number Contents Title Page Chapter 1 Introduction 1.1 Product Overview ........................................................................................................................................................ 7 1.2 Target Applications.......................................................................................................................................................7 1.3 Acronyms and Abbreviations....................................................................................................................................... 7 1.4 Features......................................................................................................................................................................... 10 1.5 Architectural Overview.................................................................................................................................................16 1.6 Primary Boot Options................................................................................................................................................... 17 1.7 Endianness Support.......................................................................................................................................................18 Chapter 2 Memory Map 2.1 Memory.........................................................................................................................................................................19 Chapter 3 Security 3.1 System Security............................................................................................................................................................ 33 3.2 Resource Domain Controller (RDC)............................................................................................................................ 35 Chapter 4 ARM Platform and Debug 4.1 ARM Cortex A53 Platform (A53)................................................................................................................................ 79 4.2 ARM Cortex M4 Platform (M4)...................................................................................................................................85 4.3 Messaging Unit (MU)................................................................................................................................................... 117 4.4 Semaphore (SEMA4)....................................................................................................................................................156 4.5 On-Chip RAM Memory Controller (OCRAM)............................................................................................................174 4.6 Network Interconnect Bus System (NIC)..................................................................................................................... 177 4.7 AHB to IP Bridge (AIPSTZ)........................................................................................................................................ 178 4.8 Shared Peripheral Bus Arbiter (SPBA).........................................................................................................................200 4.9 System Counter (SYS_CTR)........................................................................................................................................ 214 4.10 TrustZone Address Space Controller (TZASC)........................................................................................................... 252 i.MX 8M Mini Applications Processor Reference Manual, Rev. 3, 11/2020 NXP Semiconductors 3 Section number Title Page 4.11 System Debug............................................................................................................................................................... 254 4.12 System JTAG Controller (SJC).................................................................................................................................... 258 Chapter 5 Clocks and Power Management 5.1 Clock Control Module (CCM)......................................................................................................................................289 5.2 General Power Controller (GPC)..................................................................................................................................618 5.3 Crystal Oscillator (XTALOSC).................................................................................................................................... 758 5.4 Thermal Monitoring Unit (TMU)................................................................................................................................. 762 Chapter 6 SNVS, Reset, Fuse, and Boot 6.1 System Boot.................................................................................................................................................................. 777 6.2 Fusemap........................................................................................................................................................................ 855 6.3 On-Chip OTP Controller (OCOTP_CTRL)..................................................................................................................865 6.4 Secure Non-Volatile Storage (SNVS).......................................................................................................................... 894 6.5 System Reset Controller (SRC).................................................................................................................................... 928 6.6 Watchdog Timer (WDOG)........................................................................................................................................... 978 Chapter 7 Interrupts and DMA 7.1 Interrupts and DMA Events.......................................................................................................................................... 995 7.2 Smart Direct Memory Access Controller (SDMA)...................................................................................................... 1010 Chapter 8 Chip IO and Pinmux 8.1 External Signals and Pin Multiplexing......................................................................................................................... 1259 8.2 IOMUX Controller (IOMUXC)....................................................................................................................................1275 8.3 General Purpose Input/Output (GPIO)......................................................................................................................... 1685 Chapter 9 External Memory 9.1 External Memory Overview......................................................................................................................................... 1705 9.2 DDR Controller (DDRC)..............................................................................................................................................1707 9.3 DDR PHY (DDR_PHY)............................................................................................................................................... 1906 i.MX 8M Mini Applications Processor Reference Manual, Rev. 3, 11/2020 4 NXP Semiconductors Section number Title Page 9.4 AHB-to-APBH Bridge with DMA (APBH-Bridge-DMA).......................................................................................... 2221 9.5 62BIT Correcting ECC Accelerator (BCH)..................................................................................................................2259 9.6 General Purpose Media Interface (GPMI)....................................................................................................................2316 Chapter 10 Mass Storage 10.1 Enhanced Configurable SPI (ECSPI)........................................................................................................................... 2367 10.2 FlexSPI Controller (FlexSPI)........................................................................................................................................2396 10.3 Ultra Secured Digital Host Controller (uSDHC).......................................................................................................... 2520 Chapter 11 Connectivity 11.1 Universal Serial Bus Controller (USB).........................................................................................................................2651 11.2 Universal Serial Bus 2.0 PHY (USB2_PHY)............................................................................................................... 2927 11.3 PCI Express (PCIe)....................................................................................................................................................... 2940 11.4 PCI Express PHY (PCIe_PHY).................................................................................................................................... 3316 11.5 Ethernet MAC (ENET)................................................................................................................................................. 3702 Chapter 12 Timers 12.1 General Purpose Timer (GPT)...................................................................................................................................... 3855 12.2 Pulse Width Modulation (PWM).................................................................................................................................. 3877 Chapter 13 Multimedia 13.1 Multimedia Overview................................................................................................................................................... 3891 13.2 Display Block Control (DISPLAY_BLK_CTRL)........................................................................................................3897 13.3 Enhanced LCD Interface (eLCDIF)..............................................................................................................................3924 13.4 CSI Bridge (CSI)...........................................................................................................................................................3967 13.5 MIPI CSI Host Controller (MIPI_CSI).........................................................................................................................4004 13.6 MIPI DSI Host Controller (MIPI_DSI)........................................................................................................................ 4054 13.7 MIPI D-PHY (MIPI_DPHY)........................................................................................................................................4123 13.8 Sony/Philips Digital Interface (SPDIF)........................................................................................................................ 4175 13.9 PDM Microphone Interface (MICFIL).........................................................................................................................4211 i.MX 8M Mini Applications Processor Reference Manual, Rev. 3, 11/2020 NXP Semiconductors 5 Section number Title Page 13.10 Synchronous Audio Interface (SAI)............................................................................................................................. 4267 Chapter 14 Graphics Processing Unit (GPU) 14.1 GPU Overview..............................................................................................................................................................4321 14.2 2D Graphics Processing Unit (GPU2D)....................................................................................................................... 4322 14.3 3D Graphics Processing Unit (GPU3D)....................................................................................................................... 4336 Chapter 15 Video Processing Unit (VPU) 15.1 VPU Block Control (VPU_BLK_CTRL).....................................................................................................................4343 15.2 VPU G1 (VPU_G1)...................................................................................................................................................... 4350 15.3 VPU G2 (VPU_G2)...................................................................................................................................................... 4523 15.4 VPU H1 (VPU_H1)...................................................................................................................................................... 4757 Chapter 16 Low Speed Communication and Interconnects 16.1 I2C Controller (I2C)..................................................................................................................................................... 5215 16.2 Universal Asynchronous Receiver/Transmitter (UART)............................................................................................. 5238 i.MX 8M Mini Applications Processor Reference Manual, Rev. 3, 11/2020 6 NXP Semiconductors Chapter 1 Introduction 1.1 Product Overview This chapter introduces the architecture of the i.MX 8M Mini Applications Processor. The i.MX 8M Mini is a family of products focused on delivering an excellent video and audio experience, combining media-specific features with high-performance processing optimized for low-power consumption. 1.2 Target Applications The i.MX 8M Mini Media Applications Processor is built to achieve both high performance and low power consumption and relies on a powerful fully coherent core complex based on a quad Cortex-A53 cluster with video and graphics accelerators. The i.MX 8M Family provides additional computing resources and peripherals: · Advanced security modules for secure boot, cipher acceleration and DRM support · General purpose Cortex-M4 processor for low power processing · A wide range of audio interfaces including I2S, AC97, TDM and S/PDIF · Large set of peripherals that are commonly used in consumer/industrial markets including USB 2.0, PCIe and Ethernet 1.3 Acronyms and Abbreviations The table below contains acronyms and abbreviations used in this document. Acronyms and Abbreviated Terms i.MX 8M Mini Applications Processor Reference Manual, Rev. 3, 11/2020 NXP Semiconductors 7 Acronyms and Abbreviations Term ADC AHB AIPS ALU AMBA APB ASRC AXI BIST CA/CM CAAM CA53 CAN CPU CSI CSU CTI D-cache DAP DDR DMA DPLL DRAM ECC ECSPI LPSPI EDMA EIM ENET EPIT EPROM ETF ETM FIFO GIC GPC GPIO GPR GPS GPT GPU Meaning Analog-to-Digital Converter Advanced High-performance Bus Arm IP Bus Arithmetic Logic Unit Advanced Microcontroller Bus Architecture Advanced Peripheral Bus Asynchronous Sample Rate Converter Advanced eXtensible Interface Built-In Self Test Arm Cortex-A/Cortex-M Cryptographic Acceleration and Assurance Module ARM Cortex A53 Core Controller Area Network Central Processing Unit CMOS Sensor Interface Central Security Unit Cross Trigger Interface Data cache Debug Access Port Double data rate Direct memory access Digital phase-locked loop Dynamic random access memory Error correcting codes Enhanced Configurable SPI Low-power SPI Enhanced Direct Memory Access External Interface Module Ethernet Enhanced Periodic Interrupt Timer Erasable Programmable Read-Only Memory Embedded Trace FIFO Embedded Trace Macrocell First-In-First-Out General Interrupt Controller General Power Controller General-Purpose I/O General-Purpose Register Global Positioning System General-Purpose Timer Graphics Processing Unit Table continues on the next page... i.MX 8M Mini Applications Processor Reference Manual, Rev. 3, 11/2020 8 NXP Semiconductors Term GPV HAB I-cache I2C or I2C IC IEEE IOMUX IP IrDA JTAG ELCDIF LDO LIFO LRU LSB LUT LVDS MAC MCM MMC MSB MT/s OCRAM OCOTP PCI PCIe PCMCIA PGC PIC PMU POR PSRAM PWM PXP QoS R2D RISC ROM ROMCP RTOS Rx Chapter 1 Introduction Meaning Global Programmers View High-Assurance Boot Instruction cache Inter-Integrated Circuit Integrated Circuit Institute of Electrical and Electronics Engineers Input-Output Multiplexer Intellectual Property Infrared Data Association Joint Test Action Group (a serial bus protocol usually used for test purposes) Liquid Crystal Display Interface Low-Dropout Last-In-First-Out Least-Recently Used Least-Significant Byte Look-Up Table Low Voltage Differential Signaling Medium Access Control Miscellaneous Control Module Multimedia Card Most-Significant Byte Mega Transfers per second On-Chip Random-Access Memory On-Chip One-Time Programmable Controller Peripheral Component Interconnect PCI express Personal Computer Memory Card International Association Power Gating Controller Programmable Interrupt Controller Power Management Unit Power-On Reset Pseudo-Static Random Access Memory Pulse Width Modulation Pixel Pipeline Quality of Service Radians to Degrees Reduced Instruction Set Computing Read-Only Memory ROM Controller with Patch Real-Time Operating System Receive Table continues on the next page... i.MX 8M Mini Applications Processor Reference Manual, Rev. 3, 11/2020 NXP Semiconductors 9 Features Term SAI SCU SD SDIO SDLC SDMA SIM SNVS SoC SPBA SPDIF SPI SRAM SRC TFT TPIU TSGEN Tx TZASC UART USB USDHC WDOG WLAN WXGA Meaning Synchronous Audio Interface Snoop Control Unit Secure Digital Secure Digital Input/Output Synchronous Data Link Control Smart DMA Subscriber Identification Module Secure Non-Volatile Storage System-on-Chip Shared Peripheral Bus Arbiter Sony Phillips Digital Interface Serial Peripheral Interface Static Random-Access Memory System Reset Controller Thin-Film Transistor Trace Port Interface Unit Time Stamp Generator Transmit TrustZone Address Space Controller Universal Asynchronous Receiver/Transmitter Universal Serial Bus Ultra Secured Digital Host Controller Watchdog Wireless Local Area Network Wide Extended Graphics Array 1.4 Features 1.4.1 Arm Cortex-A53 MPCoreTM Platform The i.MX 8M Family Applications Processors are based on the Arm Cortex-A53 MPCoreTM Platform, which has the following features: · Quad symmetric Cortex-A53 processors, including: · 32 KB L1 Instruction Cache · 32 KB L1 Data Cache i.MX 8M Mini Applications Processor Reference Manual, Rev. 3, 11/2020 10 NXP Semiconductors Continue Reading This Reference Manual Get entire reference manual (5319 pages, PDF) Stay informed when design resources related to this product are updated. Go to i.MX 8M Mini i.MX 8M Plus Applications Processor Reference Manual, Rev. 1, 06/2021 11 NXP Semiconductors