Cobra 39 LTD Service Manual

Table of Contents

• Unit Specifications & Frequency Listings
• Controls & Indicators
• Theory of Operation
• PLL Block Diagram
• Frequency Listings
• Test Equipment Set-up
• Alignment Procedure
• Parts Layout Component Side
• Parts Layout Pattern Side
• Transistors & IC's Voltage Charts
• Schematic Diagram
• Functional Block Diagram
• Logic Table
• Semiconductor Pin Configuration
• Internal Diagram IC's
• Wiring Diagram
• Exploded View
• Exploded View Part List
• Replacement Parts List

Unit Specifications & Frequency Listing

Controls & Indicators

The Cobra "S.O.S." Emergency 2-Way Radio features the following controls and indicators:

• Antenna: The primary antenna for signal transmission and reception.
• Power Cable: Connects the unit to a 12V DC power source, typically a cigarette lighter adapter.
• S.O.S. Radio: The main unit containing the transceiver components.
• Case (closed): The protective housing for the radio.

Front panel controls and indicators include:

• L.E.D. Channel Display: Shows the currently selected channel number.
• CH. 9 Indicator: An indicator light for Channel 9.
• ON-OFF/VOLUME Control: Adjusts the audio output volume and powers the unit on/off.
• PUSH-TO-TALK Button: Located on the side of the unit, used to transmit.
• CHANNEL SELECTOR: A rotary switch to select the desired operating channel.
• RANGE SELECTOR: A control for adjusting reception range (near/far stations).
• MICROPHONE: Integrated microphone for voice input.

The rear of the unit has a push-to-talk button and case release.

Operating Theory of PLL Frequency Synthesizer

1. Fundamental Theory of PLL Circuitry

The Phase Locked Loop (PLL) circuit generates multiple programmable frequencies from a stable reference frequency, typically a quartz crystal oscillator. A basic PLL consists of a reference oscillator, a Voltage Controlled Oscillator (VCO), a phase comparator, and a DC filter (low-pass filter).

A block diagram illustrating the basic PLL circuit shows the Reference Oscillator and VCO feeding into a Phase Comparator. The output of the Phase Comparator goes through a DC Filter, which then provides a controlling DC voltage back to the VCO, creating a feedback loop.

This feedback loop ensures that the VCO frequency is locked to the reference oscillator's accuracy. For CB radio applications, where adjacent channel spacing is 10 KHz, the PLL is designed to produce frequencies spaced 10 KHz apart.

An expanded PLL block diagram shows a 10.24MHz Crystal connected to a 10.24MHz OSC. This output is divided by 2048 to produce a 5KHz Reference signal. The VCO output is fed into a Programmable Divider, which is controlled by a Programming Switch (Selector S.W.). The output of the Programmable Divider (5KHz Sample) and the 5KHz Reference signal are fed into a Phase Comparator. The output of the Phase Comparator goes through a DC Filter, providing a controlling DC voltage to the VCO.

The VCO's frequency is controlled by a voltage-dependent capacitor, such as a varactor or varicap diode. This diode's capacitance changes with the applied DC voltage, thereby tuning the VCO frequency. The VCO frequencies for the 39 LTD are in the 16 to 17 MHz range.

Frequency Generation Example (Channel 1):

• Transmit: VCO frequency (16.725 MHz) is mixed with 10.24 MHz crystal oscillator frequency: 10.24 + 16.725 = 26.965 MHz.
• Receive: For Channel 1, the VCO is set to 16.27 MHz. This is mixed with the 26.965 MHz incoming signal to produce the first Intermediate Frequency (IF): 26.965 - 16.27 = 10.695 MHz.
• This 10.695 MHz IF is then mixed with a second local oscillator frequency of 10.24 MHz: 10.695 - 10.24 = 0.455 MHz.

The shift in VCO frequency between transmit (16.725 MHz) and receive (16.27 MHz) for the same channel is managed by internal logic within the PLL IC-1. This logic controls the programmable divider ratio. For transmit, the divider ratio is 3345 (16.725 MHz / 3345 = 5 KHz). For receive, the divider ratio is 3254 (16.27 MHz / 3254 = 5 KHz). The 5 KHz reference frequency is derived by dividing the 10.24 MHz crystal oscillator by 2048.

2. Transmitter Circuit

The PLL IC-1 and the VCO section of IC-3 operate in both receive and transmit modes. When the radio is set to transmit, the mixer/amplifier section of IC-3, along with transistors Q12, Q8, Q9, and Q10, become active. The selected VCO frequency is mixed with the 10.24 MHz signal to generate the transmit frequency, using a balanced mixer within IC3.

A simplified block diagram of the transmitter section shows the VCO output feeding into a Mixer, along with the 10.24MHz signal. The mixer output is fed to a buffer and then to a series of amplifier stages (Q8, Q9, Q10) and filters (T2, T3, T4) before the TX B+ output.

Transistor Q8 acts as an amplifier/switch. If the VCO is not in a locked condition, pin 14 of IC-1 pulls the bias voltage of Q8 to ground, disabling it and preventing the transmission of illegal frequencies.

Q9 serves as the RF power driver, and Q10 is the final RF power amplifier. An audio signal from the microphone, processed by power IC-2, is applied to the collectors of Q9 and Q10 via audio transformer T10, modulating the RF signal.

Automatic Level Control (ALC) is implemented to limit modulation depth. The circuit includes a series resonator (L5 and C81) and a pi-low pass filter (L6, L7, C82, C83, C84). Capacitor C77 is factory-selected to limit the RF output power to within the FCC limit of 4 watts.

3. Receiver Circuit

In receive mode, transistor Q12 is turned off. Transistors Q4, Q1, Q2, and Q4 receive proper bias and AGC voltage. Q1 functions as a 27 MHz RF input amplifier, with diodes D1 and D2 providing limiting for excessive input signals.

The amplified 27 MHz signal is mixed with the VCO frequency (e.g., 16.27 MHz for Channel 1) to produce a first IF of 10.695 MHz (26.965 - 16.27). Q2 is the first converter. The 10.695 MHz signal is filtered by T7 and a ceramic filter CF-1.

This signal is then mixed with the second local oscillator frequency (10.24 MHz) to produce a second IF of 0.455 MHz (10.695 - 10.24). Q3 is the second converter, and the 455 KHz second IF is filtered by ceramic filter CF-2 and T8.

Q4 and Q5 act as 455 KHz amplifiers. D3 is the detector diode, which outputs the audio signal and a negative DC voltage for AGC. This negative voltage also biases the ANL clipping diode D4. The time constant for this biasing is set by R28 and C22. Any sharp negative-going pulse from D3 will back-bias D4, causing it to clip the signal.

PLL Block Diagram

The PLL block diagram illustrates the flow of signals within the phase-locked loop system. It shows the 10.24MHz crystal oscillator feeding into a reference divider, producing a 5KHz reference. The VCO output is fed to a programmable divider, controlled by the channel selector switch and ROM. The outputs of the reference divider and programmable divider are compared in a phase detector, which, along with a charge pump and DC filter, generates a control voltage for the VCO. The diagram also shows connections for transmit/receive control (T/R), audio input (Ain), and various other control signals.

Frequency Chart (Table 1)

PLL and Carrier Section

This section details the PLL and carrier signal generation and mixing processes.

Receiver Section

This section outlines the signal path and components within the receiver circuitry.

Transmitter Section

This section illustrates the signal path and components within the transmitter circuitry.

Test Equipment Set-up

The following diagrams illustrate the test equipment setup for alignment and testing:

Diagram 1: Setup for synthesizer alignment, showing a frequency counter connected to IC 1 pin 12, a DC meter connected to TP-1 and ground (IC 1 pin 17), and a DC power supply providing 13.8V. A 50-ohm dummy load or antenna is connected to the transceiver's antenna connector.

Diagram 2: Setup for receiver alignment, showing an RF signal generator connected to the antenna input, an AC VTVM or AF wattmeter connected across the speaker, and a DC power supply providing 13.8V.

Diagram 3: Setup for transmitter alignment, showing an AF oscillator, oscilloscope, RF power meter, frequency counter, and spectrum analyzer connected to the transceiver. A 50-ohm load is used, and a DC power supply provides 13.8V.

Alignment Instructions

Caution: Use an isolation transformer or observe polarity when connecting test equipment. Maintain line voltage at 120V AC. Allow a 15-minute warm-up period. All adjustments are made with a 13.8V DC input. Connect low sides of test equipment to ground unless specified otherwise. Connect a 50-ohm dummy load or antenna before keying the transmitter. Connect the microphone.

Synthesizer Alignment

Transmitter Alignment

Connect an RF wattmeter and 50-ohm, 25-watt dummy load to the antenna connector. Note: Be sure to check transmit frequency and power on all active channels after alignment of the transmitter.

Transmitter Adjustments

Connect an RF wattmeter and 50-ohm, 25-watt dummy load to the antenna connector. Note: Be sure to check transmit frequency and power on all active channels after adjustment of the transmitter.

Receiver Alignment

Connect an AC VTVM or AF wattmeter across the speaker voice coil. Adjust the volume control to obtain a suitable indication. Set generator output low enough to prevent AGC limiting. Preset controls as follows unless otherwise noted: Range control in Near position.

Receiver Adjustments

Connect an AC VTVM or AF wattmeter across the speaker voice coil. Adjust the volume control to obtain a suitable indication. Preset controls as follows, unless otherwise noted: Squelch MINIMUM, ANL off.

Parts Layout (Component Side)

Diagrams showing the component placement on the main printed circuit board.

Parts Layout (Pattern Side)

Diagrams showing the copper traces and connections on the reverse side of the main printed circuit board.

Transistor Voltage Chart (DC)

Voltage measurements for transistors under specific conditions (19CH, No Signal, No Modulation).

IC Voltage Chart (DC)

Voltage measurements for integrated circuits under specific conditions (19CH, No Signal, No Modulation).

Integrated Circuits

• KIA 7205CP: A power amplifier IC.
• TA73IOP or AN103: An IC used in the receiver section.
• LC7131: A 40-channel PLL IC.

Transistors

• MPS9623
• MPS9631
• MPS9634
• MPS9681
• MPS9418
• MPS9426
• 2SC1957 or 2SC2314
• 2SC2078 or 2SC1306

Diodes

• IN 2473
• IN 4002
• MA 150
• IS953
• IS34
• MA 1091
• KLR321

Schematic Diagram

The schematic diagram provides a detailed electronic circuit layout of the Cobra 39 LTD radio, showing all components and their interconnections.

Functional Block Diagram

This diagram illustrates the functional blocks of the radio, showing the flow of signals through the RF amplifier, mixers, IF stages, detector, and audio output.

Logic Table for I.C.'s

This table details the logic states for programming the PLL IC based on channel selection.

Wiring Diagram (Chassis and Microphone Pins)

This diagram shows the internal wiring connections between the main PCB, controls, speaker, microphone, and external connectors.

Exploded View

An exploded view diagram illustrating the physical assembly of the Cobra 39 LTD radio, showing all individual parts and their relative positions.

Exploded View Parts List

Replacement Parts List