Manuals+

CMOSTEK CMT2210A: Ultra Low Power OOK RF Receiver

Features

Descriptions

The CMT2210A is an ultra low power, high performance, low-cost OOK stand-alone RF receiver designed for various 300 to 480 MHz wireless applications. It is part of the CMOSTEK NextGenRF™ family, which includes transmitters, receivers, and transceivers. An embedded EEPROM allows for programming frequency, symbol rate, and other features using the CMOSTEK USB Programmer and RFPDK. Products for 315/433.92 MHz are available off-the-shelf without EEPROM programming. In always-on mode, the CMT2210A consumes 3.8 mA with -114 dBm receiving sensitivity. In duty-cycle operation mode, power consumption is further reduced via the built-in sleep timer. The CMT2210A receiver, paired with the CMT211x transmitter, enables an ultra low-cost RF link.

Applications

Ordering Information

Part Number Descriptions Frequency Package MOQ
CMT2210A-EQR Low-Cost 300 – 480 MHz OOK Stand-Alone RF Receiver Random QFN16 (3x3) 5,000 pcs
CMT2210A-EQR3 Low-Cost 315 MHz OOK Stand-Alone RF Receiver 315 MHz QFN16 (3x3) 5,000 pcs
CMT2210A-EQR4 Low-Cost 433.92 MHz OOK Stand-Alone RF Receiver 433.92 MHz QFN16 (3x3) 5,000 pcs

For more ordering information, see Page 21.

Note:

For self-customization with RFPDK, order CMT2210A-EQR.

Default Configurations:

CMT2210A-EQR3 CMT2210A-EQR4 CMT2210A-EQR
Frequency 315.00 MHz 433.92 MHz Random
Others Refer to the default values in Table 10 of Page 13/14

Visit www.hoperf.com for more product information. Contact sales@hoperf.com for inquiries.

Pin Descriptions

The CMT2210A is a 16-pin QFN package. The pin assignments and descriptions are as follows:

Figure: CMT2210A Pin Assignments (Top View)

Pin 16: VDD (Power Supply Input)

Pin 15: GND (Ground)

Pin 14: RFIN (RF Signal Input to LNA)

Pin 13: GND (Ground)

Pin 12: VCON (VCO tank, connected to external inductor)

Pin 11: VCOP (VCO tank, connected to external inductor)

Pin 10: nRSTO (Active-low power-on-reset output)

Pin 9: NC (Not connected, leave floating)

Pin 8: XIN (Crystal oscillator input or external reference clock input)

Pin 7: XOUT (Crystal oscillator output)

Pin 6: CLKO (Programmable clock output to drive an external MCU)

Pin 5: DOUT (Received data output)

Pin 4: NC (Not connected, leave floating)

Pin 3: SCL (3-wire SPI clock input for EEPROM programming)

Pin 2: SDA (3-wire SPI data input/output for EEPROM programming)

Pin 1: CSB (3-wire SPI chip select input for EEPROM programming)

Pin Number Name I/O Descriptions
1 CSB I 3-wire SPI chip select input for EEPROM programming
2 SDA IO 3-wire SPI data input and output for EEPROM programming
3 SCL I 3-wire SPI clock input for EEPROM programming
4, 9 NC NA Not connected, leave floating
5 DOUT O Received data output
6 CLKO O Programmable clock output to drive an external MCU
7 XOUT O Crystal oscillator output
8 XIN I Crystal oscillator input or external reference clock input
10 nRSTO O Active-low power-on-reset output to reset an external MCU
11 VCOP IO VCO tank, connected to an external inductor
12 VCON I VCO tank, connected to an external inductor
13, 15 GND I Ground
14 RFIN I RF signal input to the LNA
16 VDD I Power supply input

Electrical Characteristics

All measurements are performed using the board CMT2210A-EM V1.0, unless otherwise noted. Conditions: VDD = 3.3 V, TOP = 25 °C, FRF = 433.92 MHz, receiving a PN9 sequence, 50 Ω impedance, BER of 0.1%.

Recommended Operation Conditions

Parameter Symbol Conditions Min Typ Max Unit
Operation Voltage Supply VDD 1.8 3.6 V
Operation Temperature TOP -40 85 °C
Supply Voltage Slew Rate 1 mV/us

Absolute Maximum Ratings

Parameter Symbol Conditions Min Max Unit
Supply Voltage VDD -0.3 3.6 V
Interface Voltage VIN -0.3 VDD + 0.3 V
Junction Temperature TJ -40 125 °C
Storage Temperature TSTG -50 150 °C
Soldering Temperature TSDR Lasts at least 30 seconds 255 °C
ESD Rating [2] Human Body Model (HBM) -2 2 kV
Latch-up Current @ 85 °C -100 100 mA

Notes:

Caution! ESD sensitive device. Handle with care to prevent permanent damage.

Receiver Specifications

Parameter Symbol Conditions Min Typ Max Unit
Frequency Range FRF 300 480 MHz
Symbol Rate SR 0.1 40 kbps
Sensitivity S315 FRF = 315 MHz, SR = 1 kbps, BER = 0.1% -114 dBm
S433.92 FRF = 433.92 MHz, SR = 1 kbps, BER = 0.1% -113 dBm
Saturation Input Signal Level PLVL 10 dBm
Working Current IDD FRF = 315 MHz 3.5 mA
FRF = 433.92 MHz 3.8 mA
Sleep Current ISLEEP When sleep timer is on 440 nA
When sleep timer is off 60 nA
Frequency Resolution FRES 24.8 Hz
Frequency Synthesizer Settle Time TLOCK From XOSC settled 150 us
Blocking Immunity BI SR = 1 kbps, ±1 MHz offset, CW interference 52 dB
SR = 1 kbps, ±2 MHz offset, CW interference 74 dB
SR = 1 kbps, ±10 MHz offset, CW interference 75 dB
Image Rejection Ratio IMR IF = 280 kHz 35 dB
Input 3rd Order Intercept Point IIP3 Two tone test at 1 MHz and 2 MHz offset frequency. Maximum system gain settings -25 dBm
Receiver Bandwidth BW 50 500 kHz
Receiver Start-up Time TSTART-UP From power up to receive, in Always Receive Mode 4.3 ms
Receiver Wake-up Time TWAKE-UP From sleep to receive, in Duty-Cycle Receive Mode 0.61 ms

Crystal Oscillator Specifications

Parameter Symbol Conditions Min Typ Max Unit
Crystal Frequency [1] FXTAL 26 26 26 MHz
Crystal Tolerance [2] ±20 ppm
Load Capacitance CLOAD 10 15 20 pF
Crystal ESR Rm 60 Ω
XTAL Startup Time [3] tXTAL 400 us

Notes:

LPOSC Specifications

Parameter Symbol Conditions Min Typ Max Unit
Calibrated Frequency [1] FLPOSC After calibration 1 kHz
Frequency Accuracy 1 %
Temperature Coefficient [2] -0.02 %/°C
Supply Voltage Coefficient [3] +0.5 %/V
Initial Calibration Time tLPOSC-CAL 4 ms

Notes:

Typical Performance Characteristics

The following graphs illustrate typical performance characteristics of the CMT2210A:

Figure 3.1: Current vs. Supply Voltage (FRF = 315 / 433.92 MHz, SR = 1 kbps)

This graph shows current consumption (mA) on the Y-axis versus supply voltage (V) on the X-axis for both 315 MHz and 433.92 MHz frequencies.

Figure 3.2: Current vs. Temperature (FRF = 433.92 MHz, SR = 1 kbps)

This graph displays current consumption (mA) on the Y-axis versus temperature (°C) on the X-axis for different supply voltages (3.3 V, 1.8 V, 3.6 V).

Figure 3.3: Sensitivity vs. Supply Voltage (SR = 1 kbps, BER = 0.1%)

This graph shows sensitivity (dBm) on the Y-axis versus supply voltage (V) on the X-axis for 315 MHz and 433.92 MHz frequencies.

Figure 3.4: Sensitivity vs. Temperature (FRF = 433.92 MHz, VDD = 3.3 V, SR = 1 kbps, BER = 0.1%)

This graph displays sensitivity (dBm) on the Y-axis versus temperature (°C) on the X-axis.

Figure 3.5: Sensitivity vs. Symbol Rate (FRF = 433.92 MHz, VDD = 3.3 V, BER = 0.1%)

This graph shows sensitivity (dBm) on the Y-axis versus symbol rate (kbps) on the X-axis.

Figure 3.6: Sensitivity vs. BER (FRF = 433.92 MHz, VDD = 3.3 V, SR = 1 kbps)

This graph displays sensitivity (dBm) on the Y-axis versus Bit Error Rate (BER) on the X-axis.

Typical Application Schematic and Layout Guidelines

The typical application schematic shows the CMT2210A (U1) integrated with external components like inductors (L1, L2), capacitors (C0, C1, C2, C3), and a crystal (X1). A connector (J1) is included for EEPROM programming.

Layout Guidelines:

Refer to application note AN107 for detailed schematic and PCB layout design guidelines.

Bill of Materials (BOM) of Typical Application

Designator Descriptions Value (315 MHz) Value (433.92 MHz) Unit Manufacturer
U1 CMT2210A, low-cost 300 – 480 MHz OOK stand-alone RF receiver - - - CMOSTEK
L1 ±5%, 0603 multi-layer chip inductor 39 27 nH Murata LQG18
L2 ±5%, 0603 multi-layer chip inductor 33 22 nH Murata LQG18
C1 ±0.25 pF, 0402 NP0, 50 V 4.3 3.3 pF Murata GRM15
C0 ±20%, 0402 X7R, 25 V 0.1 uF Murata GRM15
C2, C3 ±5%, 0402 NP0, 50 V 15 pF Murata GRM15
X1 ±20 ppm, SMD32*25 mm, crystal 26 MHz EPSON

Functional Descriptions

Overview

The CMT2210A is an ultra low power, high performance, low-cost OOK stand-alone RF receiver for 300 to 480 MHz wireless applications. It features a fully integrated, low-IF receiver architecture, minimizing external components and reducing susceptibility to powerline interference. The synthesizer includes a VCO and a low noise fractional-N PLL with 24.8 Hz output frequency resolution. The VCO operates at 2x the LO frequency to minimize spurious emissions. All analog blocks are calibrated on Power-On Reset (POR) for optimal performance across temperature and supply voltage variations. Digital demodulation provides the output signal on the DOUT pin, eliminating the need for external MCU control in many applications. The 3-wire SPI interface is used for configuration via the RFPDK and USB Programmer, allowing customization of RF frequency, symbol rate, and other features. This reduces cost and simplifies design. The device operates from 1.8 to 3.6 V, suitable for battery-powered devices, with a typical receive current of 3.8 mA. It enables ultra low-cost RF links when used with the CMT211x transmitter.

Modulation, Frequency and Symbol Rate

The CMT2210A supports OOK demodulation with symbol rates from 0.1 to 40 kbps. It covers the frequency range of 300 to 480 MHz, including the 315 MHz and 433.92 MHz ISM bands. The internal frequency synthesizer uses a high-purity VCO and a low noise fractional-N PLL, providing an output frequency resolution of 24.8 Hz.

Parameter Value Unit
Demodulation OOK -
Frequency 300 to 480 MHz
Frequency Resolution 24.8 Hz
Symbol Rate 0.1 to 40 kbps

Embedded EEPROM and RFPDK

The RFPDK (RF Products Development Kit) is a PC application for intuitive configuration of CMOSTEK NextGenRF™ products. Users connect the USB Programmer, select parameters on RFPDK, and click 'Burn' to program the device. Configurations remain until reprogrammed, requiring no external MCU control. The RFPDK also allows saving configurations to a list or exporting them as hexadecimal files for mass production. Figure 6 illustrates accessing the embedded EEPROM.

Figure 6: Accessing Embedded EEPROM

A diagram shows the RFPDK application on a PC connecting via a CMOSTEK USB Programmer to the CMT2210A's EEPROM interface (CSB, SCL, SDA pins).

Refer to AN103 for details on the CMOSTEK USB Programmer and RFPDK.

All Configurable Options

Beyond demodulation, frequency, and symbol rate, numerous options allow device customization. The RFPDK offers 'Basic Mode' for quick configurations and 'Advanced Mode' for deeper customization. The 'Basic Mode' options are a subset of 'Advanced Mode'.

Configurable Parameters in RFPDK

Category Parameters Descriptions Default Mode
RF Settings Frequency Receive radio frequency, 300 to 480 MHz, 0.01 MHz resolution. 433.92 MHz Basic / Advanced
Demodulation OOK demodulation type. OOK Basic / Advanced
Symbol Rate Receiver symbol rate, 0.1 to 40 kbps, 0.1 kbps resolution. 4.8 kbps Basic / Advanced
Squelch TH Squelch circuit threshold to suppress noise, 0 to 255. 0 Basic / Advanced
Xtal Tolerance Crystal frequency tolerance, 0 to ±200 ppm. ±20 ppm Basic / Advanced
Operation Settings Xtal Stabilizing Time Time for crystal to settle after power up (78, 155, 310, 620, 1240, 2480 us). 310 us Basic / Advanced
Duty-Cycle Mode Turn on/off duty-cycle receive mode. On Basic / Advanced
Sleep Time Sleep time in duty-cycle mode, 3 to 134,152,192 ms. 3 ms Basic / Advanced
Rx Time Receive time in duty-cycle mode, 0.04 to 2,683,043.00 ms (varies with Wake-On Radio). 10,000.00 ms (WOR off) or 20.00 ms (WOR on) Basic / Advanced
Rx Time Ext Extended receive time in duty-cycle mode, 0.04 to 2,683,043.00 ms. 200.00 ms Advanced
Wake-On Radio Turn on/off wake-on radio function. Off Advanced
Wake-On Condition Condition to wake on radio (Extended by Preamble or RSSI). Extended by Preamble Advanced
System Clock Output Turn on/off system clock output on CLKO. Off Advanced
System Clock Frequency System clock output frequency options (e.g., 13.000, 6.500, ..., 0.406 MHz). 6.5 MHz Advanced

OOK Settings and Decode Settings

Category Parameters Descriptions Default Mode
OOK Settings Demod Method OOK demodulation methods (Peak TH, Fixed TH). Peak TH Advanced
Fixed Demod TH Threshold for Fixed TH; min input value is Squelch Threshold set on RFPDK, max is 255. 80 Advanced
Peak Drop Turn on/off RSSI peak drop function. On Advanced
Peak Drop Step RSSI peak drop step options (1, 2, 3, 5, 5, 9, 12, 15). 2 Advanced
Peak Drop Rate RSSI peak drop rate options (1 step/4 symbol, 1 step/2 symbol, 1 step/1 symbol, 1 step/0.5 symbol). 1 step / 4 symbol Advanced
Decode Settings Preamble Size of valid preamble (1-byte, 2-byte, 3-byte, 4-byte). 2-byte Advanced

Internal Blocks Description

RF Front-end and AGC

The CMT2210A features a low-IF receiver with an RF front-end comprising a Low Noise Amplifier (LNA), I/Q mixer, and a wide-band power detector. Minimal external components (inductor, capacitor) are needed for LNA matching to a 50 Ω antenna. The input RF signal is amplified and down-converted to an IF frequency. An Automatic Gain Control (AGC) loop, utilizing a wide-band power detector and attenuation networks, regulates the RF front-end gain for optimal linearity, selectivity, and sensitivity, even under strong out-of-band interference.

IF Filter

Signals are filtered by an integrated 3rd-order band-pass image rejection IF filter, providing over 35 dB image rejection ratio. The IF center frequency is dynamically adjusted for optimal receiver sensitivity and out-of-band interference attenuation, compensating for manufacturing tolerances. IF bandwidth is computed based on RF frequency, Xtal tolerance, and symbol rate input via RFPDK.

RSSI

Multistage I/Q Log amplifiers process the IF filter output. Receive Signal Strength Indicator (RSSI) generators within these amplifiers produce DC voltages proportional to the input signal level in both I and Q paths. The resulting RSSI is the sum of these paths, offering a dynamic range extending over 66 dB from the nominal sensitivity level. A patented DC-offset cancellation engine enhances receiver sensitivity.

SAR ADC

An on-chip 8-bit SAR ADC digitizes the RSSI for OOK demodulation.

Crystal Oscillator

The crystal oscillator serves as the reference clock for the PLL frequency synthesizer and digital blocks. A 26 MHz crystal is recommended with appropriate loading capacitors (C2, C3) to achieve the specified total load capacitance (CL) between XIN and XOUT for oscillation.

The formula for total load capacitance is: CL = 1 / (1/C2 + 1/C3) + C_parasitic

Parasitic capacitance includes input capacitance and PCB tray capacitance. Crystal ESR must be within specification for reliable start-up. An external signal source can substitute the crystal, connected to XIN with a peak-to-peak swing of 300 mV to 700 mV, AC-coupled.

Frequency Synthesizer

A fractional-N frequency synthesizer generates the LO frequency for the I/Q mixer. It is fully integrated except for the VCO tank inductor. Using the 26 MHz reference clock, it can generate any receive frequency between 300 to 480 MHz with 24.8 Hz resolution. The VCO operates at 2x the LO frequency. A high Q VCO tank inductor is recommended for optimal phase noise performance and reduced spurious emissions. Recommended VCO inductors for 315 MHz and 433.92 MHz bands are provided.

LO Frequency Band VCO Inductor
315 MHz 33 nH
433.92 MHz 22 nH

Subsystem calibrations are performed dynamically to ensure reliable synthesizer operation.

LPOSC

An internal 1 kHz low power oscillator drives the sleep timer for periodic wake-ups from sleep. Sleep Time is configurable from 3 ms to over 37 hours in duty-cycle receive mode. LPOSC frequency is automatically calibrated during PUP and periodically thereafter to maintain ±1% tolerance against temperature and supply voltage variations.

Operation Mode

The device operates in two modes, selectable via the 'Duty-Cycle On-Off' option on RFPDK:

Figure 7: Two different operation modes

State diagrams illustrate the transitions: Always Receive Mode: PUP -> SLEEP (3ms) -> TUNE -> RX. Duty-Cycle Receive Mode: PUP -> SLEEP -> XTAL -> TUNE -> RX, repeating.

Power Up (PUP) State

The device undergoes a PUP sequence including POR release, crystal activation, and internal block calibration. This takes ~4 ms in Always Receive Mode and ~9.5 ms in Duty-Cycle Receive Mode (due to LPOSC and sleep timer calibration). Average current is ~0.9 mA.

SLEEP State

All blocks are powered down except the sleep timer. In Always Receive Mode, sleep time is ~3 ms. In Duty-Cycle Receive Mode, sleep time is user-configurable. Sleep current is ~60 nA (Always Receive Mode) or ~440 nA (Duty-Cycle Receive Mode with LPOSC and sleep timer on).

XTAL State

This state exists only in Duty-Cycle Receive Mode. The crystal oscillator restarts upon waking from SLEEP. 'XTAL Stabilizing Time' on RFPDK defines the settling time. Current consumption is ~520 uA.

TUNE State

The device tunes to the desired frequency set in RFPDK. This takes ~300 us. Current consumption is ~2 mA.

RX State

The device receives signals and outputs demodulated data on DOUT. In Duty-Cycle Receive Mode, the device stays in RX for a duration defined by 'Rx Time'. Current consumption is ~3.8 mA.

Always Receive Mode Timing

Figure 8: Timing and Current Consumption for Always Receive Mode

Diagram shows timing for PUP (~4ms), SLEEP (~3ms), TUNE (~300us), and RX states. Current levels are ~900uA (PUP), ~60nA (SLEEP), ~2mA (TUNE), and ~3.8mA (RX).

Duty-Cycle Receive Mode

With Duty-Cycle Mode enabled, the device cycles through SLEEP, XTAL, TUNE, and RX states to adapt to environmental changes and maintain performance. The PUP sequence is ~9.5 ms. The configurable system clock is output on CLKO during TUNE and RX states.

Figure 9: Timing and Current Consumption for Duty-Cycle Receive Mode

Diagram shows timing for PUP (~9.5ms), SLEEP, XTAL (~520uA), TUNE (~2mA), and RX (~3.8mA) states. Current levels are ~900uA (PUP), ~440nA (SLEEP), ~520uA (XTAL), ~2mA (TUNE), ~3.8mA (RX).

Turning on duty-cycle receive mode is recommended for maintaining performance, increasing system stability, and saving power.

Easy Duty-Cycle Configurations

For applications prioritizing system stability and performance over minimal power consumption, Easy Configuration simplifies duty-cycle mode setup. An example demonstrates Tx and Rx relationship.

Figure 10: Tx and Rx relationship of Easy Configuration

Diagram shows Tx Data packets and RX State timing. Example: Tx packet length 72 ms (1.2 kbps, 60 symbols). RX sequence includes SLEEP, XTAL, TUNE (total ~3.61 ms) and Rx Time (1000 ms). This configuration ensures reliable packet reception despite short non-receive periods.

Example Configuration:

This setup ensures at least one packet is reliably received. Precise configuration and 'Wake-On Radio' can further optimize power consumption. Refer to AN108 for details.

nRSTO and CLKO

nRSTO (Reset Output)

By default, an active-low reset signal is generated by the internal POR and output via the nRSTO pin, usable for resetting external MCUs.

Figure 11: nRSTO Timing Characteristics

Diagram shows VDD rising from 0V, crossing threshold voltage (Vth ~1.2V), and the TPOR delay before nRSTO goes high. TPOR varies with VDD rise time (Trise).

Trise (us) TPOR (us)
3,000 500
1,000 300
300 160
100 100
30 70
10 60

CLKO (System Clock Output)

If 'System Clock Output' is set to 'On' in RFPDK, a divided clock from the crystal oscillator is output on the CLKO pin. This clock can drive an external MCU and is available during XTAL, TUNE, and RX states. The frequency is selected via the 'System Clock Frequency' option. Refer to AN108 for details.

Package Outline

The CMT2210A is available in a 16-pin QFN 3x3 mm package.

Figure 12: 16-Pin QFN 3x3 Package

Illustrates the top, side, and bottom views of the 16-pin QFN 3x3 package.

16-Pin QFN 3x3 Package Dimensions

Symbol Min (mm) Max (mm)
A 0.7 0.8
A1 0.05
b 0.18 0.30
c 0.18 0.25
D 2.90 3.10
D2 1.55 1.75
e 0.50 BSC
E 2.90 3.10
E2 1.55 1.75
L 0.35 0.45

Top Marking

The top marking for the CMT2210A is as follows:

Figure 13: CMT2210A Top Marking

Marking includes '210A' on the first line, '1234' on the second, and 'YWW' on the third.

CMT2210A Top Marking Explanation

Marking Element Explanation
Mark Method Laser
Pin 1 Mark Circle's diameter = 0.3 mm
Font Size 0.5 mm, right-justified
Line 1 Marking 210A (represents part number CMT2210A)
Line 2 Marking ①②③④ (Internal tracking number)
Line 3 Marking YWW (Date code: Y=last digit of mold year, WW=workweek)

Other Documentations

Brief Name Descriptions
AN103 CMT2110A/2210A One-Way RF Link Development Kits User's Guide User's Guides for CMT2110A/2210A Development Kits, including Evaluation Board and Module, CMOSTEK USB Programmer and RFPDK.
AN107 CMT2210A Schematic and PCB Layout Design Guideline Details of CMT2210A PCB schematic and layout design rules, RF matching network, and other application layout design issues.
AN108 CMT2210A Configuration Guideline Details of configuring CMT2210A features on the RFPDK.

Document Change List

Rev. No Chapter Description of Changes Date
0.9 Initial released version 2014-06-14
1.0 5 Update Section 5.7 and Figure 8 2014-06-30

Contact Information

HOPE MICROELECTRONICS CO.,LTD

Add: 2/F, Building 3, Pingshan Private Enterprise Science and Technology Park, Lishan Road, XiLi Town, Nanshan District, Shenzhen, Guangdong, China

Tel: 86-755-82973805

Fax: 86-755-82973550

Email: sales@hoperf.com

Website: www.hoperf.com, www.hoperf.cn

Disclaimer: This document may contain preliminary information and is subject to change without notice. Hope Microelectronics assumes no responsibility or liability for any use of the information contained herein. The products described are not intended for implantation or life support applications where malfunction could cause harm. No warranties are offered, including implied warranties of merchantability or fitness for a particular purpose.

©2006, HOPE MICROELECTRONICS CO., LTD. All rights reserved.

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