Getting Started with STSW-EV-VNF1248F Software Package for EV-VNF1248F

User Manual

Introduction

The STSW-EV-VNF1248F is the companion software package for the EV-VNF1248F. It includes the graphical user interface (GUI) and the firmware to be flashed onto the EV-SPC582B MCU board. The combined system of STSW-EV-VNF1248F and EV-VNF1248F provides a simple evaluation system for the VNF1248F device, an advanced controller with an eFuse algorithm driving high-side MOSFETs in 12 V, 24 V, and 48 V automotive applications.

Figure 1. STSW-EV-VNF1248F Graphical User Interface

A screenshot of the VNF1248 Evaluation Board GUI is displayed, showing various control panels and status indicators for the VNF1248F device.

Software Installation

Firmware Programming Tool Installation

To program the control firmware onto the EV-SPC582B MCU board, the UDE Starterkit 2021 application must be installed on your PC workstation.

PLS UDE Starterkit 2021

Run the udestk-2021-05-spc5-stk.exe utility and follow the installation wizard. The UDE STK driver is also installed as a final step. After driver installation, connect the USB cable to the EV-SPC582B and open the Device Manager in Windows OS. Two PLS controllers should be recognized if the installation was successful.

Figure 3. Universal Serial Bus controllers

A screenshot of the Windows Device Manager showing the 'Universal Serial Bus controllers' section. Two entries, 'PLS USB JTAG Adapter for SPC5xxx A' and 'PLS USB JTAG Adapter for SPC5xxxx B', are visible, indicating successful driver installation.

Firmware Programming

The steps to perform the firmware programming operation on the microcontroller board are as follows:

  1. Setup the EV-SPC582B MCU board by placing jumpers on JP3 and JP4 (on the right side, 5 V) and connecting the USB cable for board communication and programming.
  2. Run the UDE Starterkit 2021 application on the PC workstation.
Figure 4. UDE Starterkit 2021

A screenshot of the Windows Start Menu showing the 'UDE Starterkit 2021' application ready to be launched.

Select from the File menu, the item 'New Workspace', and provide a name for the workspace. In the example, the workspace is named monaco.wsx.

Figure 5. New workspace creation

A screenshot of the UDE Starterkit 2021 application's 'Create new UDE Workspace File' dialog, showing a file explorer interface to name and save the workspace.

The 'Select Target Configuration' window appears. Set the 'Additional Filter' to 'Discovery Kits' and click 'Default'.

Figure 6. Select Target Configuration

A screenshot of the 'Select Target Configuration' window, listing various ST discovery kits. The 'STM Chorus 1M SPC58 Discovery Starter Kit with SPC582B60 (Jtag)' is highlighted.

In the 'Create or use default' dialog, select 'Use a default target configuration'. In the 'Device tree' dialog, select the following path: PowerPC > STMicroelectronics > SPC582B Evaluation Board > STM Chorus 1M SPC58 Discovery Starter Kit with SPC582B60 (Jtag). Press 'Finish' and provide a name for the new configuration file.

Figure 7. Create or use default

A screenshot of the 'Create or use default' dialog in UDE Starterkit, showing the option to use a default target configuration and the device tree selection.

Back in the 'Select Target Configuration' window, select 'STM Chorus 1M SPC58 Discovery Starter Kit with SPC582B60 (Jtag)' and press OK.

Figure 8. Select Target Configuration dialog window

A screenshot of the 'Select Target Configuration' window, confirming the selection of the target configuration.

In the UDE STK 2021 window, verify that the 'Messages' window contains a line indicating a successful connection to the target.

Figure 9. Connection established

A screenshot of the UDE Starterkit 2021 interface, showing the 'Messages' window with a success message indicating that the connection to the SPC582B60 target has been established.

From the File menu, select 'Load Program'. Browse your hard drive to locate the provided control firmware (.elf file) and press OK in the 'Multicore / multi program loader' dialog window.

Figure 10. Load Program dialog windows

A screenshot of the UDE Starterkit 2021 'File' menu, highlighting the 'Load Program' option.

Press 'Cancel' for any requests about Controller0.Core source files (.c or .h).

The 'UDE - FLASH/OTP Memory Programming Tool - (DEMO)' window appears. Press 'Program All'.

Figure 11. FLASH/OTP Memory Programming Tool dialog window

A screenshot of the UDE - FLASH/OTP Memory Programming Tool, showing the memory device configuration and the 'Program All' button.

Follow the execution of the programming operation in the 'Execute Memtool Command' dialog window. At the end, check the 'Result' field for success and press 'Exit'.

Figure 12. FLASH/OTP Memory Programming

A screenshot of the UDE Starterkit 2021 interface showing the 'Execute Memtool Command' dialog with the programming progress and result.

Press 'Exit' in the 'UDE - FLASH/OTP Memory Programming Tool - (DEMO)' dialog window. If prompted, press 'Yes' to save workspace changes.

Figure 13. FLASH/OTP Memory Programming in progress

A screenshot of the UDE - FLASH/OTP Memory Programming Tool showing the programming progress, and a prompt to save workspace changes.

To complete the firmware programming, disconnect the GUI from the target and reset it using the RESET push-button on the EV-SPC582B microcontroller board.

Figure 14. Target disconnected

A diagram illustrating the disconnection of the GUI from the target and the location of the RESET push-button on the EV-SPC582B board.

Graphical User Interface installation

To install the Graphical User Interface, execute the following steps:

  1. Run the application provided in STSW-EV-VNF1248F: Setup_VNF1248_vx.y.exe. (Note: x.y is a generic version number.)
Figure 15. Setup - VNF1248 Board

A screenshot of the VNF1248 Board Setup wizard, showing the 'Select Destination Location' dialog.

The FTDI CDM Drivers installation starts.

Figure 16. FTDI COM Drivers

A screenshot of the FTDI CDM Drivers installation wizard, showing the extraction process.

The USB PLS Drivers are installed.

Figure 17. Setup - USB PLS Drivers

A screenshot of the Driver USB PLS Setup wizard, showing the 'Select Destination Location' and 'Ready to Install' dialogs.

Press 'Finish' to close the installation wizard and launch the VNF1248 Evaluation board GUI application.

Graphical User Interface Description

The Graphical User Interface (GUI) included in the STSW-EV-VNF1248F software package is a powerful tool designed to set up and control the VNF1248F device embedded in the EV-VNF1248F evaluation board. Launch the VNF1248 Board application or run the VNF1248_EvalBoard.exe executable to start the GUI. The GUI is composed of several sections detailed in the following paragraphs.

3.1 Main menu

The GUI includes a command menu for application settings, accessing support services, executing Windows OS operations, and visualizing device data. The main menu items are described below.

Figure 19. Main menu

A screenshot of the VNF1248 Evaluation Board GUI, showing the main menu bar with options like 'Exit', 'Communication', 'View', 'Settings', 'Service', and 'Help'.

Exit: Closes the application.

Communication

The menu items allow resetting communication traffic, clearing counters, refreshing the GUI periodically, and selecting the interface type (USB FTDI or serial).

Figure 20. Communication

A screenshot of the VNF1248 Evaluation Board GUI, showing the 'Communication' menu options.

Figure 21. Communication Interface selection

A dialog box for selecting the communication interface, with options for 'USB FTDI' and 'SERIAL PORT'.

View

The 'View' menu provides access to different views of the device's status and registers.

Figure 22. View

A screenshot of the VNF1248 Evaluation Board GUI, showing the 'View' menu options, including 'SPI Registers Map'.

The SPI register map can be displayed as shown below:

Figure 23. SPI Registers Overview

A table displaying the SPI Registers Overview, with addresses, register names (CR1-CR5, SR1-SR8), and their bit values.

Settings

This section allows configuring periodical refresh of registers. Specific menu items are available for:

  • Refreshing board status.
  • Refreshing and clearing SPI Status Registers.
  • Refreshing SPI Control Registers.
  • Configuring SPI Clock Frequency.
Figure 24. Settings

A screenshot of the VNF1248 Evaluation Board GUI, showing the 'Settings' menu options, including 'Periodical Board Status Refresh' and 'Page SPI Control Registers'.

Figure 25. SPI Clock Frequency

A dialog box for selecting the SPI Clock Frequency from a list of available frequencies.

Service

Several services are available:

  • Generic SPI Frame: Allows sending a customizable SPI frame to the VNF1248F device and reading its answer.
Figure 26. Service

A screenshot of the VNF1248 Evaluation Board GUI, showing the 'Service' menu options.

Figure 27. Generic SPI Frame

A screenshot of the 'Generic SPI Frame' dialog, allowing users to input addresses, data, and commands for SPI communication.

  • On/Off Line Mode: Provides a powerful test and debug utility.
Figure 28. On/Off Line Mode

A screenshot of the 'On/Off Line Mode' dialog, showing a grid for defining test sequences and logging communication data.

  • FTP: The FTP menu item relates to the Few Times Programmable (FTP) feature of the embedded non-volatile memory, for customer sector program/erase/read operations.
Figure 29. FTP

A screenshot of the 'FTP-NVM Access' dialog, allowing users to perform NVM operations like reading and writing.

Figure 30. Help

A screenshot of the VNF1248 Evaluation Board GUI, showing the 'Help' menu.

3.2 Board control tools

The GUI displays a graphical section under the main menu that reports the GUI version, VNF1248F device silicon cut, communication traffic, common actions via buttons, and the EV-VNF1248F board status.

Figure 31. Board Control Tools

A screenshot of the VNF1248 Evaluation Board GUI, highlighting the 'Board Control Tools' section with device status and communication information.

Common actions include:

  • Communication interface selection.
  • Enabling/disabling periodical reading of status registers and SPI traffic.
  • Refreshing all registers (control and status).
  • Clearing all status registers.
Figure 32. Common actions

Icons representing common actions: communication interface selection, periodical reading toggle, refresh all registers, and clear status registers.

3.3 Connection status

At the bottom of the GUI, a 'Connection Status' strip indicates the communication status between the MCU board and the GUI. A green indicator signifies normal operation, while a red flag and error message appear if communication is lost.

Figure 33. Connection status

A screenshot showing the 'Connection status' at the bottom of the GUI, indicating 'Board connected and ready....'.

3.4 Device control tools

The GUI provides pages for setting up and controlling the VNF1248F device and its features, accessible via tabs.

3.4.1 Standard Control

The main tab provides access to the VNF1248F device's features, including:

  • Different device modes.
  • Device settings.
  • Different thresholds.
  • Self-test execution.
  • Log register data.
  • Measurement performance.
  • Configuration of CCM, DIN, and Fail-safe features.
  • Retrieval of diagnostic flags and Global Status data.
Device Mode

Device modes can be set by pressing the corresponding buttons. The 'HWLO PIN' button enables/disables the device's HWLO pin.

Figure 34. Device Mode

A graphical representation of the 'Device Mode' settings, showing buttons for 'UNLOCKED', 'FAILSAFE', 'GO_STDBY', 'HWLO PIN', and 'WAKEUP'.

Settings

General settings for the VNF1248F device include:

  • Low Current ByPass: Enables/disables the embedded P-channel bypass.
  • HS Gate: Enables/disables the external MOSFET, controlling the OUT line.
  • Auto ON Disable: Disables the automatic ON state of the external MOSFET during low current bypass switch saturation fault.
  • Nominal Time: Configures the fuse nominal time.
Figure 35. Settings

A screenshot of the 'Settings' section of the GUI, showing controls for Low Current ByPass, HS Gate, Auto ON Disable, Nominal Time, FailSafe Configuration, NVM Default Config, DIN settings, and Thresholds.

Thresholds: Several thresholds can be configured:

  • OVC (mV): Nominal Overcurrent Threshold.
  • HSC (mV): Hard Short Circuit Latch-off threshold.
  • VDS (mV): External MOSFET desaturation shut-down threshold.
  • NTC (mV): External MOSFET overtemperature shutdown threshold.
  • CCM VOUT (V): Capacitive charge mode VOUT threshold.
  • UV (V): VS supply undervoltage threshold.

SelfTest: Allows selecting and executing a self-test, and starting/stopping the test. Test results are shown via Status registers.

3.4.2 SPI Regs

This form displays the content of all SPI Registers: Control Registers 1-5 and Status Registers 1-8. Each register has applicable actions, including reading register content (Button R), storing current content (Button W), and read-and-clear actions (Button C). Register bits that can be modified are editable. The GUI provides side-by-side access to SPI Control and Status Registers.

Figure 41. SPI Control Registers

A table showing the SPI Control Registers (Ctrl Reg1 to Ctrl Reg5) with their addresses, write enable bits, and bit values for various functions.

Figure 42. SPI Status Registers

A table showing the SPI Status Registers (Status Reg1 to Status Reg8) with their addresses, read enable bits, and bit values for various status indicators.

3.4.3 NVM Programming

The control logic unit in the VNF1248F allows programming of the embedded NVM memory for testing and storing settings. Sector 5 can be written to or read after a specific command sequence for secure access.

Figure 43. NVM Programming

A screenshot of the NVM Programming form within the GUI, showing NVM parameters and operation status.

3.4.4 SPI History

This form displays SPI frames of communication traffic between the GUI and the VNF1248F device. The 'Clear List' button erases the communication history. Users can also select a Control Register and a Status Register for easy access.

Figure 44. SPI History

A screenshot of the 'SPI History' form, showing a log of SPI communication frames.

3.4.5 Device Info

This form shows the ROM memory map of the VNF1248F device, which can be refreshed manually.

Figure 45. ROM Memory Map

A screenshot of the 'ROM Memory Map' form, displaying the memory map of the VNF1248F device.

Revision History

The document revision history is provided in the table below.

Table 1. Document revision history
Date Revision Changes
24-Jul-2025 1 Initial release.
Models: EV-SPC582B, VNF1248F, STSW-EV-VNF1248F, STSW-EV-VNF1248F Software, Software

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References

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