AURIX™ TC27x Variants Data Sheet Addendum

This document is an addendum to the TC27x data sheet, listing all intended product variants, key parameters such as memory size, and optional features.

Naming Conventions

Prefix

Feature Package

Variants BC Step

Derivative Production Status Package Type Temp. Range Chip ID Freq. (MHz) Flash (MB) EEPROM (KB) Total SRAM (KB) Core 1&2 TC16P (KB) Core 0 TC16E (KB) DSPR (KB) PSPR (KB) DSPR (KB) PSPR (KB) LMU (KB) ADC Chan. (#/ch.) FlexRay ETH HSM CAN FD
SAK-TC277TP-64F200S BC on request PG-LFBGA-292 -40°C - +125°C 4740 7153H / 4746 7153H 3) 200 4 64 @ 500k 472 120 32 112 24 32 60 1/2 Yes Yes No

1) The address range starts at the lowest address defined in the User's Manual (See the Memory Maps chapter).

2) Based on an EEPROM emulation algorithm with a wear levelling factor of 6 (size scales with number of program/erase cycles, for more details see User Manual).

3) Featuring flash firmware (µCode) version 23H

Variants CA Step

Derivative Production Status Package Type Temp. Range Chip ID Freq. (MHz) Flash (MB) EEPROM (KB) Total SRAM (KB) Core 1&2 TC16P (KB) Core 0 TC16E (KB) DSPR (KB) PSPR (KB) DSPR (KB) PSPR (KB) LMU (KB) ADC Chan. (#/ch.) FlexRay ETH HSM CAN FD CAN FD ISO frame
SAK-TC277TP-64F200S CA on request PG-LFBGA-292 -40°C - +125°C 4742 7160H / 4746 7160H 4) 200 4 64 @500k 472 120 32 112 24 32 60 1/2 Yes Yes Yes No
SAK-TC277TC-64F200S CA on request PG-LFBGA-292 -40°C - +125°C 4742 7560H / 4746 7560H 4) 200 4 24 @500k 424 120 24 112 24 60 1/2 No Yes No No
SAK-TC277T-64F200S CA on request PG-LFBGA-292 -40°C - +125°C 0742 7160H / 0746 7160H 4) 200 4 64 @500k 472 120 32 112 24 32 60 1/2 Yes No Yes No
SAK-TC275TP-64F200W CA on request PG-LQFP-176 -40°C - +125°C 4742 7060H / 4746 7060H 4) 200 4 64 @500k 472 120 32 112 24 32 48 1/2 Yes Yes Yes No
SAK-TC275TC-64F200W CA on request PG-LQFP-176 -40°C - +125°C 4742 7460H / 4746 7460H 4) 200 4 24 @500k 424 120 24 112 24 48 1/2 No Yes No No
SAK-TC275T-64F200W CA on request PG-LQFP-176 -40°C - +125°C 0742 7060H / 0746 7060H 4) 200 4 64 @500k 472 120 32 112 24 32 48 1/2 Yes No Yes No
SAL-TC275T-64F200W CA on request PG-LQFP-176 -40°C - +150°C 0742 7060H / 0746 7060H 4) 200 4 64 @500k 472 120 32 112 24 32 48 1/2 Yes No Yes No
SAL-TC275TP-64F200W CA on request PG-LQFP-176 -40°C - +150°C 4742 7060H / 4746 7060H 4) 200 4 64 @500k 472 120 32 112 24 32 48 1/2 Yes Yes Yes No
SAL-TC277T-64F200S CA on request PG-LFBGA-292 -40°C - +150°C 0742 7160H / 0746 7160H 4) 200 4 64 @500k 472 120 32 112 24 32 60 1/2 Yes No Yes No

1) STANDARD = serial production planned.

2) The address range starts at the lowest address defined in the User's Manual (See the Memory Maps chapter).

3) Based on an EEPROM emulation algorithm with a wear levelling factor of 6 (size scales with number of program/erase cycles, for more details see User Manual).

4) Featuring flash firmware (µCode) version 23H

Variants DB Step

Derivative Production Status Package Type Temp. Range Chip ID Freq. (MHz) Flash (MB) EEPROM (KB) Total SRAM (KB) Core 1&2 TC16P (KB) Core 0 TC16E (KB) DSPR (KB) PSPR (KB) DSPR (KB) PSPR (KB) LMU (KB) ADC Chan. (#/ch.) FlexRay ETH HSM CAN FD CAN FD ISO frame
SAK-TC277TP-64F200S DB on request PG-LFBGA-292 -40°C - +125°C 4744 7171H / 4746 7171H 4) 200 4 64 @500k 472 120 32 112 24 32 60 1/2 Yes Yes Yes No
SAK-TC277T-64F200S DB on request PG-LFBGA-292 -40°C - +125°C 0744 7171H / 0746 7171H 4) 200 4 64 @500k 472 120 32 112 24 32 60 1/2 Yes No Yes No
SAK-TC277TC-64F200S DB on request PG-LFBGA-292 -40°C - +125°C 4744 7571H / 4746 7571H 4) 200 4 24 @500k 424 120 24 112 24 60 1/2 No Yes No No
SAK-TC275TP-64F200W DB on request PG-LQFP-176 -40°C - +125°C 4744 7071H / 4746 7071H 4) 200 4 64 @ 500k 472 120 32 112 24 32 48 1/2 Yes Yes Yes No
SAK-TC275T-64F200W DB on request PG-LQFP-176 -40°C - +125°C 4744 7071H / 4746 7071H 4) 200 4 64 @ 500k 472 120 32 112 24 32 48 1/2 Yes Yes No No
SAK-TC275TC-64F200W DB on request PG-LQFP-176 -40°C - +125°C 4744 7471H / 4746 7471H 4) 200 4 24 @ 500k 424 120 24 112 24 48 1/2 No Yes No No
SAL-TC270TP-64F200 DB on request Bare Die -40°C - +170°C 4744 7F71H / 4746 7F71H 4) 200 4 64 @500k 472 120 32 112 24 32 60 1/2 Yes Yes Yes No
SAL-TC277TP-64F200S DB on request PG-LFBGA-292 -40°C - +150°C 4744 7171H / 4746 7171H 4) 200 4 64 @500k 472 120 32 112 24 32 60 1/2 Yes Yes Yes No
SAL-TC277T-64F200S DB on request PG-LFBGA-292 -40°C - +150°C 0744 7171H / 0746 7171H 4) 200 4 64 @500k 472 120 32 112 24 32 60 1/2 Yes No Yes No
SAL-TC275TP-64F200W DB on request PG-LQFP-176 -40°C - +150°C 4744 7071H / 4746 7071H 4) 200 4 64 @ 500k 472 120 32 112 24 32 48 1/2 Yes Yes Yes No
SAL-TC275T-64F200W DB on request PG-LQFP-176 -40°C - +150°C 4744 7071H / 4746 7071H 4) 200 4 64 @ 500k 472 120 32 112 24 32 48 1/2 Yes Yes No No

1) STANDARD = serial production planned.

2) The address range starts at the lowest address defined in the User's Manual (See the Memory Maps chapter).

3) Based on an EEPROM emulation algorithm with a wear levelling factor of 6 (size scales with number of program/erase cycles, for more details see User Manual).

4) Featuring flash firmware (µCode) version 23H

Variants DC Step

Derivative Production Status Package Type Temp. Range Chip ID Freq. (MHz) Flash (MB) EEPROM (KB) Total SRAM (KB) Core 1&2 TC16P (KB) Core 0 TC16E (KB) DSPR (KB) PSPR (KB) DSPR (KB) PSPR (KB) LMU (KB) ADC Chan. (#/ch.) FlexRay ETH HSM CAN FD CAN FD ISO frame
SAK-TC277TP-64F200N DC STANDARD PG-LFBGA-292 -40°C - +125°C 4746 7172H 200 4 64 @ 500k 472 120 32 112 24 32 60 1/2 Yes Yes Yes Yes
SAK-TC277TP-64F200S DC STANDARD PG-LFBGA-292 -40°C - +125°C 4746 7172H 200 4 64 @ 500k 472 120 32 112 24 32 60 1/2 Yes Yes Yes No
SAK-TC277TC-64F200N DC on request PG-LFBGA-292 -40°C - +125°C 4746 7572H 200 4 24 @ 500k 424 120 24 112 24 60 1/2 No Yes Yes Yes
SAK-TC277TC-64F200S DC on request PG-LFBGA-292 -40°C - +125°C 4746 7572H 200 4 24 @ 500k 424 120 24 112 24 60 1/2 No Yes No No
SAK-TC277T-64F200N DC on request PG-LFBGA-292 -40°C - +125°C 0746 7172H 200 4 64 @ 500k 472 120 32 112 24 32 60 1/2 Yes No Yes Yes
SAK-TC277T-64F200S DC on request PG-LFBGA-292 -40°C - +125°C 0746 7172H 200 4 64 @ 500k 472 120 32 112 24 32 60 1/2 Yes No Yes No
SAK-TC275TP-64F200N DC STANDARD PG-LQFP-176 -40°C - +125°C 4746 7072H 200 4 64 @ 500k 472 120 32 112 24 32 48 1/2 Yes Yes Yes Yes
SAK-TC275TP-64F200W DC on request PG-LQFP-176 -40°C - +125°C 4746 7072H 200 4 64 @ 500k 472 120 32 112 24 32 48 1/2 Yes Yes Yes No
SAK-TC275T-64F200N DC on request PG-LQFP-176 -40°C - +125°C 0746 7072H 200 4 64 @ 500k 472 120 32 112 24 32 48 1/2 Yes No Yes Yes
SAK-TC275TC-64F200N DC on request PG-LQFP-176 -40°C - +125°C 4746 7472H 200 4 24 @ 500k 424 120 24 112 24 48 1/2 No Yes Yes Yes
SAK-TC275TC-64F200W DC on request PG-LQFP-176 -40°C - +125°C 4746 7472H 200 4 24 @ 500k 424 120 24 112 24 48 1/2 No Yes No No
SAK-TC275T-64F200W DC on request PG-LQFP-176 -40°C - +125°C 0746 7072H 200 4 64 @ 500k 472 120 32 112 24 32 48 1/2 Yes No Yes No
SAL-TC277TP-64F200N DC on request PG-LFBGA-292 -40°C - +150°C 4746 7172H 200 4 64 @ 500k 472 120 32 112 24 32 60 1/2 Yes Yes Yes Yes
SAL-TC277T-64F200S DC on request PG-LFBGA-292 -40°C - +150°C 0746 7172H 200 4 64 @ 500k 472 120 32 112 24 32 60 1/2 Yes No Yes No
SAL-TC275TP-64F200N DC on request PG-LQFP-176 -40°C - +150°C 4746 7072H 200 4 64 @ 500k 472 120 32 112 24 32 48 1/2 Yes Yes Yes Yes
SAL-TC275TP-64F200W DC on request PG-LQFP-176 -40°C - +150°C 4746 7072H 200 4 64 @ 500k 472 120 32 112 24 32 48 1/2 Yes Yes Yes No
SAL-TC270TP-64F200N DC on request Bare Die -40°C - +170°C 4746 7F72H 200 4 64 @ 500k 472 120 32 112 24 32 60 1/2 Yes Yes Yes Yes

1) STANDARD = serial production planned.

2) The address range starts at the lowest address defined in the User's Manual (See Memory Maps chapter).

3) Based on an EEPROM emulation algorithm with a wear levelling factor of 6 (size scales with number of program/erase cycles, for more details see User Manual).

4) Featuring flash firmware (µCode) version 23H

Memory Maps of Variants

DF_EEPROM Variants:

Exemplary EEPROM size: 384 KB (64 KB @ 500k)

Logical Sector Size Offset Address Logical Sector Size Offset Address
AF00 0000н EEPROMO 8 KB 00 0000н AF00 0000н EEPROMO 8 KB 00 0000н
EEPROM1 8 KB 00 2000H EEPROM1 8 KB 00 2000H
EEPROM2 8 KB 00 4000H EEPROM2 8 KB 00 4000H
... ... ... ... ... ...
AF06 0000н EEPROM47 8 KB 05 Е000н AF02 4000н EEPROM17 8 KB 02 2000H
AF06 0000н Reserved

144 KB (24 KB @ 500k)

Logical Sector Size Offset Address
AF00 0000н EEPROMO 8 KB 00 0000н
EEPROM1 8 KB 00 2000H
EEPROM2 8 KB 00 4000H
... ... ...
AF02 4000н EEPROM17 8 KB 02 2000H
AF06 0000н Reserved

Core1/2 PSPR Variants: 32 KB

Diagram showing memory map for Core1/2 PSPR variants.

24 KB

Note: The diagrams show memory allocation with hatched areas indicating reserved or unavailable memory.

LMU Variants:

32 KB

0 KB

ETH Variants:

Yes

Nc

HSM Variants:

Yes

No

CAN FD Variants: No influence on Memory Map. CAN FD = “No” variants: all CAN register fields NCRx.FDEN have to be kept 0в.

Revision History

Page or Reference Description of change
V1.1 Chip IDs for CA & DC steps corrected
Bugs in HSM (Y/N) and CAN FD (Y/N) corrected
V1.2 Memory maps added
CAN FD DIS2015 markings added
µCode 23H ChipIDs added
V1.3 Memory maps corrections
CAN FD Chip ID added
V1.4 Variant cleanup on older steps
V1.5 New CAN FD marking options added
V1.6 Navigation pane added to improve Ease of Use
V1.7 Alignment with Safety Documentation
V1.8 Corrections to the CA step table
V1.9 Package information updated
V1.10 Chip ID for SAK-TC277T-64F200S DB and SAL-TC277T-64F200S DB corrected

Trademarks

Trademarks of Infineon Technologies AG: AURIX™, C166™, CanPAK™, CIPOSTM, CIPURSETM, CoolGaNTM, CoolMOSTM, CoolSETTM, CoolSiCTM, CORECONTROLTM, CROSSAVETM, DAVETM, DI-POLTM, DrBLADETM, EasyPIMTM, EconoBRIDGETM, EconoDUALTM, EconoPACKTM, EconoPIMTM, EiceDRIVERTM, eupecTM, FCOSTM, HITFETTM, HybridPACKTM, ISOFACETM, IsoPACKTM, i-WaferTM, MIPAQTM, ModSTACKTM, my-dTM, NovalithICTM, OmniTuneTM, OPTIGATM, OptiMOSTM, ORIGATM, POWERCODETM, PRIMARIONTM, PrimePACKTM, PrimeSTACKTM, PROFETTM, PRO-SILTM, RASICTM, REAL3TM, ReverSaveTM, SatRICTM, SIEGETTM, SIPMOSTM, SmartLEWISTM, SOLID FLASHTM, SPOCTM, TEMPFETTM, thinQ!TM, TRENCHSTOPTM, TriCoreTM.

Other Trademarks: Advance Design SystemTM (ADS) of Agilent Technologies, AMBATM, ARMTM, MULTI-ICETM, KEILTM, PRIMECELLTM, REALVIEWTM, THUMBTM, µVisionTM of ARM Limited, UK. ANSITM of American National Standards Institute. AUTOSARTM of AUTOSAR development partnership. BluetoothTM of Bluetooth SIG Inc. CAT-iqTM of DECT Forum. COLOSSUSTM, FirstGPSTM of Trimble Navigation Ltd. EMVTM of EMVCo, LLC (Visa Holdings Inc.). EPCOSTM of Epcos AG. FLEXGOTM of Microsoft Corporation. HYPERTERMINALTM of Hilgraeve Incorporated. MCSTM of Intel Corp. IECTM of Commission Electrotechnique Internationale. IrDATM of Infrared Data Association Corporation. ISOTM of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION. MATLABTM of MathWorks, Inc. MAXIMTM of Maxim Integrated Products, Inc. MICROTECTM, NUCLEUSTM of Mentor Graphics Corporation. MIPITM of MIPI Alliance, Inc. MIPSTM of MIPS Technologies, Inc., USA. muRataTM of MURATA MANUFACTURING CO., MICROWAVE OFFICETM (MWO) of Applied Wave Research Inc., OmniVisionTM of OmniVision Technologies, Inc. OpenwaveTM of Openwave Systems Inc. RED HATTM of Red Hat, Inc. RFMDTM of RF Micro Devices, Inc. SIRIUSTM of Sirius Satellite Radio Inc. SOLARISTM of Sun Microsystems, Inc. SPANSIONTM of Spansion LLC Ltd. SymbianTM of Symbian Software Limited. TAIYO YUDENTM of Taiyo Yuden Co. TEAKLITETM of CEVA, Inc. TEKTRONIXTM of Tektronix Inc. TOKOTM of TOKO KABUSHIKI KAISHA TA. UNIXTM of X/Open Company Limited. VERILOGTM, PALLADIUMTM of Cadence Design Systems, Inc. VLYNQTM of Texas Instruments Incorporated. VXWORKSTM, WIND RIVERTM of WIND RIVER SYSTEMS, INC. ZETEXTM of Diodes Zetex.

Last Trademarks Update 2014-07-17

www.infineon.com

Edition 2021-04-15

Published by Infineon Technologies AG, 81726 Munich, Germany

© 2019 Infineon Technologies AG. All Rights Reserved.

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Email: erratum@infineon.com

Document reference: ifxDSA0002

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