u-blox EVK-VERA-P174 Evaluation Kit User Guide

This document provides a comprehensive guide to setting up and utilizing the EVK-VERA-P174 evaluation kit for the VERA-P1 series host-based V2X transceiver modules.

1. Evaluation Kit Description

The VERA-P1 is a compact, embedded transceiver module enabling Vehicle-to-Everything (V2X) communication systems. It integrates a MAC/LLC/Baseband processor and RF front-end components, connecting to a host processor via USB or SPI.

The EVK-VERA-P174 evaluation kit offers a streamlined method for evaluating VERA-P1 modules. It serves as an evaluation and development platform, providing full access to the VERA-P1 module's interfaces and facilitating integration with external PC or host processor development platforms.

Main Features of the EVK-VERA-P174:

Host communication via Micro USB or SPI pin header.
Two SMA antenna connectors for the VERA-P1 module.
Integrated u-blox NEO-M8U GNSS module with SMA antenna connector.
On-board SPI flash for evaluating different boot options.
Integrated USB 2.0 hub for accessing VERA-P1, GNSS, and SPI flash via a single connector.
9 – 28 V DC power supply input with options for external supplies and current measurement.

Table 1: EVK-VERA-P174 Evaluation Kit Versions

Evaluation Kit	Description	Suitable for evaluation of
EVK-VERA-P174	Evaluation kit for the VERA-P1 module	VERA-P173 (with single radio firmware) VERA-P174 (with dual radio firmware)

For more details on VERA-P1 series modules, refer to the VERA-P1 series data sheet [1] and VERA-P1 series system integration manual [2].

The EVK-VERA-P174 comprises two boards connected via a board-to-board connector. The upper board houses the VERA-P174 and NEO-M8U GNSS modules. The lower power supply board includes the USB interface and main power supply, allowing direct connection to a compatible host board.

1.2 Kit Includes

The EVK-VERA-P174 evaluation kit includes:

Evaluation board with VERA-P174 module (main and power supply boards).
Two 5.9 GHz DSRC antennas (Triton TD.10 5 dBi).
Micro USB cable.
Quick Start card.

1.3 Software and Documentation

Linux drivers, firmware, and basic evaluation tools for VERA-P1 modules are available via u-blox support. Software distribution requires signing the u-blox Limited Use License Agreement (LULA-N).

Contact u-blox support for your region to obtain the software package.

1.4 System Requirements

Host PC with a USB 2.0 interface.
Native Linux OS or virtual machine running Linux (e.g., Ubuntu 18.04 LTS).

1.5 Specifications

The following tables detail the absolute maximum ratings and operating conditions for the EVK-VERA-P174:

Table 2: Absolute Maximum Ratings

Symbol	Description	Min.	Max.	Unit
V_Sys	Main power supply 9 – 28 V	-0.3	28.0	V
5V0_A1, 5V0_A2	Power supply voltage 5 V	-0.3	6.0	V
3V3	Power supply voltage 3.3 V	-0.3	3.9	V
VIO	I/O supply voltage 1.8 V/3.3 V	-0.3	3.9	V
TSTORAGE	Storage temperature	-40	+95	°C

Table 3: Operating Conditions

Symbol	Description	Min.	Typ	Max.	Unit
V_Sys	Main power supply voltage	9	12	28	V
5V0_A1, 5V0_A2	Power supply voltage 5.0 V	4.5	5.0	5.5	V
3V3	Power supply voltage 3.3 V	3.0	3.3	3.6	V
VIO	I/O supply voltage 1.8 V/3.3 V	1.65	1.8	1.95	V
TA	Ambient operating temperature	-40	3.0	3.3	3.6	°C
Ripple Noise	Peak-to-peak voltage ripple on 3V3 supply lines			175	mV
	Peak-to-peak voltage ripple on 5V0 supply lines			125	mV

Table 4: Digital Pad Ratings

Symbol	Description	Conditions	Typ	Max.	Unit
VIH	Input high voltage		0.7*VIO¹	VIO¹	V
VIL	Input low voltage		-0.3	0.62	V
VHYS	Input hysteresis		0.18		V
VOH	Output high voltage	I_omax = 5 mA	VIO - 0.4		V
VOL	Output low voltage	I_omax = -5 mA	0.4		V

¹ 1PPS pad always uses 1.8 V internally generated IO supply regardless of the VIO pad voltage.
² RSTn pad is internally pulled high to VIO voltage by 100k. During reset, it should be below 0.2 V.

2. Getting Started

Follow these basic steps to evaluate VERA-P1 modules using the EVK-VERA-P174:

Ensure jumpers are placed on the current measurement pin headers on the main board as shown in Figure 2. For 5 V, 3.3 V, and 1.8 V supplies, jumpers must be placed on the power supply board to utilize the on-board voltage regulators. The VIO voltage selection jumper on the power supply board defaults to 3.3 V. Refer to the board's back for jumper location details.
Place jumpers on Boot_0 and Boot_1 to select USB DFU boot mode.
Connect two external 5.9 GHz antennas to the VERA-P1 module's SMA antenna connectors. Ensure RF ports are terminated to a 50 Ω load (e.g., antenna, spectrum analyzer, or 802.11p receiver). If connecting two EVK-VERA-P174 evaluation kits directly, use a minimum attenuation of 50 dB to prevent module damage.
Connect a 9 – 28 V, 12 W power adapter to the power supply board's barrel power connector. The power and reset LEDs should illuminate.
Connect the power supply board's micro USB connector to a host processor or PC. The USB LED should illuminate.
Follow the quick start instructions in Section 4.1 to build the Linux driver and applications for VERA-P1 modules and download the firmware.

3. Board Description

This section details the EVK-VERA-P174 evaluation board, its connectors, and configuration settings.

3.1 Block Diagram

Figure 3 illustrates the general block diagram of the evaluation board.

Figure 3: Block diagram of the EVK-VERA-P174 evaluation board

3.2 Overview

Table 5 lists connectors on the EVK-VERA-P174 main board, and Table 6 lists connectors on the power supply board, along with their functions.

3.2.1 Main board

Figure 4: EVK-VERA-P1 Main board assembly overview

Table 5: EVK-VERA-P174 Main board connector description

Designator	Connector	Description
J112	Bootstrapping	Jumpers to select the VERA-P1 boot mode.
J105	SPI	SPI interface connector.
J108	1PPS	Jumper and connector for the internal or external 1PPS signal.
J109	3V3 current measure	Pin header to measure current on 3V3 rail.
J110	VIO current measure	Pin header to measure current on VIO rail.
J111	5V current measure	Pin header to measure current on 5V rail.
J102	ANT1	SMA connector for antenna 1 of VERA-P1.
J103	ANT2	SMA connector for antenna 2 of VERA-P1.
J113	SPI CS	Jumper to configure SPI chip select routing between VERA-P1, SPI flash, and host.
J104	GNSS antenna	SMA connector for the GNSS antenna.
J106	GNSS connector	Connector for GNSS UART/1PPS signals.
J101	Host interface connector	Board-to-board connector to the power supply board.

3.2.2 USB and power supply board

Figure 5: USB Power supply board assembly overview

Table 6: EVK-VERA-P174 Power supply board connector description

Designator	Connector	Description
J1	Main supply	2.5 x 5.5 mm barrel connector for 9 – 28 V power supply. Connect jumpers J7, J8, J9 and J10 before using.
J8	Jumper for 5 V supply	Disconnect to use external 5 V supply on J5.
J7	Jumper for 3.3 V supply	Disconnect to use external 3.3 V supply on J4.
J5	External 5 V supply	Connector for external 5 V supply.
J4	External 3.3 V supply	Connector for external 3.3 V supply.
J10	VIO select	Jumper to select VIO voltage 1.8 V or 3.3 V.
J9	Jumper for 1.8 V supply	Disconnect to use external 1.8 V supply on J6.
J6	External 1.8 V supply	Connector for external 1.8 V supply.
J2	Micro USB	USB interface connector.
J3	Host interface connector	Board-to-board connector to the main board.

3.3 Connectors

3.3.1 Power supply and configuration

The VERA-P1 module supports 3.3 V, 5 V, and VIO (3.3 V or 1.8 V) supplies. The evaluation board is powered via a DC power jack (J1) with a 9-28 V input. Supply voltages can be generated by on-board DC-DC converters and LDO regulators, or supplied externally via connectors J5 (5 V), J4 (3.3 V), and J6 (1.8 V) on the power supply board. Disconnect jumpers J8, J7, or J9 to use external power supply connectors. The VIO voltage for the VERA-P1 module can be selected using jumper J10 on the power supply board (1.8 V or 3.3 V). Individual current consumption on the 3.3 V, 5 V, and VIO rails can be measured using pin headers J109, J111, and J110 on the main board.

3.3.2 USB interface

The USB host communication for the VERA-P1 module is handled by the micro USB connector (J2) on the power supply board. This connector links to a USB 2.0 hub, which connects to the following downstream devices:

VERA-P1 module's USB interface on the main board.
u-blox NEO-M8U GNSS module via a USB-to-UART bridge (FT234XD-T).
VERA-P1 module's SPI interface or on-board SPI flash via a USB-to-SPI bridge (FT2232H port A).

3.3.3 Bootstrapping

The bootstrapping jumper (J112) on the main board selects the VERA-P1 module's boot mode. Table 7 lists the valid bootstrap options. To set a logic level 0, connect the boot pin to GND with a jumper. Leave the pin open for logic level 1.

Table 7: Boot mode configuration

Boot mode	Boot 2	Boot 0	Description
SPI master	1	1	VERA-P1 acts as an SPI master, automatically downloading a bootloader or firmware from an SPI flash.
SPI slave	1	1	Firmware download is controlled by an external SPI master. VERA-P1 acts as SPI slave.
USB-DFU	1	0	USB Device Firmware Upgrade (DFU) boot mode. VERA-P1 presents itself as a DFU device for downloading SDR firmware.

The EVK-VERA-P174 includes an on-board SPI flash for the SPI master boot option. Refer to section 3.3.5 for SPI chip select routing options.

3.3.4 SPI interface

The SPI interface connector (J105) on the main board connects to the VERA-P1 module's SPI interface or the on-board SPI flash. SPI chip select jumpers configure the SPI chip select signal routing between the VERA-P1 module and the SPI flash.

3.3.5 SPI chip select

The EVK-VERA-P174 features an 8 Mbit SPI flash (SST25VF080B) for storing radio firmware or bootloaders. The SPI chip select pin header (J113) on the main board configures the routing of the SPI chip select signal between the VERA-P1, host, and SPI flash. Table 8 shows possible configurations.

Table 8: SPI Chip select configuration

SPI CS routing	Jumper settings³ (J113)	Description
Host to flash via USB	2(1-3)	Programs the flash from the host via USB. The SPI flash is accessible via the USB interface on the power supply board. A USB-to-SPI bridge (FT2232H) connects the SPI flash to the USB.
Host to flash via J105	2(1-3), 4(5-6)	Programs the flash from the host directly over SPI. The SPI flash is accessible via the SPI interface connector or the host interface connector. Jumper on 5-6 disables the USB-to-SPI bridge.
VERA-P1 to flash	1 (1-2), 4(5-6)	Connects VERA-P1 to the SPI flash for firmware or bootloader download when boot mode "SPI master" is selected (see 3.3.3).
Host to VERA-P1 via J105	3(2-4), 4 (5-6)	Connects VERA-P1 to the host over SPI when boot mode "SPI slave" is selected (see 3.3.3). The VERA-P1 SPI interface is accessible via the SPI interface connector or the host interface connector.

³ Italic number is the designation as printed on the EVK.

3.3.6 1PPS interface

A 1PPS UTC reference signal is required by the IEEE1609.4 MAC for aligning transmissions during channel switching and timekeeping. The 1PPS pin header (J108) on the main board connects the 1PPS signal from the on-board NEO-M8U GNSS receiver to the VERA-P1 module's 1PPS input. Place a jumper on pins 1 and 2 of the 1PPS pin header to connect the 1PPS signal from the NEO-M8U GNSS module to the VERA-P1 module. Pins 2 (VERA-P1 1PPS) and 3 (GND) can be used to connect an external 1PPS signal to the VERA-P1 module. The signal level for external 1PPS can range from 1.8–5 V and is converted to 1.8 V via a level shifter.

3.3.7 GNSS interface

GNSS UART and 1PPS signals are available on connector J106.

3.3.8 SMA connectors

The EVK-VERA-P174 includes two SMA connectors, ANT1 (J102) and ANT2 (J103), for connecting external antennas or measurement instruments to the VERA-P1 module's antenna pins. A third SMA connector (J104) connects an active antenna to the on-board NEO-M8U GNSS module. The SMA connectors are specified for RF signals up to 18 GHz. Always ensure RF ports are terminated to a 50 Ω load. Direct connection of two EVK-VERA-P174 evaluation kits requires a minimum attenuation of 50 dB to prevent module damage.

3.3.9 Host interface connector

The host interface connector connects the VERA-P1 main board to the power supply and USB interface board. It can also connect the VERA-P1 main board directly to a compatible host board. The main board connector is a QMS-052-0675-L-D-PC4, and the power supply board counterpart is a QFS-052-0675-L-D-PC4.

3.4 LEDs

Table 9 lists the LEDs on the EVK-VERA-P174:

Table 9: LED Description

Name	Designator	Location	Function
Power	LED1	Power supply board	Indicates 3.3 V supply (LED on).
USB	LED2	Power supply board	Indicates USB connection to the host (LED on).
Reset	LED103	Main board, near pin 1 of VERA-P1	Indicates VERA-P1 module in reset (LED off).
1PPS	LED102	Main board	Indicates 1PPS signal (LED blinking).
Firmware	LED101	Main board	Indicates firmware loaded (LED on) through current measurement.

3.5 Buttons

The reset button on the main board (S101) resets the VERA-P1 module. The button on the power supply board (S1) resets the on-board power supply for the EVK.

3.6 Design files

Schematics for the EVK-VERA-P174 are shown in Figures 6 and 7. Full design files are available via u-blox support. To obtain these documents, email the support team for your area, as listed in the Contact section.

4. Software

A standalone software package, "LLC Remote," is available through u-blox support for VERA-P1 modules. It includes:

A firmware image for system start download.
A driver for the V2X stack.
Various test tools and example applications.
Precompiled executables for Linux x86 PCs.

The LLC driver and some tools are provided as source code. Cohda Wireless Pty developed the LLC driver and SDR firmware. The release process combines firmware binary and LLC Remote driver implementation with the Cohda MKx Software Development Kit release. The LLC Remote package versioning follows the Cohda SDK numbering.

A release notes document with quick start instructions for compiling the software is included with each package. Recipes for integrating the software package into Yocto-based projects can be provided by u-blox upon request.

To evaluate VERA-P1 modules, connect the EVK-VERA-P174 via USB to a native Linux PC or a virtual machine running Linux. This guide uses a virtual machine running Ubuntu 18.04 LTS with Linux kernel 4.15.0-23-generic (x86_64).

4.1 Quick start instructions

Copy the LLC Remote package archive to your Linux development environment. Extract the content and navigate to the extracted directory:

$ tar -xzf V2X_LLC_Remote_V15.0.0.tar.gz
$ cd llc-remote

Run the install.sh script in a new development environment to automatically install package dependencies. This script requires system privileges and an active internet connection. Main dependencies include:

dfu-util for downloading radio firmware via USB DFU boot mode.
linux-headers for building the LLC remote driver.
bison, flex for building the included libpcap library.

$ sudo ./install.sh

Build the software package by running make:

$ make

If make fails due to a missing pcap library, create a symbolic link:

$ ln -sr bsp/app/libpcap/$(uname -m)/libpcap.a cohda/app/llc/lib/

Then run make again. This compiles and installs:

cw-llc driver for the active Linux kernel.
libLLC.so LLC user-space library.

The LLC user-space tool, plugins, and library are installed in the ./bin subdirectory. The cw-llc driver is copied to ./drivers/<kernel_version>.

Connect the EVK-VERA-P174 to the PC and the USB device to the virtual machine. The VERA-P1 module appears as "NXP SAF510x DFU" with USB device ID 1fc9:0102. Use lsusb to verify.

$ lsusb
Bus 001 Device 002: ID 1fc9:0102 NXP Semiconductors

Run the ./load script to detect the VERA-P1 module and download radio firmware via USB DFU. Select option 2 for SDRMK5Dual.bin (VERA-P174) or option 4 for SDRMK5Single.bin (VERA-P173).

$ ./load

NOTE: dfu-util might fail under VMWare. Unplugging and restarting ./load may be necessary.

The script prompts for firmware selection:

Select file to download (1-4): 2

The output indicates firmware file usage and progress.

dfu-util details are displayed, including copyright and version information.

After firmware download, reset the USB to return to runtime mode. If using a virtual machine, repeat the ./load script until the cw-llc driver module loads. Ensure the new 802.11p radio device (USB ID 1fc9:0103) is automatically connected.

Once detected, the ./load script output will appear as:

$ ./load
0

LLC plugins for channel configuration, sending, and receiving packets are provided as source code. Other plugins are binary only.

4.2 Module calibration

The EVK-VERA-P174 modules require manual calibration after each power cycle and firmware load. Instructions for calibration parameters and files are in the VERA-P1 series system integration manual [2].

4.3 Usage examples

Basic tests can be performed using the LLC tool and plugins after loading firmware and the LLC driver. The tool and plugins are in the ./bin subdirectory. Run ./llc -C to list available commands/plugins. Table 10 describes basic plugins.

Table 10: Description of LLC plugins

Plugin	Description
count	Displays transmit and receive counters for both radios.
config	Displays configuration (mode/antenna/freq) of both radios.
txqueue	Displays Tx MAC state and queue counts.
status	Displays instantaneous radio status, queued packets, and medium state.
cfg	Reads or writes RadioConfig data.
version	Reports SDR firmware image version details.
dmesg	Displays debug messages from the ARM/VDSP1/VDSP2 processor.
rxphylast	Displays details of the last received frames by the PHY.
txphylast	Displays details of the last transmitted frames by the PHY.
chconfig	Sets channel configuration for both radios.
test-tx	Generates and transmits test packets.
test-rx	Receives test packets.

4.3.1 Transmit and receive counters

Use the command ./llc count to display transmit and receive counters for both radios:

This command helps verify module access.

$ ./llc count

The output shows counters for Radio A and Radio B, including MAC and PHY frames, errors, and other statistics.

4.3.2 Channel configuration

Configure channel settings for VERA-P1 radios using the chconfig LLC plugin via the Control Channel (CCH) or Service Channel (SCH). The plugin uses the LLC Remote API for setup, start, stop, and retrieval of CCH/SCH configurations.

Example: Configure and start the control channel (radio channel configuration 0) on radio A, channel 184, using both antennas:

$ ./llc chconfig -s -w CCH -c 184 -r a -a 3

4.3.3 Transmitter test

The test-tx LLC plugin transmits packet bursts. CCH or SCH must be configured prior to transmission. The settings define default packet configurations.

Example: Transmit 100 test packets (200 bytes each) on channel 184 using both antennas, with output power set to 40 and modulation set to ½ QPSK:

$ ./llc test-tx -c 184 -p 40 -a 3 -m MK2MCS R12QPSK -n 100 -1 200

4.3.4 Receiver test

The test-rx command receives test packets sent by another module using the test-tx command. The application reports received packet counts and packet error rate. The receiver must be running before transmission starts.

To test packet transmission between two VERA-P1 modules, use two host PCs or virtual machines.

Receiving side:

$ ./llc chconfig -s -w CCH -c 184
$ ./llc test-rx -c 184

Transmitting side: Sends 1000 packets at 100 packets/second.

$ ./llc chconfig -s -w CCH -c 184
$ ./llc test-tx -c 184 -a1 -p30 -n1000 -r100

The receiver output will show packet statistics, including approximate PER and matched/unmatched frames.

4.3.5 LLC native IPv6 functionality

The LLC driver supports native IPv6 functionality using the Linux IPv6 stack since release 15. It creates two network interfaces: llc-cch-ipv6 and llc-sch-ipv6 for IPv6 communication between VERA-P1 modules. These interfaces map to channel configuration 0 of radio A and radio B, respectively. All VERA-P1 modules must use the same DSRC channel for communication.

Enable IPv6 support by loading the driver module with the option IPv6Enabled=1. The optional argument IPv6MCS can set the transmission rate for IPv6 packets. Pass module options to the load script in the ./drivers subdirectory after downloading the radio firmware.

$ cd drivers; ./load IPv6Enabled=1; cd

Deactivate the Linux host's Network Manager or configure it to ignore LLC IPv6 interfaces (set to Link-Local only) and disable IPv4 to avoid interface configuration interference.

Use chconfig to configure the DSRC channel on all VERA-P1 modules. Example: set channel configuration 0 of radio A to channel 180 for communication using the llc-cch-ipv6 network interface:

$ llc chconfig -s -w CCH -r a -c 180

Use the following commands to enable the llc-cch-ipv6 network interface and get the automatically assigned link-local IPv6 address:

$ ip link set llc-cch-ipv6 up
$ ip addr show llc-cch-ipv6

The IPv6 address can be used for IPv6 ping requests from another VERA-P1 module over the llc-cch-ipv6 interface:

$ ping6 -I llc-cch-ipv6 fe80::8a8c:22ae:976d:cdde

Test throughput over IPv6 between two VERA-P1 modules using the iperf3 tool. Start the iperf3 server on one side:

$ iperf3 -s -D

Then start the throughput test on the client side, connecting to the server's IPv6 address:

$ iperf3 -6 -c fe80::8a8c:22ae:976d:cdde%llc-cch-ipv6

4.4 Building the software for a different target platform

Building the LLC Remote package for a different target system requires a toolchain and configured kernel sources. The following example cross-compiles the LLC driver and tools for an Arm architecture using the gcc-arm-linux-gnueabi toolchain. Configured kernel sources should be in /home/duser/work/linux-3.10.107/.

Recipes for Yocto-based projects integration are available from u-blox.

To cross-compile the LLC driver:

$ cd cohda/kernel/drivers/cohda/llc
$ make BOARD=mk5 ARCH=arm CROSS_COMPILE=arm-linux-gnueabi- KERNELDIR=/home/duser/work/linux-3.10.107/

To cross-compile the LLC tool, library, and plugins:

$ cd cohda/app/llc
$ make BOARD=mk5 ARCH=arm CROSS_COMPILE=arm-linux-gnueabi- CC=arm-linux-gnueabi-gcc LD=arm-linux-gnueabi-ld

After successful compilation, deploy the following files to the target system:

cohda/app/llc/llc – LLC tool
cohda/app/llc/lib/libLLC.so* – LLC library
cohda/app/llc/plugin/*.so – LLC plugins
cohda/kernel/drivers/cohda/llc/cw-llc.ko – LLC kernel module
cohda/kernel/drivers/cohda/llc/SDRMK5*.bin – SDR firmware images

The dfu-util tool is required on the target system to download the SDR firmware to the VERA-P1 module.

⁶ Not all plugins are provided as source code. Binary plugins are available for i686, x86-64, and mk5 (Arm) architectures.

Appendix A: Glossary

Table 11: Explanation of the abbreviations and terms used

Abbreviation	Definition
1PPS	1 Pulse Per Second
API	Application Programming Interface
CMOS	Complementary Metal-Oxide-Semiconductor
DFU	Device Firmware Upgrade
DSRC	Dedicated Short Range Communication
ETSI	European Telecommunications Standards Institute
EVB	Evaluation Board
EVK	Evaluation Kit
IEEE	Institute of Electrical and Electronics Engineers
ITS	Intelligent Transport Systems
GNSS	Global Navigation Satellite System
GPS	Global Positioning System
MAC	Medium Access Control
LLC	Logical Link Control
OS	Operating System
PC	Personal Computer
PHY	Physical Layer
QPSK	Quadrature Phase-Shift Keying
RF	Radio Frequency
SDK	Software Development Kit
SDR	Software Defined Radio
USB	Universal Serial Bus
UTC	Coordinated Universal Time
V2X	Vehicle-to-Everything

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