ST TSX631, TSX632, TSX634, TSX631A, TSX632A, TSX634A

Micropower (45 μA, 200 kHz) rail-to-rail 16 V CMOS operational amplifiers

Datasheet - production data

Related products

Applications

Description

The TSX63x and TSX63xA series of operational amplifiers offer low voltage operation and rail-to-rail input and output. TSX631 is the single version, TSX632 the dual version and TSX634 the quad version, with pinouts compatible with industry standards.

The TSX63x and TSX63xA series offer a 200 kHz gain bandwidth product while consuming 60 μA maximum at 16 V.

The devices are housed in the tiniest industrial packages.

These features make the TSX63x and TSX63xA family ideal for sensor interfaces and industrial signal conditioning. The wide temperature range and high ESD tolerance ease the use in harsh automotive applications.

Features

Benefits

Table 1. Device summary

Op-amp version Standard VIO Enhanced VIO
Single TSX631 TSX631A
Dual TSX632 TSX632A
Quad TSX634 TSX634A

Package pin connections

Figure 1. Pin connections for each package (top view)

Single

SOT23-5 (TSX631)

Dual

DFN8 2x2 (TSX632)

MiniSO-8 (TSX632)

Quad

QFN16 3x3 (TSX634)

TSSOP14 (TSX634)

Absolute maximum ratings and operating conditions

Table 2. Absolute maximum ratings (AMR)

Symbol Parameter Value Unit
VCC Supply voltage(1) 18 V
Vid Differential input voltage (2) ±VCC
Vin Input voltage(3) VCC-0.2 to VCC+ 0.2 V
Iin Input current(4) 10 mA
Tstg Storage temperature -65 to +150 °C
Rthja Thermal resistance junction to ambient(5)(6) SOT23-5 250 °C/W
DFN8 2x2 120
MiniSO-8 190
QFN16 3x3 80
TSSOP14 100
Rthjc Thermal resistance junction to case DFN8 2x2 33 °C/W
QFN16 3x3 30
Tj Maximum junction temperature 160 °C
ESD HBM: human body model(7) 4 kV
MM: machine model(8) 200 V
CDM: charged device model(9) 1.3 kV
Latch-up immunity 200 mA

(1) All voltage values, except the differential voltage are with respect to network ground terminal.

(2) The differential voltage is the non-inverting input terminal with respect to the inverting input terminal. See Section 4.5 for precautions of using the TSX631 with high differential input voltage.

(3) VCC-Vin must not exceed 18 V, Vin must not exceed 18 V.

(4) Input current must be limited by a resistor in series with the inputs.

(5) Short-circuits can cause excessive heating and destructive dissipation.

(6) Rth are typical values.

(7) Human body model: 100 pF discharged through a 1.5 kΩ resistor between two pins of the device, done for all couples of pin combinations with other pins floating.

(8) Machine model: a 200 pF cap is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5 Ω), done for all couples of pin combinations with other pins floating.

(9) Charged device model: all pins plus package are charged together to the specified voltage and then discharged directly to the ground.

Table 3. Operating conditions

Symbol Parameter Value Unit
VCC Supply voltage 3.3 to 16 V
Vicm Common mode input voltage range VCC-0.1 to VCC+ 0.1
Toper Operating free air temperature range -40 to +125 °C

Electrical characteristics

Table 4. Electrical characteristics at VCC = +3.3 V with VCC- = 0 V, Vicm = VCC/2, T = 25 ° C, and RL = 10 kΩ connected to VCC/2 (unless otherwise specified)

Symbol Parameter Conditions Min. Typ. Max. Unit
DC performance
Vio Offset voltage TSX63xA, T = 25 °C 700 μV
TSX63xA, -40°C < T < 125 °C 1500
TSX63x, T = 25 °C 1.6 mV
TSX63x, -40°C < T < 125 °C 2.4
Vio Offset voltage, high common mode (Vicm=VCC, RL > 1 MΩ) T = 25 °C 4 mV
-40°C < T < 125 °C 5
ΔVio/ΔT Input offset voltage drift T = 25 °C 1 8 μV/°C
ΔVio Input offset voltage drift over temperature -40°C < T < 125 °C(1) 1 8 μV/°C
Iio Input offset current (Vout = VCC/2) T = 25 °C 1 100(2) pA
-40°C < T < 125 °C 200(2)
Iib Input bias current (Vout = VCC/2) T = 25 °C 1 100(2) pA
-40°C < T < 125 °C 200(2)
RIN Input resistance T = 25 °C 1
CIN Input capacitance T = 25 °C 5 pF
CMR1 Common mode rejection ratio CMR = 20 log (ΔVicm/ΔVio) (Vicm = -0.1 V to VCC-1.65 V, Vout = VCC/2, RL > 1 MΩ) T = 25 °C 65 79 dB
-40°C < T < 125 °C 62
CMR2 Common mode rejection ratio CMR = 20 log (ΔVicm/ΔVio) (Vicm = -0.1 V to VCC+0.1 V, Vout = VCC/2, RL > 1 MΩ) T = 25 °C 59 74 dB
-40°C < T < 125 °C 55
Avd Large signal voltage gain (Vout = 0.5 V to (VCC - 0.5 V), RL > 1 MΩ) T = 25 °C 100 110
-40°C < T < 125°C 90
VOH High level output voltage Vid = +1 V, VOH = VCC-Vout RL = 10 kΩ T = 25 °C 70 mV
RL = 10 kΩ -40°C < T < 125 °C 100
VOL Low level output voltage Vid = -1 V, RL = 10 kΩ T = 25 °C 70 mV
RL = 10 kΩ -40°C < T < 125 °C 100
Iout Isink (Vout = VCC) T = 25 °C 4.3 5.3 mA
-40°C < T < 125 °C 2.5
Iout Isource (Vout = 0 V) T = 25 °C 3.3 4.3 mA
-40°C < T < 125 °C 2.5
ICC Supply current (per operator, Vout = VCC/2, RL > 1 MΩ) T = 25 °C 45 60 μA
-40°C < T < 125 °C 60

Table 4. Electrical characteristics at VCC = +3.3 V with VCC- = 0 V, Vicm = VCC/2, T = 25 ° C, and RL = 10 kΩ connected to VCC/2 (unless otherwise specified)

Symbol Parameter Conditions Min. Typ. Max. Unit
AC performance
GBP Gain bandwidth product 160 200 kHz
Fu Unity gain frequency 160
φm Phase margin RL = 100 kΩ CL = 100 pF 55 degrees
Gm Gain margin 9 dB
SR Slew rate RL = 100 kΩ, CL = 100 pF, Vout = 0.5 V to VCC - 0.5V 0.12 V/μs
∫ en Low-frequency peak-to-peak input noise Bandwidth: f = 0.1 to 10 Hz 5 μVpp
en Equivalent input noise voltage f = 1 kHz 60 nV
/√Hz
f = 10 kHz
THD+N Total harmonic distortion + noise Follower configuration,
fin = 1 kHz, RL = 100 kΩ
Vicm = 0.9V, BW = 22 kHz,
Vout = 1 Vpp
0.005 %

(1) See Chapter 4.3: Input offset voltage drift over temperature on page 18

(2) Guaranteed by design

Electrical characteristics

Table 5. Electrical characteristics at VCC = +5 V with VCC- = 0 V, Vicm = VCC/2, T = 25 ° C, and RL = 10 kΩ connected to VCC/2 (unless otherwise specified)

nV
/month
Symbol Parameter Conditions Min. Typ. Max. Unit
DC performance
Vio Offset voltage TSX63xA, T = 25 °C 700 μV
TSX63xA, -40°C < T < 125 °C 1500
TSX63x, T = 25 °C 1.6 mV
TSX63x, -40°C < T < 125 °C 2.4
Vio Offset voltage, high common mode (Vicm=VCC, RL > 1 MΩ) T = 25 °C 4 mV
-40°C < T < 125 °C 5
ΔVio/ΔT Input offset voltage drift -40°C < T < 125 °C(1) 1 8 μV/°C
ΔVio Long term input offset voltage drift T = 25 °C(2) 17
Iio Input offset current (Vout = VCC/2) T = 25 °C 1 100(3) pA
-40°C < T < 125 °C 200(3)
Iib Input bias current (Vout = VCC/2) T = 25 °C 1 100(3) pA
-40°C < T < 125 °C 200(3)
RIN Input resistance 1
CIN Input capacitance 5 pF
CMR1 Common mode rejection ratio CMR = 20 log (ΔVicm/ΔVio) (Vicm = -0.1 V to VCC-1.65 V, Vout = VCC/2, RL > 1 MΩ) T = 25 °C 62 79 dB
-40°C < T < 125 °C 62
CMR2 Common mode rejection ratio CMR = 20 log (ΔVicm/ΔVio) (Vicm = -0.1 V to VCC+0.1 V, Vout = VCC/2, RL > 1 MΩ) T = 25 °C 62 77 dB
-40°C < T < 125 °C 58
Avd Large signal voltage gain (Vout = 0.5 V to (VCC - 0.5 V), RL > 1 MΩ) T = 25 °C 100 110
-40°C < T < 125 °C 90
VOH High level output voltage RL = 10 kΩ T=25 °C 70 mV
RL = 10 kΩ -40°C < T < 125 °C 100
VOL Low level output voltage RL = 10 kΩ T = 25 °C 70 mV
RL = 10 kΩ -40°C < T < 125 °C 100
Iout Isink (Vout = VCC) T = 25 °C 11 14 mA
-40°C < T < 125 °C 8
Iout Isource (Vout = 0 V) T = 25 °C 9 12 mA
-40°C < T < 125 °C 7
ICC Supply current (per operator, Vout = VCC/2, RL > 1 MΩ) T = 25 °C 45 60 μA
-40°C < T < 125 °C 60

Table 5. Electrical characteristics at VCC = +5 V with VCC- = 0 V, Vicm = VCC/2, T = 25 ° C, and RL = 10 kΩ connected to VCC/2 (unless otherwise specified)

nV
/Hz
Symbol Parameter Conditions Min. Typ. Max. Unit
AC performance
GBP Gain bandwidth product 160 200 kHz
Fu Unity gain frequency RL = 100 kΩ CL = 100 pF 160
φm Phase margin 55 degrees
Gm Gain margin 9 dB
SR Slew rate RL = 100 kΩ, CL = 100 pF, Vout = 0.5 V to VCC - 0.5V 0.12 V/μs
∫ en Low-frequency peak-to-peak input noise Bandwidth: f = 0.1 to 10 Hz 5 μVpp
en Equivalent input noise voltage f = 1 kHz 60
f = 10 kHz
THD+N Total harmonic distortion + noise Follower configuration,
fin = 1 kHz, RL = 100 kΩ
Vicm = 2.5V, BW = 22 kHz,
Vout = 1 Vpp
0.005 %

(1) See Chapter 4.3: Input offset voltage drift over temperature on page 18

(2) Typical value is based on the Vio drift observed after 1000h at 125°C extrapolated to 25°C using the Arrhenius law and assuming an activation energy of 0.7 eV. The operational amplifier is aged in follower mode configuration. See Chapter 4.4: Long term input offset voltage drift on page 19.

(3) Guaranteed by design

Electrical characteristics

Table 6. Electrical characteristics at VCC = +10 V with VCC- = 0 V, Vicm = VCC/2, T = 25 ° C, and RL = 10 kΩ connected to VCC/2 (unless otherwise specified)

nV
/month
Symbol Parameter Conditions Min. Typ. Max. Unit
DC performance
Vio Offset voltage TSX63xA, T = 25 °C 500 μV
TSX63xA, -40°C < T < 125 °C 1300
TSX63x, T = 25 °C 1 mV
TSX63x, -40°C < T < 125 °C 1.8
Vio Offset voltage, high common mode (Vicm=VCC, RL > 1 MΩ) T = 25 °C 4 mV
-40°C < T < 125 °C 5
ΔVio/ΔT Input offset voltage drift -40°C < T < 125 °C(1) 1 8 μV/°C
ΔVio Long term input offset voltage drift T = 25 °C(2) 180
Iio Input offset current (Vout = VCC/2) T = 25 °C 1 100(3) pA
-40°C < T < 125 °C 200(3)
Iib Input bias current (Vout = VCC/2) T = 25 °C 1 100(3) pA
-40°C < T < 125 °C 200(3)
RIN Input resistance 1
CIN Input capacitance 5 pF
CMR1 Common mode rejection ratio CMR = 20 log (ΔVicm/ΔVio) (Vicm = -0.1 V to VCC-1.65 V, Vout = VCC/2, RL > 1 MΩ) T = 25 °C 71 84 dB
-40°C < T < 125 °C 68
CMR2 Common mode rejection ratio CMR = 20 log (ΔVicm/ΔVio) (Vicm = -0.1 V to VCC+0.1 V, Vout = VCC/2, RL > 1 MΩ) T = 25 °C 69 82 dB
-40°C < T < 125 °C 66
Avd Large signal voltage gain (Vout = 0.5 V to (VCC - 0.5 V), RL > 1 MΩ) T = 25 °C 100 110
-40°C < T < 125 °C 90
VOH High level output voltage RL = 10 kΩ T = 25 °C 70 mV
RL = 10 kΩ -40°C < T < 125 °C 100
VOL Low level output voltage RL = 10 kΩ T = 25 °C 70 mV
RL = 10 kΩ -40°C < T < 125 °C 100
Iout Isink (Vout = VCC) T = 25 °C 35 51 mA
-40°C < T < 125 °C 25
Iout Isource (Vout = 0 V) T = 25 °C 30 42 mA
-40°C < T < 125 °C 20
ICC Supply current (per operator, Vout = VCC/2, RL > 1 MΩ) T = 25 °C 45 60 μA
-40°C < T < 125 °C 60

Table 6. Electrical characteristics at VCC = +10 V with VCC- = 0 V, Vicm = VCC/2, T = 25 ° C, and RL = 10 kΩ connected to VCC/2 (unless otherwise specified)

nV
/Hz
Symbol Parameter Conditions Min. Typ. Max. Unit
AC performance
GBP Gain bandwidth product 160 200 kHz
Fu Unity gain frequency RL = 100 kΩ CL = 100 pF 160
φm Phase margin 55 degrees
Gm Gain margin 9 dB
SR Slew rate RL = 100 kΩ, CL = 100 pF, Vout = 0.5 V to VCC - 0.5V 0.12 V/μs
∫ en Low-frequency peak-to-peak input noise Bandwidth: f = 0.1 to 10 Hz 5 μVpp
en Equivalent input noise voltage f = 1 kHz 60
f = 10 kHz
THD+N Total harmonic distortion + noise Follower configuration,
fin = 1 kHz, RL = 100 kΩ
Vicm = 5 V, BW = 22 kHz,
Vout = 1 Vpp
0.004 %

(1) See Chapter 4.3: Input offset voltage drift over temperature on page 18

(2) Typical value is based on the Vio drift observed after 1000h at 125°C extrapolated to 25°C using the Arrhenius law and assuming an activation energy of 0.7 eV. The operational amplifier is aged in follower mode configuration. See Chapter 4.4: Long term input offset voltage drift on page 19.

(3) Guaranteed by design

Electrical characteristics

Table 7. Electrical characteristics at VCC = +16 V with VCC- = 0 V, Vicm = VCC/2, T = 25 ° C, and RL = 10 kΩ connected to VCC/2 (unless otherwise specified)

Symbol Parameter Conditions Min. Typ. Max. Unit
DC performance
Vio Offset voltage TSX63xA, T = 25 °C 700 μV
TSX63xA, -40°C < T < 125 °C 1500
T = 25 °C 1.6 mV
-40°C < T < 125 °C 2.4
Vio Offset voltage, high common- mode (Vicm=VCC, RL > 1 MΩ) T = 25°C 4 mV
-40°C < T < 125 °C 5
ΔVio/ΔT Input offset voltage drift -40°C < T < 125 °C(1) 1 8 μV/°C
ΔVio Long term input offset voltage drift T = 25 °C(2) 3.4 μV
/month
Iio Input offset current (Vout = VCC/2) T = 25 °C 1 100(3) pA
-40°C < T < 125 °C 200(3)
Iib Input bias current (Vout = VCC/2) T = 25 °C 1 100(3) pA
-40°C < T < 125 °C 200(3)
RIN Input resistance 1
CIN Input capacitance 5 pF
CMR1 Common mode rejection ratio T = 25 °C
CMR = 20 log (ΔVicm/ΔVio)
(Vicm = -0.1 V to VCC-1.65 V,
Vout = VCC/2, RL > 1 MΩ)
-40°C < T < 125 °C 71 85 dB
68
CMR2 Common mode rejection ratio
CMR = 20 log (ΔVicm/ΔVio)
(Vicm = -0.1 V to VCC+0.1 V,
Vout = VCC/2, RL > 1 MΩ)
T = 25 °C 69 83 dB
-40°C < T < 125 °C 66
SVR Common mode rejection ratio
20 log (ΔVCC/ΔVio)
(VCC = 3.3 V to 16 V,
Vout = Vicm = VCC/2)
T = 25 °C 73 87 dB
-40°C < T < 125 °C 70
Avd Large signal voltage gain
(Vout = 0.5 V to (VCC - 0.5 V),
RL > 1 MΩ)
T = 25 °C 100 110
-40°C < T < 125 °C 90
VOH High level output voltage RL = 10 kΩ T = 25 °C 70 mV
RL = 10 kΩ -40°C < T < 125 °C 100
VOL Low level output voltage RL = 10 kΩ T = 25 °C 70 mV
RL = 10 kΩ -40°C < T < 125 °C 100
Iout Isink (Vout = VCC) T = 25 °C 35 51 mA
-40°C < T < 125 °C 25
Iout Isource (Vout = 0 V) T = 25 °C 30 42 mA
-40°C < T < 125 °C 20
ICC Supply current (per operator, Vout = VCC/2, RL > 1 MΩ) T = 25 °C 45 60 μA
-40°C < T < 125 °C 60

Table 7. Electrical characteristics at VCC = +16 V with VCC- = 0 V, Vicm = VCC/2, T = 25 ° C, and RL = 10 kΩ connected to VCC/2 (unless otherwise specified)

nV
/Hz
Symbol Parameter Conditions Min. Typ. Max. Unit
DC performance
Vio Offset voltage TSX63xA, T = 25 °C 700 μV
TSX63xA, -40°C < T < 125 °C 1500
T = 25 °C 1.6 mV
-40°C < T < 125 °C 2.4
Vio Offset voltage, high common- mode (Vicm=VCC, RL > 1 MΩ) T = 25°C 4 mV
-40°C < T < 125 °C 5
ΔVio/ΔT Input offset voltage drift -40°C < T < 125 °C(1) 1 8 μV/°C
ΔVio Long term input offset voltage drift T = 25 °C(2) 3.4 μV
/month
Iio Input offset current (Vout = VCC/2) T = 25 °C 1 100(3) pA
-40°C < T < 125 °C 200(3)
Iib Input bias current (Vout = VCC/2) T = 25 °C 1 100(3) pA
-40°C < T < 125 °C 200(3)
RIN Input resistance 1
CIN Input capacitance 5 pF
CMR1 Common mode rejection ratio
CMR = 20 log (ΔVicm/ΔVio)
(Vicm = -0.1 V to VCC-1.65 V,
Vout = VCC/2, RL > 1 MΩ)
T = 25 °C 71 85 dB
-40°C < T < 125 °C 68
CMR2 Common mode rejection ratio
CMR = 20 log (ΔVicm/ΔVio)
(Vicm = -0.1 V to VCC+0.1 V,
Vout = VCC/2, RL > 1 MΩ)
T = 25 °C 69 83 dB
-40°C < T < 125 °C 66
SVR Common mode rejection ratio
20 log (ΔVCC/ΔVio)
(VCC = 3.3 V to 16 V,
Vout = Vicm = VCC/2)
T = 25 °C 73 87 dB
-40°C < T < 125 °C 70
Avd Large signal voltage gain
(Vout = 0.5 V to (VCC - 0.5 V),
RL > 1 MΩ)
T = 25 °C 100 110
-40°C < T < 125 °C 90
VOH High level output voltage RL = 10 kΩ T = 25 °C 70 mV
RL = 10 kΩ -40°C < T < 125 °C 100
VOL Low level output voltage RL = 10 kΩ T = 25 °C 70 mV
RL = 10 kΩ -40°C < T < 125 °C 100
Iout Isink (Vout = VCC) T = 25 °C 40 92 mA
Vout = VCC, -40°C < T < 125 °C 35
Iout Isource (Vout = 0 V) Vout = 0 V, T = 25 °C 30 60 mA
Vout = 0 V, -40°C < T < 125 °C 25
ICC Supply current (per operator, VCC/2, RL > 1 MΩ) T = 25 °C 45 60 μA
-40°C < T < 125 °C 60
AC performance
GBP Gain bandwidth product 160 200 kHz
Fu Unity gain frequency RL = 100 kΩ CL = 100 pF 160
φm Phase margin 55 degrees
Gm Gain margin 9 dB
SR Slew rate RL = 100 kΩ, CL = 100 pF, Vout = 0.5 V to VCC - 0.5V 0.12 V/μs
∫ en Low-frequency peak-to-peak input noise Bandwidth: f = 0.1 to 10 Hz 5 μVpp
en Equivalent input noise voltage f = 1 kHz 60
f = 10 kHz
THD+N Total harmonic distortion + noise Follower configuration, fin = 1 kHz,
RL = 100 kΩ Vicm = 8 V,
BW = 22 kHz, Vout = 1 Vpp
0.004 %

(1) See Chapter 4.3: Input offset voltage drift over temperature on page 18

(2) Typical value is based on the Vio drift observed after 1000h at 125°C extrapolated to 25°C using the Arrhenius law and assuming an activation energy of 0.7 eV. The operational amplifier is aged in follower mode configuration. See Chapter 4.4: Long term input offset voltage drift on page 19.

(3) Guaranteed by design

Electrical characteristics

Table 7. Electrical characteristics at VCC = +16 V with VCC- = 0 V, Vicm = VCC/2, T = 25 ° C, and RL = 10 kΩ connected to VCC/2 (unless otherwise specified)

nV
/Hz
Symbol Parameter Conditions Min. Typ. Max. Unit
DC performance
Vio Offset voltage TSX63xA, T = 25 °C 700 μV
TSX63xA, -40°C < T < 125 °C 1500
T = 25 °C 1.6 mV
-40°C < T < 125 °C 2.4
Vio Offset voltage, high common- mode (Vicm=VCC, RL > 1 MΩ) T = 25°C 4 mV
-40°C < T < 125 °C 5
ΔVio/ΔT Input offset voltage drift -40°C < T < 125 °C(1) 1 8 μV/°C
ΔVio Long term input offset voltage drift T = 25 °C(2) 3.4 μV
/month
Iio Input offset current (Vout = VCC/2) T = 25 °C 1 100(3) pA
-40°C < T < 125 °C 200(3)
Iib Input bias current (Vout = VCC/2) T = 25 °C 1 100(3) pA
-40°C < T < 125 °C 200(3)
RIN Input resistance 1
CIN Input capacitance 5 pF
CMR1 Common mode rejection ratio
CMR = 20 log (ΔVicm/ΔVio)
(Vicm = -0.1 V to VCC-1.65 V,
Vout = VCC/2, RL > 1 MΩ)
T = 25 °C 71 85 dB
-40°C < T < 125 °C 68
CMR2 Common mode rejection ratio
CMR = 20 log (ΔVicm/ΔVio)
(Vicm = -0.1 V to VCC+0.1 V,
Vout = VCC/2, RL > 1 MΩ)
T = 25 °C 69 83 dB
-40°C < T < 125 °C 66
SVR Common mode rejection ratio
20 log (ΔVCC/ΔVio)
(VCC = 3.3 V to 16 V,
Vout = Vicm = VCC/2)
T = 25 °C 73 87 dB
-40°C < T < 125 °C 70
Avd Large signal voltage gain
(Vout = 0.5 V to (VCC - 0.5 V),
RL > 1 MΩ)
T = 25 °C 100 110
-40°C < T < 125 °C 90
VOH High level output voltage RL = 10 kΩ T = 25 °C 70 mV
RL = 10 kΩ -40°C < T < 125 °C 100
VOL Low level output voltage RL = 10 kΩ T = 25 °C 70 mV
RL = 10 kΩ -40°C < T < 125 °C 100
Iout Isink (Vout = VCC) T = 25 °C 40 92 mA
-40°C < T < 125 °C 35
Iout Isource (Vout = 0 V) T = 25 °C 30 60 mA
-40°C < T < 125 °C 25
ICC Supply current (per operator, Vout = VCC/2, RL > 1 MΩ) T = 25 °C 45 60 μA
-40°C < T < 125 °C 60
AC performance
GBP Gain bandwidth product 160 200 kHz
Fu Unity gain frequency RL = 100 kΩ CL = 100 pF 160
φm Phase margin 55 degrees
Gm Gain margin 9 dB
SR Slew rate RL = 100 kΩ, CL = 100 pF, Vout = 0.5 V to VCC - 0.5V 0.12 V/μs
∫ en Low-frequency peak-to-peak input noise Bandwidth: f = 0.1 to 10 Hz 5 μVpp
en Equivalent input noise voltage f = 1 kHz 60
f = 10 kHz
THD+N Total harmonic distortion + noise Follower configuration,
fin = 1 kHz, RL = 100 kΩ
Vicm = 8 V, BW = 22 kHz,
Vout = 1 Vpp
0.004 %

(1) See Chapter 4.3: Input offset voltage drift over temperature on page 18

(2) Typical value is based on the Vio drift observed after 1000h at 125°C extrapolated to 25°C using the Arrhenius law and assuming an activation energy of 0.7 eV. The operational amplifier is aged in follower mode configuration. See Chapter 4.4: Long term input offset voltage drift on page 19.

(3) Guaranteed by design

Application information

4.1 Operating voltages

The amplifiers of the TSX63x and TSX63xA series can operate from 3.3 to 16 V. Their parameters are fully specified at 3.3, 5, 10 and 16 V power supplies. However, the parameters are very stable in the full VCC range. Additionally, the main specifications are guaranteed in extended temperature ranges from -40 °C to +125 ° C.

4.2 Rail-to-rail input

The TSX63x and TSX63xA are built with two complementary PMOS and NMOS input differential pairs. The devices have a rail-to-rail input, and the input common mode range is extended from VCC- 0.1 V to VCC+ + 0.1 V.

However, the performance of these devices is clearly optimized for the PMOS differential pairs (which means from VCC- - 0.1V to VCC+ - 1.65V).

Beyond VCC+ - 1.65 V, the op-amp is still functional but with a degraded performance as can be observed in the electrical characteristics section of this datasheet (mainly Vio).

These performances are suitable for a number of applications requiring rail-to-rail input and output.

The devices are guaranteed without phase reversal.

4.3 Input offset voltage drift over temperature

The maximum input voltage drift over the temperature variation is defined as the offset variation related to offset value measured at 25 °C. The operational amplifier is one of the main circuits of the signal conditioning chain, and the amplifier input offset is a major contributor to the chain accuracy. The signal chain accuracy at 25 °C can be compensated during production at application level. The maximum input voltage drift over temperature enables the system designer to anticipate the effect of temperature variations.

The maximum input voltage drift over temperature is computed using Equation 1.

Equation 1

$$ \Delta V_{io} = \frac{max \left| V_{io}(T) - V_{io}(25^{\circ}C) \right|}{T - 25^{\circ}C} $$

with T = -40 °C and 125 °C.

The datasheet maximum value is guaranteed by a measurement on a representative sample size ensuring a Cpk (process capability index) greater than 2.

4.4 Long term input offset voltage drift

To evaluate product reliability, two types of stress acceleration are used:

The voltage acceleration has been defined based on JEDEC results, and is defined using Equation 2.

Equation 2

$$ A_{FV} = e^{\frac{\beta \cdot (V_S - V_U)}{V_U}} $$

Where:

The temperature acceleration is driven by the Arrhenius model, and is defined in Equation 3.

Equation 3

$$ A_{FT} = e^{\frac{E_a}{k} \left( \frac{1}{T_U} - \frac{1}{T_S} \right)} $$

Where:

The final acceleration factor, AF, is the multiplication of the voltage acceleration factor and the temperature acceleration factor (Equation 4).

Equation 4

$$ A_F = A_{FT} \times A_{FV} $$

AF is calculated using the temperature and voltage defined in the mission profile of the product. The AF value can then be used in Equation 5 to calculate the number of months of use equivalent to 1000 hours of reliable stress duration.

Equation 5

$$ Months = A_F \times 1000 h \times \frac{12 \text{ months}}{24 h \times 365.25 \text{ days}} $$

To evaluate the op-amp reliability, a follower stress condition is used where VCC is defined as a function of the maximum operating voltage and the absolute maximum rating (as recommended by JEDEC rules).

The Vio drift (in μV) of the product after 1000 h of stress is tracked with parameters at different measurement conditions (see Equation 6).

Equation 6

$$ V_{io} = V_{io,max} - V_{io,min} \text{ with } V_{icm} = V_{CC}/2 $$

The long term drift parameter (ΔVio), estimating the reliability performance of the product, is obtained using the ratio of the Vio (input offset voltage value) drift over the square root of the calculated number of months (Equation 7).

Equation 7

$$ \Delta V_{io} = \frac{V_{io, drift}}{\sqrt{(months)}} $$

where Vio drift is the measured drift value in the specified test conditions after 1000 h stress duration.

4.5 High values of input differential voltage

In closed loop configuration, which represents the typical use of an op-amp, the input differential voltage is low (close to Vio). However, some specific conditions can lead to higher input differential values, such as:

Use of the TSX631 in comparator configuration, especially combined with high temperature and long duration can create a permanent drift of Vio.

All channels of the dual and quad versions of the TSX632 and TSX634 are virtually unaffected when used in comparator configuration.

4.6 PCB layouts

For correct operation, it is advised to add 10 nF decoupling capacitors as close as possible to the power supply pins.

4.7 Macromodel

Accurate macromodels of the TSX63x and TSX63xA are available on STMicroelectronics' web site at www.st.com. These models are a trade-off between accuracy and complexity (that is, time simulation) of the TSX63x and TSX63xA operational amplifiers. They emulate the nominal performances of a typical device within the specified operating conditions mentioned in the datasheet. They also help to validate a design approach and to select the right operational amplifier, but they do not replace on-board measurements.

Package information

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com.

ECOPACK® is an ST trademark.

5.1 SOT23-5 package information

Figure 28. SOT23-5 package mechanical drawing

Table 8. SOT23-5 package mechanical data

Ref. Millimeters Inches
Min. Typ. Max. Min. Typ. Max.
A 0.90 1.20 1.45 0.035 0.047 0.057
A1 0.15 0.006
A2 0.90 1.05 1.30 0.035 0.041 0.051
B 0.35 0.40 0.50 0.013 0.015 0.019
C 0.09 0.15 0.20 0.003 0.006 0.008
D 2.80 2.90 3.00 0.110 0.114 0.118
D1 1.90 0.075
e 0.95 0.037
E 2.60 2.80 3.00 0.102 0.110 0.118
F 1.50 1.60 1.75 0.059 0.063 0.069
L 0.10 0.35 0.60 0.004 0.013 0.023
K 10° 10°

5.2 DFN8 2x2 package information

Figure 29. DFN8 2x2 package mechanical drawing

Table 9. DFN8 2x2 package mechanical data

Ref. Millimeters Inches
Min. Typ. Max. Min. Typ. Max.
A 0.70 0.75 0.80 0.028 0.030 0.031
A1 0.00 0.02 0.05 0.000 0.001 0.002
b 0.15 0.20 0.25 0.006 0.008 0.010
D 2.00 0.079
E 2.00 0.079
e 0.50 0.020
L 0.045 0.55 0.65 0.018 0.022 0.026
N 8 8

5.3 MiniSO-8 package information

Figure 30. MiniSO-8 package mechanical drawing

Table 10. MiniSO-8 package mechanical data

Ref. Millimeters Inches
Min. Typ. Max. Min. Typ. Max.
A 1.1 0.043
A1 0 0.15 0 0.006
A2 0.75 0.85 0.95 0.030 0.033 0.037
b 0.22 0.40 0.009 0.016
C 0.08 0.23 0.003 0.009
D 2.80 3.00 3.20 0.11 0.118 0.126
E 4.65 4.90 5.15 0.183 0.193 0.203
E1 2.80 3.00 3.10 0.11 0.118 0.122
e 0.65 0.026
L 0.40 0.60 0.80 0.016 0.024 0.031
L1 0.95 0.037
L2 0.25 0.010
k
CCC 0.10 0.004

5.4 QFN16 3x3 package information

Figure 31. QFN16 3x3 package mechanical drawing

Table 11. QFN16 3x3 package mechanical data

Ref. Millimeters Inches
Min. Typ. Max. Min. Typ. Max.
A 0.50 0.65 0.020 0.026
A1 0 0.05 0 0.002
b 0.18 0.25 0.30 0.007 0.010 0.012
D 3.00 0.118
E 3.00 0.118
e 0.50 0.020
L 0.30 0.50 0.012 0.020
aaa 0.15 0.006
bbb 0.10 0.004
ccc 0.10 0.004
ddd 0.05 0.002
eee 0.08 0.003

5.5 TSSOP14 package information

Figure 32. TSSOP14 package mechanical drawing

Table 12. TSSOP14 package mechanical data

Ref. Millimeters Inches
Min. Typ. Max. Min. Typ. Max.
A 1.20 0.047
A1 0.05 0.15 0.002 0.004 0.006
A2 0.80 1.00 1.05 0.031 0.039 0.041
b 0.19 0.30 0.007 0.012
C 0.09 0.20 0.004 0.0089
D 4.90 5.00 5.10 0.193 0.197 0.201
E 6.20 6.40 6.60 0.244 0.252 0.260
E1 4.30 4.40 4.50 0.169 0.173 0.176
e 0.65 0.0256
L 0.45 0.60 0.75 0.018 0.024 0.030
L1 1.00 0.039
k
aaa 0.10 0.004

6 Ordering information

Table 13. Order codes

Order code Temperature range No. of channels Package Packing Marking
TSX631ILT 1 SOT23-5 K27
TSX632IQ2T 2 DFN8 2x2 K27
TSX632IST -40 to 125 °C 2 MiniSO8 K27
TSX634IQ4T 4 QFN16 3x3 K27
TSX634IPT 4 TSSOP14 TSX6341
TSX631IYLT -40 to 125 °C
Automotive grade(1)
1 SOT23-5 Tape and reel K188
TSX632IYST 2 MiniSO8 K188
TSX634IYPT 4 TSSOP14 TSX634IY
TSX631AILT 1 SOT23-5 K189
TSX632AIST -40 to 125 °C 2 MiniSO8 K189
TSX634AIPT 4 TSSOP14 TSX634AI
TSX631AIYLT -40 to 125°C
Automotive grade(1)
1 SOT23-5 K190
TSX632AIYST 2 MiniSO8 K190
TSX634AIΥΡΤ 4 TSSOP14 TSX634AIY

(1) Qualification and characterization according to AEC Q100 and Q003 or equivalent, advanced screening according to AEC Q001 & Q 002 or equivalent are on-going.

7 Revision history

Table 14. Document revision history

Date Revision Changes
26-Mar-2013 1 Initial release

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