EWM103-WF7621A User Manual
MT7621A wireless module
Contents
Disclaimer
The information in this document, including the URL address for reference, is subject to change without notice. Documents are provided "as is" without any warranty, including any warranty of merchantability, fitness for a particular purpose or non-infringement, and any warranty referred elsewhere of any proposal, specification or sample. This document does not bear any responsibility, including the responsibility for any patent infringement caused by the use of the information in this document. This document does not grant any license for the use of intellectual property by estoppel or otherwise, whether express or implied.
The data in this paper are all from Ebyte laboratory, and the actual results may be slightly different.
It is hereby declared that all trade names, trademarks and registered trademarks mentioned here are the property of their respective owners.
The final interpretation right belongs to Chengdu Ebyte Electronic Technology Co., Ltd.
Notice: The contents of this manual may be changed due to product version upgrade or other reasons. Ebyte Electronic Technology Co., Ltd. reserves the right to modify the contents of this manual without any notice or prompt. This manual is only used as a guide. Chengdu Ebyte Electronic Technology Co., Ltd. will try its best to provide accurate information in this manual. However, Chengdu Ebyte Electronic Technology Co., Ltd. does not guarantee that the contents of this manual are completely correct, and all statements, information and suggestions in this manual do not constitute any express or implied warranty.
Copyright © 2012-2024, Chengdu Ebyte Electronic Technology Co., Ltd.
1 PRODUCT OVERVIEW
1.1 Product Introduction
A Gigabit routing gateway module developed by Chengdu Ebyte Electronic Technology Co., Ltd. with MediaTek MT7621A chip as the core. The module integrates dual-core MIPS-1004Kc (880MHz), HNAT/HQoS/Samba/VPN accelerator and 5-port GbE switch, supports OpenWrt operating system and custom development, has rich interfaces and powerful processors, can be widely used in smart devices or cloud service applications, and can be freely developed for secondary development.
Figure 1: EWM103-WF7621A
A visual representation of the EWM103-WF7621A module, showing its dimensions and key components. The module is approximately 50.0±0.2mm in both length and width.
1.2 Features
- Embedded MIPS1004Kc (880 MHz, dual-core)
- 32 KB I-Cache and 32 KB D-Cache per core
- 256kb L2 cache (shared by two cores)
- SMP Function
- Configurable single processor operation
- Gigabit Switch: 5 ports, running at full line speed
- 5-port 10/100/1000Mbps MDI transceiver
- Support RGMII/MII interface
- 16-bit DDR2/3, capacity up to 256/512 Mbytes
- SPI (2 chip select), NAND Flash (SLC), SDXC, eMMC (4 bits)
- USB3.0 interface × 1 + USB2.0 interface × 1 or USB2.0 interface × 2 (both are host interfaces)
- PCIe host interface × 3
- I2C, UART Lite × 3, JTAG, MDC, MDIO, GPIO
- Support Internet voice calls (I2S, PCM)
- Audio interface (SPDIF-Tx, I2S, PCM)
- Provides excellent Samba performance via USB2.0/USB 3.0/SD-XC
- HW Storage Accelerator
- HW NAT
- Wired transmission rate up to 2Gbps
- L2 Bridge
- IPv4 routing, NAT, NAPT
- IPv6 routing, DS-Lite, 6RD, 6to4
- HW QoS: 16 hardware queues to guarantee the minimum/maximum bandwidth for each flow. Can work seamlessly with HW NAT engine. Wired transmission rate can reach 2Gbps.
- HW Encryption: IPSec throughput can reach 400~500mbps
- Green: Smart clock adjustment (dedicated), DDR2/3: ODT off, self-refresh mode
- Firmware: OpenWRT
- RGMII INIC Driver: Linux 2.4/2.6
1.3 Application Scenarios
- Wifi video transmission
- WiFi audio transmission
- Router
- Wifi repeater
- Serial port forwarding and other general-purpose modules for smart homes
- Cloud Service Application
- IoT Gateway
2 Specifications
2.1 Basic parameters
Electrical parameters | unit | Parameter Details | Remark |
---|---|---|---|
Operating voltage | V | 3.3V | Exceeding 3.5 V may permanently burn the module |
Communication level | V | 3.3 | Using 5V TTL may burn out |
Supply current requirement | mA | 500 | - |
Operating temperature | °C | -20 ~ +60 | - |
Storage temperature | °C | -40 ~ +85 | - |
use humidity storage | %RH | 10 ~ 95 (non-condensing) | - |
5 ~ 95 (no condensation) | - |
2.2 Hardware Parameters
Hardware Parameters | model | Remark |
---|---|---|
chip | MT7621A | Customizable 16MB/8MB |
Flash | 32MB | Customizable DDR 3 256M/64M/32MB |
Memory | DDR3 128MB | 880 MHz, dual core |
Kernel | MIPS1004Kc | Patches |
Packaging | - | The factory default firmware supports 1 WAN and 4 LAN interfaces. |
Ethernet interface | 5 10M/100/1000M adaptive | - |
UART Lite | 3-Way | - |
PCIe | 3-Way | Both are host interfaces |
USB | USB3.0×1+USB2.0×1 or USB2.0×2 | - |
size | 50*50*3mm | The error size is ±0.2mm |
weight | 11.1g | The error is ±0.2g |
2.3 Functional Block Diagram
A block diagram illustrating the internal architecture of the EWM103-WF7621A module. It shows the MIPS 1004Kc cores, cache, crypto, storage accelerator, Gigabit Switch, and various interfaces like WiFi, PCIe, USB, UART, SPI, I2C, and audio interfaces.
3 Mechanical Dimensions and Pin Definition
A diagram showing the mechanical dimensions of the EWM103-WF7621A module, with a top-down view and measurements. It also includes a table detailing the pin definition, listing the serial number, pin name, pin function description, and default functionality for each pin.
Figure 2 EWM103-WF7621A
Serial number | Pin Name | Pin Function Description | Default functionality |
---|---|---|---|
1 | 3.3VD | power supply | - |
2 | 3.3VD | power supply | - |
3 | 3.3VD | power supply | - |
4 | 3.3VD | power supply | - |
5 | GND | land | - |
6 | GND | land | - |
7 | GND | land | - |
8 | GND | land | - |
9 | CTS3_N | UART Clear To Send | - |
10 | TXD2 | UART TX Data | - |
11 | RXD2 | UART RX Data | - |
12 | TXD3 | UART TX Data | - |
13 | RXD3 | UART RX Data | - |
14 | RTS2_N | UART Request To Send | - |
15 | CTS2_N | UART Clear To Send | - |
16 | RTS3_N | UART Request To Send | - |
17 | USB_DP_1P | USB Port1 data pin Data+ (USB2.0) | - |
18 | USB_DM_1P | USB Port1 data pin Data- (USB2.0) | - |
19 | GND | land | - |
20 | SSUSB_TXP | USB Port0 SS data pin TX+ (USB3.0) | - |
21 | SSUSB_TXN | USB Port0 SS data pin TX- (USB3.0) | - |
22 | SSUSB_RXP | USB Port0 SS data pin RX+ (USB3.0) | - |
23 | SSUSB_RXN | USB Port0 SS data pin RX+-(USB3.0) | - |
24 | GND | land | - |
25 | USB_DP_P0 | SB Port0 HS/FS/LS data pin Data+ (USB3.0) | - |
26 | USB_DM_P0 | USB Port0 HS/FS/LS data pin Data- (USB3.0) | - |
27 | GND | land | - |
28 | ESW_TXVP_A_P0 | Port #0 MDI Transceivers | - |
29 | ESW_TXVN_A_P0 | Port #0 MDI Transceivers | - |
30 | ESW_TXVP_B_P0 | Port #0 MDI Transceivers | - |
31 | ESW_TXVN_B_P0 | Port #0 MDI Transceivers | - |
32 | ESW_TXVP_C_P0 | Port #0 MDI Transceivers | - |
33 | ESW_TXVN_C_P0 | Port #0 MDI Transceivers | - |
34 | ESW_TXVP_D_P0 | Port #0 MDI Transceivers | - |
35 | ESW_TXVN_D_P0 | Port #0 MDI Transceivers | - |
36 | ESW_TXVP_A_P1 | Port #1 MDI Transceivers | - |
37 | ESW_TXVN_A_P1 | Port #1 MDI Transceivers | - |
38 | ESW_TXVP_B_P1 | Port #1 MDI Transceivers | - |
39 | ESW_TXVN_B_P1 | Port #1 MDI Transceivers | - |
40 | ESW_TXVP_C_P1 | Port #1 MDI Transceivers | - |
41 | ESW_TXVN_C_P1 | Port #1 MDI Transceivers | - |
42 | ESW_TXVP_D_P1 | Port #1 MDI Transceivers | - |
43 | ESW_TXVN_D_P1 | Port #1 MDI Transceivers | - |
44 | GND | land | - |
45 | ESW_TXVP_A_P2 | Port #2 MDI Transceivers | - |
46 | ESW_TXVN_A_P2 | Port #2 MDI Transceivers | - |
47 | ESW_TXVP_B_P2 | Port #2 MDI Transceivers | - |
48 | ESW_TXVN_B_P2 | Port #2 MDI Transceivers | - |
49 | ESW_TXVP_C_P2 | Port #2 MDI Transceivers | - |
50 | ESW_TXVN_C_P2 | Port #2 MDI Transceivers | - |
51 | ESW_TXVP_D_P2 | Port #2 MDI Transceivers | - |
52 | ESW_TXVN_D_P2 | Port #2 MDI Transceivers | - |
53 | GND | land | - |
54 | ESW_TXVP_A_P3 | Port #3 MDI Transceivers | - |
55 | ESW_TXVN_A_P3 | Port #3 MDI Transceivers | - |
56 | ESW_TXVP_B_P3 | Port #3 MDI Transceivers | - |
57 | ESW_TXVN_B_P3 | Port #3 MDI Transceivers | - |
58 | ESW_TXVP_C_P3 | Port #3 MDI Transceivers | - |
59 | ESW_TXVN_C_P3 | Port #3 MDI Transceivers | - |
60 | ESW_TXVP_D_P3 | Port #3 MDI Transceivers | - |
61 | ESW_TXVN_D_P3 | Port #3 MDI Transceivers | - |
62 | GND | land | - |
63 | ESW_TXVP_A_P4 | Port #4 MDI Transceivers | - |
64 | ESW_TXVN_A_P4 | Port #4 MDI Transceivers | - |
65 | ESW_TXVP_B_P4 | Port #4 MDI Transceivers | - |
66 | ESW_TXVN_B_P4 | Port #4 MDI Transceivers | - |
67 | ESW_TXVP_C_P4 | Port #4 MDI Transceivers | - |
68 | ESW_TXVN_C_P4 | Port #4 MDI Transceivers | - |
69 | ESW_TXVP_D_P4 | Port #4 MDI Transceivers | - |
70 | ESW_TXVN_D_P4 | Port #4 MDI Transceivers | - |
71 | ESW_P4_LED_0 | Port #4 PHY LED indicators | - |
72 | ESW_P3_LED_0 | Port #3 PHY LED indicators | - |
73 | ESW_P2_LED_0 | Port #2 PHY LED indicators | - |
74 | ESW_P1_LED_0 | Port #1 PHY LED indicators | - |
75 | ESW_P0_LED_0 | Port #0 PHY LED indicators | - |
76 | ESW_DTEST | Digital test | - |
77 | GE2_TXD3 | RGMII2 Tx Data bit #0 | - |
78 | GE2_TXD2 | RGMII2 Tx Data bit #2 | - |
79 | GE2_TXD1 | RGMII2 Tx Data bit #1 | - |
80 | GE2_TXD0 | RGMII2 Tx Data bit #0 | - |
81 | ESW_DBG_B | - | Note: When RGMII/MII is connected to external PHY, this pin is MDIO. Otherwise it is NC. |
82 | MDIO | PHY Data Management | - |
83 | MDC | PHY Clock Management | Note: When RGMII/MII is connected to external PHY, this pin is MDC. Otherwise it is NC. |
84 | GE2_TXEN | RGMII2 Tx Data Valid | - |
85 | GE2_TXCLK | RGMII2 Tx Clock | - |
86 | GE2_RXD3 | RGMII2 Rx Data bit #3 | - |
87 | GE2_RXD2 | RGMII2 Rx Data bit #2 | - |
88 | GE2_RXD1 | RGMII2 Rx Data bit #1 | - |
89 | GE2_RXD0 | RGMII2 Rx Data bit #0 | - |
90 | GE2_RXDV | RGMII2 Rx Data Valid | - |
91 | GE2_RXCLK | RGMII2 Rx Clock | - |
92 | GND | land | - |
93 | RXD1 | UART TX Data | - |
94 | TXD1 | UART RX Data | - |
95 | PORST_N | Power-On Reset | - |
96 | I2C_SCLK | I2C Clock | - |
97 | I2C_SD | I2C Data | - |
98 | PCIE_TXN2 | PCIE2 TX - | - |
99 | PCIE_TXP2 | PCIE2 TX+ | - |
100 | PCIE_RXN2 | PCIE2 RX - | - |
101 | PCIE_RXP2 | PCIE2 RX+ | - |
102 | PCIE_CKN2 | PCIE2 CLK - | - |
103 | PCIE_CKP2 | PCIE2 CLK+ | - |
104 | GPIO0 | GPIO0 | - |
105 | PERST_N | PCIE | - |
106 | PCIE_TXP1 | PCIE1 TX+ | - |
107 | PCIE_TXN1 | PCIE1 TX - | - |
108 | PCIE_RXP1 | PCIE1 RX+ | - |
109 | PCIE_RXN1 | PCIE1 RX - | - |
110 | PCIE_CKN1 | PCIE1 CLK - | - |
111 | PCIE_CKP1 | PCIE1 CLK+ | - |
112 | WDT_RST_N | NC | - |
113 | PCIE_RXPO | PCIE0 RX+ | - |
114 | PCIE_RXNO | PCIE0 RX - | - |
115 | PCIE_TXNO | PCIEO TX - | - |
116 | PCIE_TXPO | PCIE0 TX+ | - |
117 | PCIE_CKPO | PCIE0 CLK+ | - |
118 | PCIE_CKNO | PCIE0 CLK - | - |
119 | GND | land | - |
120 | JTMS | JTAG Mode Select | - |
121 | JTDO | JTAG Data Output | - |
122 | JTDI | JTAG Data Input | - |
123 | JTRST_N | JTAG Target Reset | - |
124 | JTCLK | JTAG Clock | - |
125 | GND | land | - |
126 | ND_D7 | NAND Flash Data7 | - |
127 | ND_D6 | NAND Flash Data6 | - |
128 | ND_D5 | NAND Flash Data5 | - |
129 | ND_D4 | NAND Flash Data4 | - |
130 | ND_D3 | NAND Flash Data3 | - |
131 | ND_D2 | NAND Flash Data2 | - |
132 | ND_D1 | NAND Flash Datal | - |
133 | ND_D0 | NAND Flash Data0 | - |
134 | ND_RB_N | NAND Flash Ready/Busy | - |
135 | ND_RE_N | NAND Flash Read Enable | - |
136 | ND_CS_N | NAND Flash Chip Select | - |
137 | ND_CLE | NAND Flash Command Latch Enable | - |
138 | ND_ALE | NAND Flash ALE Latch Enable | - |
139 | ND_WE_N | NAND Flash Write Enable | - |
140 | ND_WP | NAND Flash Write Protect | - |
5 Frequently Asked Questions
5.1 The transmission distance is not ideal
- When there is a straight-line communication obstacle, the communication distance will be attenuated accordingly.
- Temperature, humidity, and co-channel interference can increase the communication packet loss rate.
- The ground absorbs and reflects radio waves, so the test results are poor when close to the ground.
- Seawater has a strong ability to absorb radio waves, so the test effect at the seaside is poor.
- If there are metal objects near the antenna, or the antenna is placed in a metal shell, the signal attenuation will be very serious.
- The power register is set incorrectly, or the air rate is set too high (the higher the air rate, the closer the distance).
- The power supply voltage is lower than the recommended value at room temperature. The lower the voltage, the lower the power output.
- This causes poor matching between the antenna and the module or quality issues with the antenna itself.
5.2 Modules are vulnerable to damage
- Please check the power supply to ensure that it is within the recommended power supply voltage. If it exceeds the maximum value, the module will be permanently damaged.
- Please check the stability of the power supply. The voltage should not fluctuate greatly or frequently.
- Please ensure anti-static operation during installation and use, as high-frequency components are sensitive to static electricity.
- Please ensure that the humidity is not too high during installation and use, as some components are humidity sensitive devices.
- If there is no special requirement, it is not recommended to use it at too high or too low temperature.
6 Welding Operation Instructions
6.1 Reflow temperature
A table detailing reflow profile characteristics for both leaded and lead-free assembly processes, including minimum and maximum temperatures, heating slopes, liquidus temperature, and peak temperature tolerances.
Reflow profile characteristics | Leaded process assembly | Lead-free assembly |
---|---|---|
Minimum temperature (Tsmin) | 100°C | 150°C |
Maximum temperature (Tsmax) | 150°C | 200°C |
Time (tsmin ~ tsmax) | 60-120 seconds | 60-120 seconds |
Heating slope (TL ~ Tp) | 3°C/sec, max. | 3°C/sec, max. |
Liquidus temperature (TL) | 183°C | 217°C |
T L above the holding time | 60 - 90 seconds | 60 - 90 seconds |
Package peak temperature Tp | Users must not exceed the temperature stated on the product's "Moisture Sensitivity" label. | Users must not exceed the temperature stated on the product's "Moisture Sensitivity" label. |
(Tp) within 5°C of the specified classification temperature (Tc) is shown in the figure below. | 20 seconds | 30 seconds |
Cooling slope (Tp ~ TL) | 6°C/sec, max. | 6°C/sec, max. |
Time from room temperature to peak temperature | 6 minutes, longest | 8 minutes, longest |
Note: The peak temperature (Tp) tolerance of the temperature curve is defined as the upper limit of the user.
6.2 Reflow Oven Curve
A graph illustrating the temperature profile for reflow soldering. It shows different zones such as preheating, soaking, and reflow, with temperature and time axes. Key points like Tsmin, Tsmax, TL, and Tp are indicated, along with maximum warming and cooling slopes.
Revision History
Version | Revision Date | Revision Notes | Maintainer |
---|---|---|---|
1.0 | 2024-12-18 | Initial release | Hao |
About us
Technical support: support@cdebyte.com
Documents and RF Setting download link: https://www.ru-ebyte.com
Thank you for using Ebyte products! Please contact us with any questions or suggestions: info@cdebyte.com
Address: B5 Mould Industrial Park, 199# Xiqu Ave, High tech Zone, Chengdu, Sichuan, China
EBYTE Chengdu Ebyte Electronic Technology Co.,Ltd.
File Info : application/pdf, 14 Pages, 734.46KB
DocumentDocumentReferences
E32-433T30D LoRa数传模块-lora扩频模组-433M无线模块
Китайские производители беспроводных модемов Lora, поставщики промышленных терминалов IoT
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